JPH0316644B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an overcurrent limiting circuit that limits overcurrent flowing through a load, and particularly to an overcurrent limiting circuit that limits overcurrent in a transistor circuit.

Generally, if the load is a purely resistive load, only the current determined by the resistance will flow, but if the load is a capacitive load, the drive transistor will momentarily have a low impedance until the load is charged, so an excessive current will flow through this transistor. The drive transistor is destroyed or deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above drawbacks, and an object of the present invention is to provide an overcurrent limiting circuit that limits excessive currents to various loads.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of an overcurrent limiting circuit according to the present invention. According to this embodiment, the base of an NPN transistor Q1 is connected to a signal input source, the emitter of this transistor Q1 is grounded, and the collector is It is connected to the emitter of NPN transistor Q2 via resistor R1. The base of this transistor Q2 is connected to a reference voltage source E, and the collector is connected to the base of a PNP transistor Q3 and to the power supply _Vcc via a resistor R2. The emitter of this transistor Q3 is
It is connected to the collector of the NPN transistor, ie, the output transistor Q4, and to the power supply _Vcc . The base of the output transistor Q4 is connected to the collector of the transistor Q3, and the emitter is grounded via a load L. Further, the base and emitter of this output transistor Q4 are connected to the base and emitter of an NPN transistor Q5, respectively. this
The collector of the NPN transistor Q5 is connected to the power supply _Vcc via the resistor R3, and is also connected to the base of the PNP transistor Q6. The emitter and collector of this transistor Q6 are connected to the power supply _Vcc and the emitter of transistor Q2, respectively.

In the circuit configuration described above, the reference voltage source E, the transistor Q2, and the resistor R1 constitute a constant current source, and flow a constant current determined by the voltage _VZ of the reference voltage source E and the emitter resistor R1. If the current amplification factor of transistor Q2 is high and the base current is ignored, the collector current i _C of this transistor Q2 is approximately i _c = (V _Z −
Q2 base-emitter voltage) ÷ R1. The resistor R2 has a function of blocking leakage current from the transistor Q1 when the transistor Q1 is turned off. The resistance value of this resistor R2 is determined by the voltage drop caused by the leakage current.
The value is set so that it will not turn on.

Next, the operation of the circuit shown in FIG. 1 will be explained. When a positive input signal is supplied to the base of transistor Q1, transistor Q1 becomes conductive and current i _c flows to transistor Q2. Then, due to the voltage drop across resistor R2 due to this current, transistor Q3
becomes conductive, and transistor Q4 becomes conductive. As a result, power is supplied to the load L. At this time, the transistor Q5 connected in parallel with the transistor Q4 also becomes conductive, and a current flows through the collector-emitter path of the transistor Q5 via the resistor R3. As a result, the voltage drop appearing across the resistor R3 is supplied between the emitter and base of the transistor Q6, but the value of the resistor R3 is set so that the transistor Q6 is not turned on when normal power is being supplied to the load L. has been decided. That is, the transistor Q6 is not turned on due to the voltage drop across the resistor R3 during normal operation.

In the overcurrent limiting circuit configured as above, I ₁ is the maximum current that can flow through transistor Q4, and the emitter area of transistor Q4 is
S ₁ and the area of the transistor Q5 connected in parallel to the transistor Q4 is S ₂ , the current I ₂ of the transistor Q5 is expressed by the following equation.

I ₂ = S ₂ /S ₁・I ₁・α …(1) α: Constant As shown in this formula (1), transistors Q4, Q
Since the base voltages of the transistors 5 and 5 are equal, when two transistors having different emitter areas are connected in parallel, the ratio of currents flowing through each transistor becomes equal to the emitter area ratio. In the above formula (1), transistor Q
If the current densities of Q4 and Q5 are the same, α will be 1.
However, when transistors Q4 and Q5 are formed in the same chip, the area ratio of both transistors can be easily set, so that α≠1. As shown in equation (1) above, during normal operation, the transistor Q5 to which the overcurrent detection resistor R3 is connected has a current I ₂
The following current flows. When the current flowing through transistor Q5 increases abnormally due to a short circuit in the load, and the voltage I ₂ · R3 generated across resistor R3 between the base and emitter of transistor Q6 becomes sufficient to make transistor Q6 conductive. , this transistor Q6 becomes conductive. This transistor Q
As Q6 becomes conductive, the current flowing through resistor R1 increases, and the emitter potential of transistor Q2 rises.
The current flowing through this transistor Q2 decreases.
As a result, the excitation current for transistor Q3 becomes smaller, and accordingly transistors Q4 and Q5
A feedback operation is performed in which the excitation current becomes smaller.
Therefore, the current of transistor Q5 decreases, and the current of transistor Q6 decreases, and as a result, the current of transistor Q2 is kept almost constant, and the load L
The power supplied to the system also remains almost constant. In this way, the current flowing through the load L is limited by the feedback operation by the transistor Q5, resistor R3, and transistor Q6 as described above when the current flowing through the transistor Q4 reaches the maximum allowable current _I1 .

In this way, the current value flowing through the load L is limited to the sum of allowable currents I ₁ and I ₂ for transistors Q4 and Q5, respectively, ie (I ₁ +I ₂ ) current.

FIG. 2 is a characteristic diagram showing the load voltage and current characteristics of the overcurrent limiting circuit described above, and the broken line in the figure shows the load voltage and current characteristics when the overcurrent control circuit according to the present invention is not provided. As can be seen from this characteristic diagram, when maximum allowable current I ₁ flows through transistor Q4 and current I ₂ sufficient to make transistor Q6 conductive flows through transistor Q5, the emitter potential of transistor Q2 increases due to conduction of transistor Q6. Therefore, the load current is (I ₁ +
_I2 ). In this case, the above current value (I ₁ +
I ₂ ) is set to the allowable current value for the load L, then
It can limit the flow of overcurrent to the load.

FIG. 3 shows another embodiment of the present invention, and in the embodiment of FIG. 3, the overcurrent detection transistor Q6
The collector of transistor Q7 is connected to the base of transistor Q7, and the collector of this transistor Q7 is connected to the power supply V _CC
, and its emitter is connected to the emitter of transistor Q2.

In the embodiment shown in FIG. 3, the current flowing through the resistor R2 connected to the collector side of the transistor Q2 is
Transistor Q forming a differential pair with transistor Q2
It is controlled according to the base potential of 7. That is, when the allowable current I ₂ flows through the transistor Q5, the transistor Q6 becomes conductive, and this conduction raises the base potential of the transistor Q7. As a result, the current flowing through the transistor Q2 forming a differential pair with the transistor Q7 decreases, the collector current of the transistor Q5 decreases, and the transistor Q6 turns off.
At this time, the transistor Q6 is turned off and the transistor Q7 is also turned off, so that the current flowing through the load L can be limited to (I ₁ +I ₂ ). Therefore, even if the load is short-circuited, excessive current can be prevented from flowing through the load.

As described above, according to the present invention, when an excessive current flows through the output transistor, it is possible to detect this excessive current and limit this excessive current with a simple circuit configuration, and the overcurrent is suitable for IC implementation. A current limiting circuit is provided.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a voltage supply circuit with an overcurrent limiting circuit according to one embodiment of the present invention, Fig. 2 is a voltage/current characteristic diagram of the voltage supply circuit, and Fig. 3 is a diagram according to another embodiment. A voltage supply circuit with an overcurrent limiting circuit is shown. Q1 to Q7...transistor, R1 to R3
...Resistance, L...Load, _Vcc ...Power supply, E...Reference voltage source.

Claims (1)

[Claims] 1. Input transistor Q1 to which an input signal is applied
and a first resistor R1 connected in series to the collector side of the input transistor Q1, and a collector-emitter current path is connected in series to the series circuit to output a constant current during normal operation. 1st
a transistor Q2, first means R2, Q3 for converting a change in the collector current of the first transistor Q2 into a voltage and outputting a first current according to the voltage, and a collector-emitter current path. a third transistor Q4 having a collector-emitter current path, the first current being supplied to the base and a second current flowing through the collector-emitter current path; a third transistor Q5 that is supplied with a third current and causes a third current to flow through its collector-emitter current path; and a load L that is supplied with both the second and third currents.
and a second circuit that converts the change in the third current into a voltage, operates when the third current exceeds a predetermined value, and outputs a fourth current corresponding to the converted voltage. means R3, Q6; and the fourth current generated when the third current exceeds a predetermined value is caused to flow through the series circuit, and the emitter of the first transistor is reverse biased so that the first transistor An overcurrent limiting circuit comprising: means for reducing output current;