JPH0316498A - Address assigner - Google Patents

Abstract

PURPOSE: To save a memory by using a single subroutine for extracting all data stored in an optional one of plural matrixes and changing the single subroutine by adding the start position of a required matrix so as to address an indivisual matrix. CONSTITUTION: A controller 100 receives a clock signal for setting up the timing of various functions of the controller 100 itself from a clock oscillator 110. In a learning mode, an IR receiver 140 receives and IR signal transmitted from an emulated remote control hand unit and supplies digital data expressing the IR signal to the controller 100. The controller 100 stores 'raw' (i.e., uncompressed) data in a general memory 122. When the transmission of a remote control signal for a command is required in a normal remote control mode, the controller 100 decompresses a stored code and sends the code to an output unit 160.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is useful in programmable remote control transmitters for consumer electronic products such as video cassette recorders, cable converters, video disc players, and television receivers. Concerning memory saving configurations.

BACKGROUND OF THE INVENTION Infrared (IR) I for use in consumer electronic products
7. The tendency to use multi-brand universal remote control hand units as remote control devices to control any one of a number of electronic products manufactured by different manufacturers and each using different remote control signal code formats. It is in. A versatile remote control hand unit provides the user with the convenience of only having to use a single remote control hand unit while providing most, if not all, of the functionality of a consumer electronic product. can be controlled.

One Universal Remote Control The number of different functions and different remote control command signal formats that a hand unit can handle is highly dependent on the amount of memory available for remote control code storage.

There are two basic types of universal remote control hand units. Random access ●Memory (
RAM-based systems often have “learning”
It is called a remote control hand unit. This type of remote control hand unit allows you to perform the desired functions of the U-Il+'-6D original hand unit.
K"[,!tru" is necessary. This is usually ``learning''
Switch the remote control hand unit to ``Learning Mode'', and select the hand unit color in which the ``$X'' remote control hand unit is trained.
This is done by physically facing these two hand units so that they can receive the R transmission. This learning process begins as an information storage process.
R transmissions are recorded as they are received by the learning remote control unit. After this initial "raw" data storage, the raw data is analyzed and compressed, and then the final compressed form of this data is stored in RAM.

When used in remote control mode to send a hand unit command, the stored compressed code is read from memory and decompressed (uncompressed) (return) and the resulting signal is transmitted.

A read-only memory (ROM)-based system consists of a fixed set of devices, usually a television set (TV).
), video cassette recorders (VCR) b and cable converters. In this type of end unit, all different code formats must be preprogrammed for all functions of each device to be controlled. 1.The remote control code is
It is usually compressed in some way to occupy as little memory space as possible.

Since memory space is limited, for each compression method, the more efficient the compression method, the more functions can be stored. Another way to save memory space is to reduce the number of program instructions needed to address memory by providing efficient routines for addressing memory. The present invention is directed to this purpose, and in particular the so-called
Index address specification "' (indexed - add
It is related to saving memory space when the ``ressing'' is used.

In microprocessor software, the use of duck matrices (i.e., groups of memory locations) is quite common, and is usually used for lookup table buttons and/or data tables. In fact, look-up tables and data tables are so commonplace that most microprocessors have only one index register (INDTX register) that can be used to access data indirectly.
Contains.

For example, if X=8 and the pointer (POINTER) is the starting point (in memory) of the data table, then LDA POINTER. X retrieves the 8th byte after POINTER in memory and stores it in an accumulator. That is, LDAPO
INTER, be. Although this is a very effective method, it requires a large memory section to address each individual matrix.

SUMMARY OF THE INVENTION It is understood that a single subroutine is used to retrieve all data stored in any of the multiple matrices. To address individual matrices, a single subroutine is modified to add the starting positions of the desired matrices. Data regarding the starting position is stored in a table.

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a device suitable for use in a learning type remote control hand unit of the type previously described. Controller 100 may be a microprocessor (as used herein, the terms microprocessor and microcomputer are interchangeable).

Controller 100 receives clock signals from clock oscillator 110 that set the timing of various functions of controller 100. The controller 100 may or may not reside within the controller 100 according to programmed instructions! Address 20. memory 1
20 is a general purpose (1 or scratch pad) area 122
and a data area 124. 1. Controller 1
00 is number keys 0-9, channel azo key
A channel down key from a group of keys 132, including a power on/off key, receives data entered by the user into the keypad 130. keyboard 1
30 may also include a switch 134 for initiating a ``learning mode'' (described below). It may also be a separate toggle switch located elsewhere. In the embodiment of FIG. Now, pressing key 134 twice returns the remote control hunt unit to the normal remote control mode in which user commands are sent to the controllable device.

When in the learning mode, IR receiver 140 receives IR signals transmitted by the Emirate Sarel remote control hand unit and provides digital data representative of these IR signals to controller 100. The controller 100 stores the raw (i.e., uncompressed) data in general purpose memory 122. The raw data is then compressed and stored for later retrieval. An example of a remote control device for compression is disclosed in U.S. Pat. No. 4,623,887 to Welles II.

In the normal remote control mode, when it is desired to transmit a remote control signal for a command, the controller 100 decompresses the stored code and bursts the resulting decompressed code for transmission. It is sent to an output unit 160 which assembles the proper sequence of spaces. The clock oscillator 110 is connected to a frequency divider 1 which provides a lower frequency signal to the output unit 160.
50 with a clock signal. These low frequency signals form the burst component of the data stream that is provided to the IR diode 170 for transmission.

Alternatively, frequency divider 150 can be omitted and the siburst pulses are generated by controller 100 by rapidly "toggling" the output.

In a ROM-based system, compression is not performed and R
This is done previously at the factory to generate the compression control code that is stored in the OM.

In this case, the IR receiver 140 and the "Learn Mode 1" key 134 can be omitted from the lJ remote control hand unit.

Individual instructions for each device to be controlled are stored in respective locations in memory. Figure 2 shows the table (i.e.
1 shows a number of memory locations grouped into a one-dimensional matrix (one-dimensional matrix). Each glue f215, 225, 23 in Figure 2
5 is shown as having 256 locations, each group may have any number of locations up to 256 (the 256 location limit is explained below). Please understand that you may receive a refund. It is often convenient for programmers to organize groups of memory locations containing related data into multidimensional matrices. FIG. 3 shows a two-dimensional matrix in which storage locations are organized into columns and rows (ie, a two-dimensional matrix).

FIG. 5 shows a three-dimensional matrix made up of memories called unidirectional memories because the memory organization visually resembles the pages of a book.

Like reference numerals in FIGS. 2 and 3 indicate elements having similar functions. Therefore, only FIG. 3 will be described in detail. As shown in Figure 3, the matrix (3
1 5 , 325 , 335 ) are addressed by individual subroutines ( 310 , 320 , 330 ), as indicated by the dotted lines between each subroutine and each column. These subroutines use an index pointer method to address individual rows within a column. The pointer is the starting address of the desired column (AO, BO, C
O). The index value is stored in a register located within the microcomputer. This renostar is known as the X register. The value stored in the X register is a pointer.
It is added to the value contained in Re zosta to become the final address of the desired storage location.

Since the X register has a length of 8 pits, it can hold a value of 2551. Therefore, the value of the pointer renoster is "offset" by the additional storage location at 2551.
(offset). For small matrices,
Even with several dimensions, a single 8-bit index register poses no problem.

For a multidimensional matrix M (i, j, k, ...) 1 < 2** ni + j <2**" j
t k<2**rk'”'ni+nj tennk+・
. ) M can be allocated by bit mapping the index register as follows.

nbits+ nJbfts + nkbits +
-l As an example, in the above formula, -1,'' represents the number of individual columns of the matrix, ``j'' represents the number of individual rows of the matrix, and ``k'' (as shown in Figure 5). ) can represent individual pages in columns and rows.

Therefore, any multidimensional matrix of iXjXkX...<=2 5 6 bytes can be processed by considering it as a one-dimensional matrix and using the index register directly. Although not necessarily the most efficient way to process this type of matrix, this method is well known and often used. For larger matrices, i.e. ni+nj+nk+...
->8, another addressing method must be used.

Some types of matrices, called irregular matrices, have a range of elements (e.g. elements jo to io -
j4, the element joj+ for it, the element jo5t for iz, etc.) are used. An example of such an irregular IJ box is shown in Figure 3a. Allocating memory for every unused byte in such a matrix means that a large portion of memory space is wasted. A typical way to address an irregular matrix is to send a row index to a column-one-indexed subroutine that retrieves the data. This can best be illustrated by an example.

For example, in FIG. 3a, memory location I2 DATA5 (memory element i = 2 + j = 5, where M(i<4,
The following subroutine (written in assembly language for the Motorola 6805 microprocessor) can be used to retrieve the data bytes stored in the microprocessor 6805 (j < 8)). IQ DA for those skilled in the art
It can be seen that TA is a 16-bit pointer to the beginning of the data table. Or IO DA
TA is the first location 1 in the matrix of memory locations
It can also be considered as a label representing a 16-bit address of 0 DATA O.

In the above example, the individual subroutines, 10 GE
T, IIGET, Kayo, and I2GET are used to retrieve data from each matrix. For simplicity, a similar fourth subroutine I3GET is not shown. These individual subroutines are designated by reference numerals 3ioa, 320a, 330a, and 340a, respectively, in FIG. 3a. Each of these individual subroutines is stored in ROM and is 5 bytes long. Since each subroutine is stored in ROM and each subroutine cannot be changed, the 16 bits of each addressed column
address (e.g. HIGH ADORESS OFI
O DATA O, LOWADDRESS OF
Note that it must contain IO DATA O).

The routine shown above is a part of the program that calculates the numerical value of the index (that is, the pointer to the desired column) and the destination address of the microcomputer in order to retrieve the desired data.
Enter E. The IQGET subroutine is located in the memory location IOG.
It starts with ET+O.

The IIGET subroutine is IO GET+. Starting from 5. Similarly, the I2GET subroutine is IOGE
Starting from T+10. In order to accurately jump to the correct subroutine to retrieve the desired data, the index must be multiplied by 5, as shown in the GET VALUE routine shown above. ZO GET,
3 bytes of the 5 bytes of each subroutine such as I I GET, T2 GET (TAX, LDA
, RTS) are identical and repeated in each subroutine. For such small matrices, this method is extremely inefficient. However, for larger tables, this method has been used to avoid wasting large amounts of memory.

This method is I INDEX (=51 (5X51 is 25
5, which is the largest value that can be stored in the 8-pit X register), otherwise column jumping cannot be performed accurately.

Although this method references the IJ box using a fairly large index, the code required to implement it grows very quickly over a large number of lines. As mentioned earlier,
This method only applies to matrices smaller than 51 columns and 256 rows. The apparatus and methods described herein remove these limitations.

The apparatus according to the invention uses one general purpose subroutine to retrieve data from all columns, instead of using indexed column subroutines to retrieve the desired row data.

Next, the present invention will be explained with reference to FIG. All subroutines with indexed columns have the same size and format as described above.

TAX ; FETCH Rcyu
xNDyWhen initialized according to the present invention, this general purpose sub-fetch (FETCH) 450 is RO
M400, stored opcode by opcode as a single subroutine 420 in RAM 410, and accessed in the following manner.

FETCH:LDA COLIJMN. X; FET
CH DATAARTS; RETURN
To CALLER WITHDATARAM space, this is defined as follows.

FETCH: LDAOPCODE DB 1 ; IDAO
P■DE Ple crazy! D HET's HIGH INDX
DB 1; HIGH BYTE OF
COLtJMN ADDRESSLQV INDX
DB 1 ; IIJJJ BYTE OF
COLtJMN ADDRESS RTS OPCOD
E DB I; RTS OPCODE P
LA (JD Byte LDA OPC in HERERAM
The ODE button and RTS OPCODE are initialized to correct the opcode for each individual microprocessor before this routine is called, and their values do not change thereafter. That is, storage location LDA
OPCODE contains a code byte that causes the controller to read one byte of data stored in the memory location whose address immediately follows the instruction offset by the value stored in the X register when executed. can be entered.

The FETCH routine is first read from ROM and R
When stored in AM, storage locations HIGH INDX and L (71M-INDX may contain meaningless data stored there. Storage location HI
The data in GH INDX and LOW INDX indicate the beginning of each box (i.e., group of memory locations) where the desired data is stored. Correct data is written to these locations as follows.

The FETCH subroutine uses a table of contiguously stored addresses called column pointers (COLt
JMN PTR ) 4 4 0 and access the memory locations HIGH INDX and L, (FIIV rNDX K
Store column pointer.

IO DATA, I l-DATA, etc. are 16-bit addresses. b1 High-order 8 of the address that occurs first
Stored as two 8-bit bytes with pits. Since each of these addresses is 2 bytes long, I
The address of O DATA is the memory location COLUMN P
Starting from TR + O, I I DATA address is COLUMN PTR + 1 starting from 2, I 2
DATA addresses start from COLUMN PTR + 4 and 1. Therefore, in order to accurately access the correct address to retrieve the desired data, the index must be
is multiplied.

According to this method, the column at 128 (0-127) t and 25
Each call can be made to a matrix with 6 (0-255) t rows, and the memory required to do so is fleetingly small. The limit of 128 columns is O-127 columns x 2
bytes (for each), the last count of which is equal to 255, and this highest value can be stored in an 8-bit X renostar. This expanded data access functionality is obtained at the small cost of adding ROM-based code that initializes the "program" RAM with the appropriate code.

The extra bytes in the GET VALUE routine are I
Note that it is reserved to remove the NCX instruction and change the instruction immediately preceding STA LOWJNDX to LDA COLUMN PTR + 1,X.

If desired, a matrix of size 256 columns by 256 rows can be addressed by modifying the fcf program shown above as shown below.

In this example, the high and low bytes of the column pointer are
As shown in Figure 6, a separate table (HI CO
L PTR and L O COL PTR ).

Both tables are indexed by the same value stored in the X register. Therefore, there is no need to multiply the index value by 2 to "jump over the lower byte by 1" as in the previous example.2
Because there is no need to multiply , all 256 addressable storage locations can be used to store the starting location of the matrix.

Although the present invention has been described with reference to the embodiment of the remote control hand unit Kl, the scope of the present invention is not limited thereto.

[Brief explanation of drawings]

FIG. 1 shows in block diagram form a remote control hand unit of the learning remote control type in which the present invention is embodied. FIG. 2 shows in block diagram form a known arrangement of storage locations in a read-only memory IJ (ROM). FIG. 3 shows another configuration of the ROM shown in FIG. 2 in block diagram form. FIG. 3a shows, in block diagram form, an example of an irregular matrix of storage locations. FIG. 4 depicts in block diagram form one embodiment of the present invention. FIG. 5 shows a known arrangement for "page" memory. FIG. 6 depicts in block diagram form one embodiment of the present invention. lOO...controller, 120...memory, 130...
・Keypad, 400...Read-only memory (RO
M), 410...RAM, 4 2 0...subroutine, 440...table consisting of addresses, 45
0...General-purpose subroutine, 600...ROM, 61
0... RAM, 6 4 0, 642... Table consisting of addresses, 650... General purpose subroutine. Kaya 2 map RO gate car Mu Kaya 5 map Kaya 6 map

Claims (1)

[Claims] (1) A memory means comprising a ROM area containing program instructions stored as data and a plurality of memory locations arranged in a plurality of groups, said data consisting of an address of each starting location of said group. the memory means; a RAM area; and the ROM area and the RAM area are coupled to read the program instructions stored as data from the ROM area, store the program instructions in the RAM area, and read the address from the ROM area. modifying the data stored in the RAM area by reading and storing the respective starting addresses of the group to form executable instructions; and executing the instructions in the RAM area to access the storage location of the group. and control means for accessing the memory used in the remote control unit.