JPH0316358U - - Google Patents

Info

Publication number
JPH0316358U
JPH0316358U JP1989076553U JP7655389U JPH0316358U JP H0316358 U JPH0316358 U JP H0316358U JP 1989076553 U JP1989076553 U JP 1989076553U JP 7655389 U JP7655389 U JP 7655389U JP H0316358 U JPH0316358 U JP H0316358U
Authority
JP
Japan
Prior art keywords
semiconductor device
field effect
mos field
darlington
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989076553U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989076553U priority Critical patent/JPH0316358U/ja
Publication of JPH0316358U publication Critical patent/JPH0316358U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
JP1989076553U 1989-06-29 1989-06-29 Pending JPH0316358U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989076553U JPH0316358U (enExample) 1989-06-29 1989-06-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989076553U JPH0316358U (enExample) 1989-06-29 1989-06-29

Publications (1)

Publication Number Publication Date
JPH0316358U true JPH0316358U (enExample) 1991-02-19

Family

ID=31618128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989076553U Pending JPH0316358U (enExample) 1989-06-29 1989-06-29

Country Status (1)

Country Link
JP (1) JPH0316358U (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017092472A (ja) * 2015-11-10 2017-05-25 アナログ デバイシス グローバル Fet−バイポーラトランジスタの組み合わせ、およびこのようなfet−バイポーラトランジスタの組み合わせを備えたスイッチ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017092472A (ja) * 2015-11-10 2017-05-25 アナログ デバイシス グローバル Fet−バイポーラトランジスタの組み合わせ、およびこのようなfet−バイポーラトランジスタの組み合わせを備えたスイッチ

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