JPH03161953A - Conversion method of layout pattern information of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To execute the conversion of a type without changing a pattern graphic by replacing an endpoint regarding specified type layout pattern information with a point at a position extended only a fixed distance and converting said information into another type information. CONSTITUTION:Regarding information using a line having the coordinate values of a plurality of (n) points P1-Pn and pattern width W and tying the points P1-Pn in order as a center line and defining a band-shaped layout pattern in width W, a type in which the endpoints P1 and Pn are located on the insides only at the distances of W/2 from the end section of the layout pattern respectively is converted into a type in which the endpoints P1 and Pn are positioned at the upper section of the end section of the layout pattern. Layout pattern information is prepared in which a segment P1P2 is extended to the point P1 side, a point P1' where the length of a segment P1P1' is brought to W/2 is taken onto the extension, a segment P(n-1)Pn is prolonged to the point Pn side, a point Pn' where the length of a segment PnPn' is brought to W/2 is taken onto the extension of the segment P(n-1)Pn, and the point P1 is replaced with the point P1' and the point Pn with the point Pn' in the points P1-Pn.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method for converting layout pattern information of semiconductor integrated circuits, and in particular, to a method for converting layout pattern information of semiconductor integrated circuits, and in particular, a method for converting layout pattern information of semiconductor integrated circuits, and in particular, a method for converting layout pattern information between an "overlap" format and a "non-overlap format." Concerning how to perform mutual conversion.

[Conventional technology]

The wiring part of the mask pattern of a semiconductor integrated circuit generally consists of the coordinate values of a plurality of n points P1 to Pn and the pattern width W.
It is defined by layout pattern information consisting of. That is, a strip-shaped layout pattern having a width W is defined with the line sequentially connecting the points P1 to Pn as the center line. There are several forms of such definitions, but the most common forms are "with overlap" and "with no overlap". The "with overlap" format defines a figure such that the end points P1 and Pn are located inside the layout pattern edge by a distance of W/2, and the "no overlap" format defines the end points A figure is defined such that P1 and Pn are located on the edge of the layout pattern. In other words, when connecting two different layout patterns at their edges, in the "with overlap" format, both patterns overlap near the end point, whereas in the "no overlap" format, both patterns overlap with the end point as the boundary. Patterns are connected without overlap.

The "with overlap" format has the advantage that a reliable connection can be made even if the coordinates of the four end points of both patterns are slightly shifted, but since the overlapped portion protrudes,
Another drawback is that it may violate design rules. In the "no overlap" format, the exact opposite of this interest holds.

Therefore, at present, both formats are used depending on the purpose.

[Problem to be solved by the invention]

As mentioned above, at present, both the "with overlap" format and the "non-overlap format" are used, but a method for mutually converting the data formats between the two has not been established. In other words, even if the data is exactly the same, there are two types of pattern figures: one obtained when the data is interpreted as "with overlap" format, and the other when it is interpreted as "no overlap" format data. The shape itself is different. When changing only the data format without changing the defined pattern figure, it is necessary to change the data itself.

5 Therefore, the present invention provides a layout pattern information conversion method for semiconductor integrated circuits that allows mutual data conversion between an "overlap" format and a "non-overlap format" without changing the defined pattern figure. The purpose is to provide a method.

[Means to solve the problem]

(1> The first invention of the present application provides a plurality of n points P1 to Pn.
Regarding the layout pattern information that defines a strip-shaped layout pattern with a width W and a line sequentially connecting points P1 to Pn as the center line, the end point P
1 and Pn are respectively W from the layout pattern end.
/2 distance ("overlap" format), and the second format ("no overlap" format) where the end points P1 and Pn are located on the edges of the layout pattern. In a semiconductor integrated circuit layout pattern information conversion method that converts line segment P1P2 to point P
1 side, and on this extension line, line segment P I P 1'
The step of taking a point P1' such that the length of is W/2, and extending the line segment P(n-1.)Pn to the point Pn side, and on this extension line, the length of the line segment PnPn' is a step of taking a point Pn' such that W/2; and a step of setting point P1 to point P1' among a plurality of n points P1 to Pn;
Layout 1 in which point Pn is replaced with point Pn'.
The step of creating pattern information is performed.

(2> The second invention of the present application provides a plurality of n points P1 to Pn
Regarding the layout pattern information that defines a strip-shaped layout pattern with a width W and a line sequentially connecting points P1 to Pn as the center line, the end point P
1 and Pn are located on the edges of the layout pattern (the "no overlap" format), the end point P
1 and Pn are respectively W from the layout pattern end.
In the method for converting layout pattern information of a semiconductor integrated circuit into a second format ("with overlap" format) located inside by a distance W/2, a pattern located at a distance W/2 from a point P1 on a line segment P1P2 The point PL' and the line segment P
(n-1) A step of determining whether it is possible to take a point Pn' located at a distance W/2 from point Pn on Pn, and a step of determining whether it is possible to take both points P1' and Pn'. If it is determined that it is possible, among the plurality of n points P1 to Pn,
A step of creating layout pattern information in which point P1 is replaced with point P1' and point Pn is replaced with point Pn', and when it is determined that at least one of point P1' or point Pn' cannot be taken. , the step of creating boundary information that defines the outline of the layout pattern, and the following steps.

[For production]

({) According to the first invention of the present application, the end point P for the layout pattern information in the "overlap" format
1 and Pn are replaced with points P1' and Pn' at positions extended by a distance of W/2, respectively, and converted to "no overlap" format information, without changing the pattern geometry. Format conversion can be performed.

(2) According to the second invention of the present application, the end point P for layout pattern information in the “no overlap” format
1 and Pn are replaced with points P1' and Pn', which are located inside by a distance of W/2, respectively, and converted into information in the form of "overlap". In this case, since the outline of the pattern figure is converted into boundary information that defines it, the format can be converted without changing the pattern figure.

[Example] The present invention will be described below based on an illustrated example. 1st
The figure is a flowchart showing the procedure of a method for converting data from a format with "overlap" to a format with "no overlap" according to the first invention of the present application, and FIG. From non-copy format to “with overlap”
2 is a flowchart showing the steps of a method for converting data into the format of . Before explaining these steps, an example is shown in Figure 3 that shows the difference between the definition of a pattern figure in the format of "overlap 9, no overlap" and the definition of a pattern shape in the format of "overlap". The explanation will be based on. FIG. 3(a) is a diagram showing a definition in the form of "no overlap", and according to the definition of this form, two points P1 and P2
A pattern figure shown by a solid line is defined by the coordinate values and the width W.

That is, a strip-shaped layout pattern with a width W is defined with the line segment (broken line in the figure) connecting the two points P1P2 as the center line. End points P1 and P2 are located on the ends of the pattern figure. On the other hand, FIG. 3(b) is a diagram showing a definition in the form of "overlap", and according to this form of definition, the coordinate values and width W of the two points P1 and P2 are used to form a solid line. The pattern figure shown is defined. That is, a strip-shaped layout pattern with a width W is defined with the line segment (broken line in the figure) connecting the two points P1P2 as the center line. However, the end points P1 and P2 are located inside by a distance of W/2 from the end of the pattern figure. In this way, although the same pattern figure 10 is defined, the coordinate values of the two points Pi and P2 in Fig. 3(a) and the two points P in Fig. 3(b) are
The coordinate values of I and P2 are different from each other.

Embodiment of the first invention of the present application Introduction An embodiment of the first invention of the present application, that is, FIG.
A method of converting data in the "with overlap" format shown in b) into data in the "no overlap" format shown in FIG. 1(a) will be explained based on the flowchart in FIG.

Here, a plurality of n points P1 to Pn as shown in FIG.
A layout pattern defined by a coordinate value of (r+=8 in this example) and a pattern width W will be explained as an example.

12A shows points P1 to Pn in the "with overlap" format before conversion, and FIG. 11B shows points P1 to Pn in the "no overlap" format after conversion.

First, in step 311, line segment P1P2 is set to point P1
On the line extended to the side, the distance of P I P 1' is W/
2, and then in step S12
, the distance of PnPn' is W/2 on the line extending the line segment P(n-1)Pn to the 11 point Pn side.
Take a point Pn' such that As shown in Figure 5,
These points P1' and Pn' are both points on the outline of the end of the pattern figure.

Therefore, in step 313, point P1 is replaced with point P1', point Pn is replaced with point Pn', and the original data points PL, P2, ..., P(n-1), P
Instead of the coordinate values of n, the points Pl', P2,...,P
(n-1), new data having coordinate values of Pn' is generated. If this new data is recognized as a format with no overlap, it becomes equivalent to the definition shown in Figure 4(b).In other words, without changing the defined pattern shape, it is possible to This means that the format data has been converted to "no overlap" format data.

Embodiment of the second invention of the present application Next, an embodiment of the second invention of the present application, that is, FIG.
A method of converting the data in the "no overlap" format shown in a) into the data in the "with overlap" format shown in FIG. 2(b) will be explained based on the flowchart 12 in FIG.

In the example shown in FIG. 4 above, FIG. 4(b) is “
Points P1 to Pn in the no-overlap format are shown, and (a) shows the point P1 in the "overlap" format after conversion.
~Pn.

First, in steps 321 to 323, various judgments are made regarding the data before conversion. These steps are performed for the purpose of determining whether it is appropriate to perform the processing from step 324 onwards, and will be explained later. In step S24, a point P1' is placed on the line segment P1P2 at a distance W/2 from the point P1, and in the subsequent step 325, a point P1' is placed on the line segment P(n-1)Pn at a distance W/2 from the point Pn.
An operation is performed to find the point Pn'. As shown in FIG. 6, these points P1' and Pn' are both located inside by W/2 from the end of the pattern figure. Therefore, in step S26, point P1 is changed to point PL',
Replace the point Pn with the point Pn' and obtain the original data points Pi, P2,...+ P (n 1)+
Instead of the coordinate values of Pn, new data having the coordinate values of points 13 PL', P2, -, P (n-1), Pn' is generated. If this new data is recognized as an "overlap" format, it becomes equivalent to the definition shown in FIG. 4(a). In other words, data in the "non-overlap" format is converted to data in the "with overlap" format without changing the defined pattern figure.

However, in some cases, the above procedure may not be possible. An example of this is shown in FIG. In this case, it is possible to take point P' in step S24, but it is impossible to take point Pn' in step S25. Because the length of the line segment P(n-1)Pn is W
This is because the point Pn' cannot be taken on this line segment because it is shorter than /2. Step S22 and Step S
The judgment in 23 is as follows: point P1' or point P
This is nothing but a judgment as to whether or not it is possible to take n'. That is, in step S22, P1
If P2>W/2, the point P1' can be taken as 14, and in step 323, P(n-l)
If Pn>W/2, point Pn' can be taken.

If a negative judgment is made in any of these steps,
At least one of point P1' or point Pn' cannot be taken, and the procedure of step S27 is performed instead of the procedure from step 324 onward. Step S2
In step 7, the original data is changed to boundary data. Here, the boundary data is data that defines the contour of a pattern figure, and as shown in FIG. 8, the vertices Q on the contour line. This is data consisting of coordinate values of ~Q10. Therefore, in this case, a plurality of points P1 to P shown in FIG.
Data in the "non-overlap format" consisting of the coordinate value of n and the pattern width W is the data of multiple vertices Q1 to Q shown in FIG.
It is changed to boundary data consisting of IO coordinate values.

Boundary data can be used for both data in the "no overlap" format and data in the "with overlap" format.
No problem arises because they can be used in combination.

15 As a more special case, when there are only two points (n
-2), it is necessary to perform the determination in step 828 instead of the determinations in steps S22 and S23. For example, in the case of a pattern as shown in FIG.
If the distance between the two is L, then W > L > W/2, so a positive determination is made in both step S22 and step S23, but it is not appropriate to perform the steps from step 524 onwards. In such a case, step 32
If the distance between the points P1 and P2 is not greater than W, the boundary data is changed to the boundary data in step S27. As a result, as shown in FIG. 10, boundary data consisting of the coordinate values of vertices Q1 to Q4 is generated.

〔Effect of the invention〕

(L) As described above, according to the first invention of the present application, the end points P1 and Pn for the layout pattern information in the "overlap" format are each extended by a distance of 16 W/2. Since the information is converted into "no overlap" format information by replacing P1' and Pn', the format can be converted without changing the pattern figure.

(2> As described above, according to the second invention of the present application, the end points P1 and Pn for the layout pattern information in the "no overlap" format are changed to the points Pl' and Pn located inside by a distance of W/2, respectively. Replace Pn' with "
Convert the information to "with overlap" format,
If such replacement is not possible, the contour of the pattern figure is converted into boundary information that defines it, so that the format can be converted without changing the pattern figure.

[Brief explanation of the drawing]

FIG. 1 is a flowchart showing the steps of a method for converting layout pattern information of a semiconductor integrated circuit according to the first invention of the present application, and FIG. 2 is a flowchart showing the steps of a method of converting layout pattern information of a semiconductor integrated circuit according to the second invention of the present application. FIG. 3(a) is a flowchart showing an example of a pattern defined in the "no overlap" format, and FIG. 3(b) is a flowchart showing "no overlap".
FIG. 4(a) is a diagram showing an example of a pattern defined in the format "with overlap", and FIG. 4(b) is a diagram showing an example of the pattern defined in the format "with overlap". FIG. 5 is a diagram showing an example of a pattern defined in a non-overlapping format; FIG. 5 is a diagram illustrating a method for converting the data shown in FIG.
The figure is a diagram explaining a method of converting the data shown in FIG. 4(b) to the data shown in FIG. 4(a), and FIG. FIG. 8 is a diagram showing boundary data generated for the pattern shown in FIG. 7. FIG. 9 is a diagram showing an example of the boundary data generated for the pattern shown in FIG. FIG. 10 is a diagram showing an example of a pattern shown in FIG. 9, and is a diagram showing boundary data generated for the pattern shown in FIG. 1 8 Pl. , P2, ---, P (n-1), Pn... Points that define the layout pattern, pi', Pn...
- Replacement point, W...pattern width, Q1 to Q10...points that constitute boundary data.

Claims (2)

[Claims] (1) Coordinate values and pattern width W of multiple n points P1 to Pn
Regarding the layout pattern information that defines a strip-like layout pattern of width W with the line sequentially connecting points P1 to Pn as the center line, the end points P1 and Pn are each located inside by a distance of W/2 from the end of the layout pattern. A method of converting from a first format where the end points P1 and Pn are located on the end of the layout pattern to a second format where the end points P1 and Pn are located on the end of the layout pattern. The step of taking a point P1' such that the length of the segment P1P1' is W/2, and extending the line segment P(n-1)Pn to the point Pn side, and on this extension line, the length of the line segment PnPn' is Point P such that the length is W/2
n', and converting point P1 to point P1' among the plurality of n points P1 to Pn;
A method for converting layout pattern information for a semiconductor integrated circuit, comprising the step of creating layout pattern information in which point Pn is replaced with point Pn'. (2) Coordinate values and pattern width W of multiple n points P1 to Pn
For layout pattern information that defines a strip-shaped layout pattern of width W with a line sequentially connecting points P1 to Pn as the center line, from a first format in which end points P1 and Pn are located on the end of the layout pattern, End point P1
and Pn are respectively W/ from the layout pattern end.
A method of converting to a second format in which the point P is located at a distance W/2 from the point P1 on the line segment P1P2.
1' and the distance W/ from point Pn on line segment P(n-1)Pn.
a step of determining whether it is possible to take the point Pn' located at 2; and a step of determining whether it is possible to take the point Pn' located at A step of creating layout pattern information in which point P1 is replaced with point P1' and point Pn is replaced with point Pn' among ~Pn, and determining that at least one of point P1' or point Pn' cannot be taken. 1. A method for converting layout pattern information for a semiconductor integrated circuit, comprising the steps of: creating boundary information that defines an outline of a layout pattern when a layout pattern is selected.