JPH0316124A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a film whose resistance is low and whose coverage is good by a method wherein, after a contact hole has been formed once, tungsten is applied to the whole surface, the whole surface is then dry-etched and the tungsten is left inside the contact hole. CONSTITUTION:After a contact hole 10 has been made, an end-part protective film 9 is formed on the whole surface. This protective film 9 can be formed of an insulating film such as an SiO2 film, an Si3N4 film or the like, a semiconductor film of polycrystalline Si or the like, a silicide film of Mo, W or the like, or e hard-to-melt metal such as Mo, W or the like. After that, the metal of the protective film 9 is etched by a dry-etching operation using e gas as a main component; an end-part protective film 9-1 is applied to an inner-wall face of the contact hole 10 in a self-aligned manner. Consequently, even when an electrode 8 is applied, the electrode 8 is not applied directly to an end part 7 of a diffusion layer 3. As a result, a junction leakage current is not increased at the end part 7 where the electrode 8 and the diffusion layer 3 are easily reacted. Thereby, when tungsten is used, the contact hole can be buried in such a way that a coverage is good.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to silicon LSIs and other semiconductor devices having a structure in which minute connection holes are filled with tungsten.

[Conventional technology]

Silicon LSI is commonly known as LOCOS (Local Oxida mouth on of Silicon).
A selective Finoredo oxide film formation method called on) is often used. A diffusion layer having a 4-electrode type different from that of the normal substrate is provided in a part of the field oxide film that is not exposed to N. Here, for convenience of explanation, it is assumed that the substrate is a p-type and the diffusion layer is an n-type. This diffusion layer is generally thin, particularly in LSIs, and is often, for example, 1 μm or less.

[Problem to be solved by the invention]

Electrodes, mainly AJ, are connected to this diffusion layer, but because the elements are minute, the conventional method has the following drawbacks.

That is, as shown in FIG. 1, the field oxidation M2 using LOCOSi provided on the silicon substrate and the KCVD method KJ on the diffusion layer 3 provided on the surface of the substrate:
7) P 8 G (Phos pho -8i1i
A glabellar insulating film 4 typified by Cate Glass) is applied. Furthermore, the glabellar insulating film 4 is removed and a resist film 5 is selectively applied to the portion of the glabella insulating film where the through hole is to be formed, that is, the portion other than the contact hole portion 6.

After that, the glabellar insulating film 4 is etched.

Etching methods include solution etching using an HF buffer solution, and reactive sputter etching using C, F, and gas plasma methods. At this time, as the device becomes finer, the contact hole 0 comes to substantially extend over the edge of the field oxide film 2, and as shown in FIG. The end portion and the surface portion of the diffusion layer 3 are scraped to form a thin layer portion 7 at the end of the diffusion layer.

Al! When the electrode 8, which is represented by , is deposited, the junction leakage t current increases at this portion. Also,
There is a problem of poor coverage inside the contact hole.

An object of the present invention is to provide a highly reliable semiconductor device.

[Means to solve the problem]

The above objective can be achieved by forming a contact hole, then depositing tungsten on the entire surface, and then dry etching the entire surface, thereby leaving tungsten inside the contact hole, thereby producing a semiconductor device having a structure. It will be done.

[Effect]

The present inventors have discovered that by using tungsten, contact holes can be filled with good coverage.

〔Example〕

Implement the present invention below? 1]. Third? As shown in FIG. 2, after forming the contact hole 10 shown in FIG. 2, an end protection film 9 is formed on the entire surface. This protective film 9 may be an insulating film such as 8i0■ or Si3N4 film, a semiconductor film such as each crystal 81, or a silicide film such as Mo or W.
Furthermore, metals that are difficult to bathe, such as Mo and W, can be used.

The film thickness is shown in an example of less than /2 of the dimension of the contact hole 10.

Here, we will show an example in which polycrystalline Si is used as the protective film 9. After coating the entire surface, the metal is etched by dry etching using a gas such as SF6 or CF4 as the main component, and as shown in FIG. Either the etching is finished when the protective film on the flat part is removed, or even if some remains, the etching is continued until the unnecessary part can be converted into an oxide film by oxidation. In this way, the end protection film 9-1 of polycrystalline Si is deposited on the inner wall side of the contact hole 10 in a self-aligned manner as shown in the figure. At this time, the thin layer portion 7 at the end of the diffusion layer is covered with the end protective film 9. Therefore, as shown in FIG. 5, even if the electrode 8, typically AJ, is deposited, the electrode 8 will not be directly exposed to the end 7 of the diffusion layer 3, so the t-pole 8 and There is no increase in junction leakage current at the edges of the diffusion layer 3 where reactions are likely to occur. At this time, if the polycrystalline Si9-1 is impurized with phosphorus or As in advance, or left at the end and then added with phosphorus or As by a well-known ion implantation method or thermal diffusion method, the sixth Even if an additional diffusion layer 11 is formed as shown in the figure, and a deep residual contact hole 2 is formed at the center of the contact hole 0 as shown in FIG. Since the thickness of the portion of the electrode 8 that contacts the diffusion layer 3 does not become smaller than the original thickness Xj of the diffusion layer, junction leakage can be suppressed.

Furthermore, in general, in dry etching, it is difficult for etching species to be co-supplied in the part of a minute groove, so even if the end protection film 9 is removed in a flat part as shown in FIG. 7, the remaining contact reaches the diffusion layer 3. Since the hole 12 may not be formed,
This characteristic of dry etching can be actively used.

In addition, in the description of the above embodiment, the dimension L of the contact hole 10 is
Although the case where the thickness of the end protective film is smaller than 1/2 of the above is shown, an example in which the thickness is larger is shown below. As shown in FIG. 8, when the end protective film 9 is deposited thicker than 1/2 of the dimension L of the contact hole 10, the contact hole 10 is almost filled and the surface of the protective film 9 becomes approximately flat. After that, when uniform etching is performed, as shown in FIG. 9, the remaining contact hole 12 as shown in FIGS. It remains in a shape that satisfies the following. In this case, since the electrode 8 deposited thereon does not directly contact the diffusion layer 3, it is necessary to use a conductive film instead of an insulating film as the end protection film 9.

By using tungsten, a film with low resistance and good coverage can be obtained.

Furthermore, in the embodiments described above, a method of contacting the diffusion layer on the surface of the sS+ substrate 1 was explained, but as shown in FIG.
The present invention can be similarly applied when contacting a person.

In other words, if the opening of the resist 5 is off from above the electrode [5], when etching the glabella insulating film 4, the Finoredo oxide M2 is etched away and a thin layer [3] is formed. When an electrode 8 represented by AJ is deposited on this thin layer,
Al! Contamination from other sources may enter, or the effective field oxide film thickness may become small, rendering device isolation useless.

If this part is filled with an insulating film to which the present invention is applied or various crystalline Si, etc., not only will the above-mentioned drawbacks be compensated for, but the electrode 8 will be
This can prevent the induction of amputation.

In addition, in the above description of the present invention, the field insulating film 2 is
Although an example in which the field insulating film is formed by the CO8 method has been shown, the present invention is not essentially concerned with any method for forming the field insulating film. For example, as shown in FIG. 11, after uniformly oxidizing the entire Si substrate to obtain a field oxide film 2, unnecessary portions are removed, and then a diffusion layer 3 is obtained. After roughly depositing the glabellar insulating film 4, a thin layer 13 on the field insulating film is formed to form a contact hole for field oxidation. When this is further etched, the thin layer part 13 disappears and 8
The electrode 8 represented by AJ is directly adhered to the i-substrate 1, which causes the above-mentioned drawbacks. In this case as well, the above-mentioned drawbacks can be eliminated by applying the end protection film 9-1 according to the present invention.

Furthermore, as shown in FIG. 12, a trench is formed in the Si substrate 1, and a field filling film 14 typified by a layer of SI02, Si3N, or polycrystalline Si, or a layered film of these, is embedded in the trench. The same applies if there is. By embedding the end protection film 9-1 in the thin layer end portion 7 of the diffusion layer according to the present invention, the above-mentioned drawbacks can be similarly eliminated.

Although the present invention has been described using the case of an n-type diffusion layer 3, a type in which the conductivity type of the impurity is opposite may be used.

Furthermore, the present invention does not limit the type of device. That is, the diffusion layer 3 may be the emitter, base, or collector of a bipolar transistor, or the source or drain of a MO8 transistor, or even a CMO transistor.
It is clear that this can also be done in wells such as S.

〔Effect of the invention〕

According to the invention, contacts for particularly high-density integrated circuits can be formed with high reliability, which in turn makes it possible to realize even higher-density integrated circuits.

[Brief explanation of the drawing]

Figures 1 and 2 are diagrams explaining the conventional electrode connection method;
3 to 12 are diagrams showing embodiments of the present invention. ]... Silicon substrate, 2... Field insulating film, 3... Diffusion layers 3, 4... Interlayer insulating film, 5... Resist film, 6...
Contact part, 7...Diffusion layer end thin layer part, 8...
... Electrode, 9 ... End protective film, 10 ...
...Contact hole, 11...Additional diffusion layer, 1
2...Remaining contact hole, 13...Field insulating film thin layer part,] 4...Field filling film, 遁4 Fig. 5 Tutomi Z Kunijima Z Kuchitomi 3 Zutomi 7 Figure 8 8 Danman9 Zutomi lρ ■ Release 11 Shuka 1z Mouth

Claims (1)

[Scope of Claims] 1. a semiconductor substrate, an impurity region formed in a predetermined region on the surface of the semiconductor substrate, an insulating film formed on the semiconductor substrate and having an opening above the impurity region; A semiconductor device comprising: a filler containing tungsten that is filled in the opening and has ohmic contact with the impurity region; and a conductive film having a desired shape and electrically connected to the filler. 2. The semiconductor substrate is made of Si, and the conductive film is made of Al.
The semiconductor device according to claim 1, wherein the semiconductor device is made of a metal mainly composed of. 3. The above impurity region is the source of the MOS transistor.
3. The semiconductor device according to claim 1, wherein the semiconductor device is a drain. 4. The semiconductor device according to claim 1 or 2, wherein the impurity region is an emitter, base, or collector of a bipolar transistor. 5. The semiconductor device according to claim 1 or 2, wherein the impurity region is a CMOS well.