JPH03158923A - Memory controller - Google Patents

Abstract

PURPOSE:To utilize a part of a semiconductor memory used by a file control program of an OS as a file of a high speed of a user program by providing a file artificial control circuit for bringing the semiconductor memory to access by an instruction procedure of a file controller. CONSTITUTION:When a file access instruction is outputted by a processor, this file access instruction is sent to a file artificial control circuit 2, and a memory control signal 13 is generated from the file access instruction. This memory control signal 13 is sent to a memory controller 4', an address signal conforming to this memory control signal 13 is outputted to a semiconductor memory 5', and from the semiconductor memory 5', data being an access object is read out. In such a way, it becomes unnecessary to store a file control program in the semiconductor memory and to execute it by a processor.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a memory control device for accessing files using a semiconductor memory of a personal computer.

(Prior Art) Conventionally, in personal computers and the like, a portion of semiconductor memory is used as a file.

FIG. 2 is a block diagram showing the configuration of a system to which a conventional memory control device is applied.

The illustrated system includes a processor 1, a memory controller 4, and a semiconductor memory 5.

The processor 1 processes data and controls various parts. Processor l receives memory control signal l
O is output to the memory controller 4.

The memory controller 4 receives a memory control signal 10
An address signal corresponding to the address specified by is output to the semiconductor memory 5.

The semiconductor memory 5 constitutes a RAM (random access memory) and stores data and programs. This semiconductor memory 5 sends data at the address indicated by the address signal from the memory controller 4 to the processor l via the data bus 11.

The semiconductor memory 5 stores a file control program 5a that controls file access.

Next, the operation of the above-described device will be explained.

When the processor 1 attempts to access a file on a magnetic disk, etc., the file control program 5
a is executed. File control program 5a
determines an address on the semiconductor memory 5 so that when the data to be accessed is on the semiconductor memory 5, the data is read from the semiconductor memory 5.

Then, a memory control signal 10 is output from the processor 1 to the memory controller 4. Thereby, the memory controller 4 reads the target data from the semiconductor memory 5.

In this way, when attempting to read data from the magnetic disk, if there is data on the semiconductor memory 5,
Data can be read from the semiconductor memory 5, thereby speeding up file access.

(Problems to be Solved by the Invention) However, the above-mentioned system has the following problems.

That is, since the data on the file is stored in a part of the semiconductor memory 5 which is the main memory, file access is different from conventional files (floppy disk device, hard disk device, etc.). It was necessary to assemble a file control program 5a exclusively for control. As a result, the program area of the O8 (operating system) of the semiconductor memory 5 increases, resulting in a problem that the usable space for user programs on the semiconductor memory 5 is limited.

The present invention has been made with attention to the above points, and is a memory control system that prevents an increase in the area in which an O8 program is stored on a semiconductor memory and prevents a user program from restricting the use of the semiconductor memory. The purpose is to provide a device.

(Means for Solving the Problems) A memory control device of the present invention includes a processor and a semiconductor memory, and the processor accesses the semiconductor memory using a memory control signal for accessing an external file. The present invention is characterized in that a file pseudo control circuit that is accessed by a command procedure of a file controller is provided, and the semiconductor memory is accessed by the file pseudo control circuit.

(Function) In the system described above, as shown in FIG. 1, when a file access command is output by the processor, this file access command is sent to the file pseudo control circuit 2 via the file pseudo control interface 12. It will be done. The file pseudo control circuit 2 generates a memory control signal 13 from a file access command. This memory control signal 13 is sent via the selector 3 to the memory controller 4'. The memory controller 4' outputs an address signal according to the memory control signal 13 to the semiconductor memory 5', thereby reading data to be accessed from the semiconductor memory 5'. Therefore, there is no need to store the file control program in the semiconductor memory and execute it on the processor, making it possible to expand the space used by the user program in the semiconductor memory and to shorten the time occupied by the processor when accessing files.

(Embodiment) FIG. 1 is a block diagram showing the configuration of a system to which a memory control device of the present invention is applied.

The illustrated system includes a processor 1', a file pseudo control circuit 2, a selector 3, a memory controller 4', and a semiconductor memory 5'.

The processor 1' processes data and controls various parts. The processor 1' sends the memory control signal 10' to the memory controller 4' via the selector 3.
Output to. Further, the processor 1' outputs a control signal to the file pseudo control circuit 2 via the file pseudo control ink face circuit 12. Further, the processor 1' inputs and outputs data to and from a data bus 11'.

The file pseudo control circuit 2 receives control signals from the processor 1' via the file pseudo control interface 12. Based on this control signal, the file pseudo control circuit 2 gains control of the data bus 11'. Then, the file pseudo control circuit 2 is
It receives file command program sequences from processor 1' via data bus 11'. A file instruction program sequence is a sequence of instructions for accessing a file configured on a magnetic disk. The file pseudo control circuit 2 reads this file command program sequence and determines the address on the semiconductor memory 5'. Then, the file pseudo control circuit 2 outputs the memory control signal 13 corresponding to the address on the semiconductor memory 5' to the memory controller 4' via the selector 3.

The selector 3 receives the memory control signal 10' output from the processor 1' or the file pseudo control circuit 2.
selects the memory control signal 13 output from the memory controller 4' and inputs it to the memory controller 4'.

The memory controller 4' receives a memory control signal 1
0' or an address signal corresponding to the address designated by the memory control signal 13 is output to the semiconductor memory 5'.

The semiconductor memory 5' is a RAM (Random Access Memory).
memory) and stores data and programs. This semiconductor memory 5' sends data at the address indicated by the address signal from the memory controller 4' to the processor 1' via the data bus 11'.

Next, the operation of the above-described device will be explained.

The processor 1 passes the file program instruction sequence to the file pseudo control circuit 2 by means of control signals via the file pseudo control interface 12 and the data bus 11'.

The file pseudo control circuit 2 reads this file program command sequence and transfers data via the data bus 11'. In this data transfer, the file pseudo control circuit 2 first obtains control of the data bus 11' by a control signal sent by the processor 1 via the file pseudo control interface 12, and then transfers data from the file pseudo control circuit 2 to the selector 3. memory control signals 1 and 3 are selected.

Then, the data in the semiconductor memory 5' is read out and stored in a register in the file pseudo control circuit 2. Next, the data in the register is set in the read area designated by the processor 1.

When the read area and the number of data transfers are equal to the number of data transfers obtained by decoding the file command sequence, the file pseudo control circuit 2
Similar to the conventional file control program 5a shown in FIG. 2, an interrupt is generated to the processor 1' and the processing is terminated.

In this way, the processor 1 can access data in the semiconductor memory 5' in the same way as a normal file made of a magnetic disk or the like.

Note that the present invention is not limited to the embodiments described above.

For example, if the semiconductor memory 5' is configured with a battery backup memory or the like, data contents can be retained even when the system power is turned off, similar to a disk medium.

(Effects of the Invention) As explained above, the memory control device of the present invention is provided with a file pseudo control circuit that accesses the semiconductor memory according to the command procedure of the file controller. A part of the file can be used as a high-speed file for the user program, and the throughput of the user program can be improved. In addition, if a battery backup memory is used as a semiconductor memory, data can be retained even when the system power is turned off, and high-speed files can be constructed with ease of use similar to that of disk media.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a system to which a memory control device of the present invention is applied, and FIG. 2 is a block diagram showing the configuration of a system to which a conventional memory control device is applied. 1.1'... Processor, 2... File pseudo control circuit, 3... Selector, 4.4'... Memory controller, 5.5'.
...Semiconductor memory, 10.10' 13...Memory control signal, 11.11'...Data bus, 12...File pseudo control interface.

Claims (1)

[Claims] A device comprising a processor and a semiconductor memory, wherein the processor accesses the semiconductor memory using a memory control signal for accessing an external file, wherein the semiconductor memory is accessed by a command procedure of a file controller. 1. A memory control device, comprising: a circuit, and the semiconductor memory is accessed by the file pseudo control circuit.