JPH03139785A - Memory card interface circuit - Google Patents

Abstract

PURPOSE:To obtain a memory card of simple composition by comprising a memory card control circuit of a memory card insertion detection circuit and a wait signal generation circuit, and connecting it to a microprocessor. CONSTITUTION:A device is comprised of the microprocessor 20, a memory card connector 21, the memory card 22, and the memory card control circuit 23, and the processor 20 is directly connected to the connector 21. Also, a memory card detection signal CIN from the connector 21 is inputted to the control circuit 23, and a CPU wait signal CWAIT outputted from the control circuit 23 is directly connected to the wait input terminal WAIT of the processor 20. The control circuit 23 is comprised of the memory card insertion detection circuit 23a and the wait signal generation circuit 23b, and the detection circuit 23a detects the memory card detection signal CIN from the connector 21, and starts up the signal generation circuit 23b. The signal generation circuit 23b generates the signal CWAIT, and makes the processor 20 perform wait processing. In such a way, it is possible to obtain the memory card 22 with simple composition.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an interface circuit between a memory card and a microprocessor.

2. Description of the Related Art Conventionally, as shown in FIG. 4, a memory card interface circuit includes a microprocessor 10, a memory card connector 11, a memory card 12, a first unidirectional tristate buffer 13, and a second unidirectional tristate buffer. 14, a bidirectional tri-state buffer 15, a data bus direction control circuit 16, and a memory card insertion detection circuit 17. A first unidirectional tri-state buffer 13 and a second unidirectional tri-state buffer 14 are inserted between the address bus 10a and bus control signal 10b of the microprocessor 10 and the memory card connector 11, and a memory card insertion detection circuit is inserted. The two unidirectional tri-state buffer gates G are opened and closed by the memory card insertion signal CARD outputted from the memory card insertion signal CARD 17. Further, a bidirectional tri-state buffer 15 is inserted between the data bus 10c of the microprocessor 10 and the memory card connector 11, and the bi-directional tri-state buffer 15 is inserted into the bi-directional tri-state buffer by the memory card insertion signal CARD output from the memory card insertion detection circuit 17. The gate G of the buffer is opened and closed, and the data transmission direction of the bidirectional tri-state buffer is switched by the data bus direction control signal DIR output from the data bus direction control circuit 16.

With the above configuration, the first unidirectional tri-state buffer 13 and the 2 unidirectional tri-state buffers 14 and bi-directional tri-state buffers 15 to prevent malfunctions of the microprocessor 10 due to contact sliding noise.

Problems to be Solved by the Invention In the configuration of the conventional example described above, the first unidirectional tristate buffer 13, the second unidirectional tristate buffer 14, the bidirectional tristate buffer 15, the data bus direction control circuit 16, and Memory card insertion detection circuit 1
It requires a large number of IC chips such as 7 and complicated circuits,
This is a major impediment to miniaturization and cost reduction of devices.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a memory card with a simple configuration that does not require a large number of parts unlike the conventional ones.

Means for Solving the Problems In order to solve the above problems, the present invention provides a memory card connector and a memory card control circuit, directly connects the microprocessor to be interfaced with the memory card, and connects the memory card control circuit to the memory card. It consists of an insertion detection circuit and a wait signal generation circuit, and is coupled to a microprocessor.

Effect By adopting the above configuration, there is no need for a large number of tri-state buffers between the microprocessor and the memory card connector, and there is no need for a complicated data bus direction control circuit, etc., making the memory card interface extremely easy to use. It has a simple configuration.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 3.

[Example 1] FIG. 1 is a block diagram of a first embodiment of the present invention.

This embodiment is composed of a microprocessor 20, a memory card connector 21, a memory card 22, and a memory card control circuit 23.
and memory card connector 21 are directly connected. Also,
A memory card detection signal CIN from the memory card connector 21 is input to the memory card control circuit 23. Further, the CPU wait signal CWAIT output from the memory card control circuit 23 is directly connected to the wait input terminal WAIT of the microprocessor 20. The memory card control circuit 23 includes a memory card insertion detection circuit 23a1.
and a wait signal generation circuit 23b,
The memory card insertion detection circuit 23a detects the memory card detection signal CIN from the memory card connector 21 and activates the wait signal generation circuit 23b. The wait signal generation circuit 23b generates a CPU wait signal CWAIT and causes the microprocessor 20 to perform wait processing.

When the memory card 22 is inserted into the memory card connector 21, the memory card insertion detection circuit 23a detects the memory card detection signal CIN, and the wait signal generation circuit 23a detects the memory card detection signal CIN.
The CPU weight request compensation signal WREQ is sent to b. The wait signal generation circuit 23b generates the wait request signal WRE.
Q and sends a CPU wait signal (JAIT) to the microprocessor 20. This JAIT signal satisfies the timing conditions for starting the wait cycle of the microprocessor 20. When CWAIT is received, wait processing starts and CPU wait signal CW^IT is received.
enters a wait state until becomes inactive. In the wait state, the microprocessor 20 holds the address bus 20a1, the data bus 20C1, and the bus control signal 20b, so even if contact sliding noise between the memory card 22 and the memory card connector 21 is caused by the address bus 20a, the data bus 20c, Even if it is superimposed on the bus control signal 20b, it will not cause the microprocessor 20 to malfunction. In addition, the memory card insertion detection circuit 23
a is equipped with a mono multivibrator inside, and receives a memory card detection signal C from the memory card connector 21.
When the falling or rising edge of IN is detected, the CPU wait request compensation signal CWAIT is sent to the wait generation circuit 23b for a certain period of time, so even if chattering occurs in the memory card detection signal CIH, a stable wait is generated by the microprocessor 20. It can be applied to.

Note that the above-mentioned fixed period is 1, which is a long time with some margin compared to the time during which chattering occurs. Furthermore, when the memory card 22 is removed from the memory card connector 21, the memory card insertion detection circuit 23a detects that the memory card detection signal CIN has transitioned from active to inactive, and also sends a CPU wait signal to the wait generation circuit 23b. Since the requested compensation signal CWAIT is sent, the wait generation circuit 23b sends the CP to the microprocessor 20.
The U wait signal (JAIT) is sent, and the microprocessor 20 enters the wait state. In this way, the microprocessor 20 is caused by contact sliding noise between the memory card 22 and the memory card connector 21 when the memory card 22 is inserted or removed. malfunctions are prevented.

FIG. 2 shows the timing relationship of the respective signals.

When the memory card detection signal CIN transitions, the CPU wait request compensation signal WREQ becomes active for a certain period of time, and the CIN
A PU wait signal CWAIT is sent. When the microprocessor 20 enters the wait state, the address bus 2
0a, the data bus 20c, and the HAS control signal 20b are held, and are no longer affected by the contact sliding noise. Note that the wait time is extremely small compared to the time required to insert and remove the memory card, so the processing of the microprocessor is not slowed down by it.

[Example 2] FIG. 3 is a perspective view of a second embodiment of the invention.

In this embodiment, the memory card control circuit 23 in the first embodiment of the present invention is made into an IC chip and embedded in the memory card connector 31, and the memory card interface is further improved compared to the first embodiment. Can be simplified.

Effects of the Invention As described above, according to the present invention, there is no need for a large number of tri-state buffers between the microprocessor and the memory card connector, and there is no need for a complicated data bus direction control circuit. The card interface can have an extremely simple configuration. the result,
It is possible to reduce the cost of the memory card interface, downsize the device by reducing the area of the printed circuit board, and improve the reliability of the device by simplifying the wiring.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a memory card interface according to a first embodiment of the present invention, and FIG. 2 is a timing diagram of each signal in this embodiment. FIG. 3 is a perspective view of a memory card interface according to a second embodiment of the present invention. FIG. 4 is a block diagram of a conventional memory card interface. 20...Microprocessor, 21...
・Memory card connector, 22... Memory card, 23... Memory card control circuit, 23a.
...Memory card insertion detection circuit, 23b...
...Wait signal generation circuit.

Claims (2)

[Claims] (1) A memory card connector and a memory card control circuit are provided, a microprocessor to be interfaced is directly connected to the memory card connector, and the memory card control circuit is configured with a memory card insertion detection circuit and a wait signal generation circuit. and a memory card interface circuit coupled to the microprocessor. (2) The memory card interface circuit according to claim 1, wherein the memory card control circuit is made into an IC chip and embedded in the memory card connector.