JPH0313620B2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a data collection system for a game parlor such as a pachinko parlor, which collects data from a plurality of terminal devices installed in the parlor.

[Prior art and its problems]

BACKGROUND ART Conventionally, a method has been developed and widely used in which terminal devices such as pachinko gaming machines, automatic ball lending machines, automatic prize exchange machines, etc. are connected to a computer system via a transmission line, and pachinko gaming parlors are centrally managed. In pachinko parlors equipped with conventional centralized management systems, multiple pachinko machines, automatic ball lending machines, automatic prize exchange machines, and other terminal devices are connected via transmission lines to CPUs, keyboard devices, printer devices, and printers. It was connected to a computer system consisting of spray equipment, etc., and based on the information obtained through the transmission line, it controlled ball replenishment, aggregated sales data, and displayed stopped tables and abnormal tables. FIG. 1 is a block diagram showing an overview of a control system for centrally managing a game parlor. First, the control computer system 100
CPU 110, memory 120, keyboard 130,
It includes at least a printer 140, a display 150, etc., and performs data processing via a system bus 160. A transmission control device 400 connected to each pachinko machine 310i (i is a natural number from 1 to n) is connected to this system bus 160 via a transmission line 200. It collects information from the machines 310i, etc., and controls each pachinko machine 310i, etc. via the transmission control device 400. The information collected by this transmission control device 400 includes, for example, the number of winning balls for each pachinko machine 310i,
There is information such as the number of balls driven in, the number of balls supplied, abnormal machine occurrence information, ball shortage machine occurrence information, and special game start information, etc.
The CPU 110 uses this information and the keyboard 130
Each pachinko machine 3
In addition to controlling the 10i, it is necessary to have the printer 140 create hard copies of pitch count data, sales totals, etc., and to display machine numbers on the display 150 for stopping tables, abnormal tables, additional supplies completed, opening tables, etc. display information. A game parlor generally has several hundred to over one thousand terminal devices such as pachinko machines and automatic ball lending machines, and the data generated by these many terminal devices is processed in real time by a computer system 1.
There is a need for a high speed and highly accurate data collection system that communicates 000000000000000000000000000000000000000000000000000000000. By the way, each pachinko game machine, which is an example of a terminal device, generates several types of common data, such as the number of winning balls and the number of balls hit, and the computer system 100 stores several types of data based on the machine address of the game machine. It is necessary to identify and collect data, and most of this data is integrated value data. Due to these characteristics, conventionally known data collection systems are basically classified into the following types. In addition, the conventional example shown below will be explained by taking as an example a case where the integrated value of the number of winning balls is collected. First, in the first example, a counter is provided for each gaming machine to count the cumulative value of winning balls, and the number of winning balls accumulated and stored in the counter is transmitted to the computer system 100 via a transmission line. It is. However, in the case of such a method, since numerically coded data is transmitted, there is a problem that the length of the transmitted data increases, causing a delay in the transmission speed or an increase in the number of cables. There is also the problem that a counter must be provided for each gaming machine, leading to increased costs. Next, in the second example, a counter corresponding to each gaming machine is provided on the computer system 100 side, and when the occurrence of winning balls is transmitted from each gaming machine via the transmission line, the counter provided on the computer system side is This is a method of progressing. In the case of this method, the data passing through the transmission line is only 1-bit data indicating whether or not a winning ball has occurred, so the transmission time and number of cables do not increase, but the number of counters corresponding to each gaming machine can be set up by the computer. There is a problem in that the counter must be prepared on the system side, and if more gaming machines are added, a counter must be added.

[Means to solve the problem]

The present invention has been made in view of these problems, and its purpose is to provide a new data collection system for game parlors that does not require additional transmission lines or counters for each game machine. do. In principle, the game parlor data collection system of the present invention is based on a data collection system that uses transmission lines in a time-division manner. Furthermore, in the present invention, the counter means provided on the computer system side is also used by each game machine in a time-sharing manner, thereby making effective use of the counter means and making it possible to increase the number of game machines without increasing the number of counter means without limit. It is designed to be able to respond flexibly to various situations. In summary, the game parlor data collection system of the present invention: connects a plurality of terminal devices, each of which is a source of information and is assigned a series of addresses, to a central processing unit via a transmission line; This system assumes a data collection system for an amusement arcade that transmits data generated at each terminal device in a time-sharing manner to the central processing unit while sequentially updating the address: A memory containing at least the address of each of the terminal devices. Integration information storage means having an area and storing numerical information in each address; Counter means performing stepwise operation from a preset value; Generating a common address for each of the terminal devices and the integration information storage means. and: information holding means for temporarily holding data having two meanings, true and false, sent from a terminal device specified by the address generating means among the plurality of terminal devices. and: presetting the contents of the corresponding storage area of the integration information storage means in the counter means during the time period during which the address designation means designates the address of any of the terminal devices;
When the content of the information holding means is true, the counted value of the counter means is incremented and written into the cumulative information storage means, and when the content of the information holding means is false, the stored content of the counter means is incremented. This feature is characterized in that the accumulated information is written into the integrated information storage means without being advanced.

[Effect]

That is, according to the gaming parlor data collection system of the present invention, the addresses of the terminal device and the cumulative information storage means are specified by the common address generation means, and the data that has two meanings, true and false, is sent from the terminal device. The information is sent out and held in the information holding means. On the other hand, the numerical data read from the cumulative information storage means is preset in the counter means, and only when the contents of the information holding means are true, the counted value of the counter means is incremented and fed back to the cumulative information storage means. , each terminal device uses the counter means in a time-sharing manner, so that the counter means can be used effectively. Furthermore, as long as there is sufficient space in the cumulative information storage means, it is possible to accommodate the addition of terminal devices without adding hardware.

【Example】

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings. FIG. 2 shows the island equipment of a pachinko game parlor, which is the premise of the present invention, and a computer system 100 installed in a counter 500 centrally manages the inside of the parlor. To explain the flow of pachinko balls in the island equipment, there are a plurality of pachinko machines 310i (i) in the island equipment 300.
is a natural number from 1 to n), and one automatic ball lending machine 320i is provided for every two pachinko machines 310i, and when a player inserts coins into the automatic ball lending machine 320i, , the automatic ball lending machine 320i lends a predetermined number of pachinko balls to the player, and the player can use any pachinko machine 310.
Start playing pachinko with i. When the game starts, the pachinko balls hit into the pachinko machine 310i by the player are temporarily stored in the ball receiving box 330i, regardless of whether they are safe balls or out balls, and then sent to the collection gutter 34.
0 into the taming machine 350, and the taming machine 3
After being polished at step 50, it is transported by a lifting device 360, and returned to a replenishing device 390i provided for each pachinko machine 310i via a replenishing gutter 370-replenishing chute 380i. Further, if a safe ball is generated during the game, a predetermined number of prize balls are refunded to the player and exchanged for a desired prize at the counter 500. The pachinko balls exchanged for this prize are 600 ball counting machines.
The balls are counted, stored in the ball receiving hopper 610, and returned to the bird equipment 300 where there is a shortage of pachinko balls via the lifting device 620 and the return gutter 630.
Note that the computer system 100 can easily calculate which island equipment is short of balls by calculating the difference between the number of balls hit and the number of balls supplied. Further, the coins inserted into the automatic ball lending machine 320i are stored in a coin storage box 650 via a belt conveyor 640. The data collection system for a game parlor of the present invention is, for example, a game parlor having such an island facility 300, and collects data on the number of balls hit, number of winning balls, data on the number of replenished balls, and inserted coins generated for each pachinko machine. Various types of data such as numerical data are collected in real time at high speed and with high efficiency via a common transmission line, and the integrated values of these data are totaled within the data collection system. FIG. 3 is a digital circuit diagram showing one embodiment of the present invention, 100 is a computer system, Si
(i is a natural number from 1 to n) is a sensor that is provided for each pachinko machine and is an information generation source (in this example, it will be explained as a winning ball number sensor that detects the number of winning balls for each machine, but other than this sensor) 210 is a winning ball detection signal generated by each sensor Si, and 210 is a winning ball detection signal generated by each sensor Si. A common transmission line for transmitting
20i indicates a terminal designation signal that designates each sensor Si. Further, in this embodiment, (1) As an example of a control means for controlling the timing of data collection and other controls, an oscillator 711 that generates a reference pulse, a counter 712 that is incremented by the reference pulse, and a counter 712 that controls the timing of data collection and other controls are used. It is equipped with a decoder 713 that decodes the count value and outputs various timing control signals, tri-state buffers 714 and 715 that hold memory addresses, and an OR gate 716.
As an example of information holding means for temporarily holding the winning ball detection signal transmitted from the latch circuit 72
(3) As an example of an address generation means for specifying the platform address of each sensor Si which is the information generation source and the address corresponding to each sensor Si in the memory 741, a counter 731, counter 7, which is incremented by
A decoder 732 and an OR gate 733 decode the output of 31 and output a terminal designation signal 220i.
(4) As an example of an integrated information storage means for storing integrated values of winning ball detection signals output from each sensor Si, the storage area is specified by an address equivalent to the output of the decoder 732. memory 741
(5) A preset counter 751 is provided as an example of a counter means for adding up the preset contents of the memory 741 using a count up signal, and (6) Presetting the count up signal outputted by the decoder 713. As an additional means for transmitting information to the counter 751, a memory 76 with one bit per address is designated as a storage area by an address common to the output address of the decoder 732.
1, an inverter gate 762, and an AND gate 763. Further, the latch circuit 771 holds address data added from the computer system 100 via the system bus 160, and the buffer gate 772 transfers the integrated value of winning ball detection signals read from the memory 741 to the computer system 100. The counters 712 and 731 are each ring counters. Next, an outline of the operation during data collection in this embodiment will be described. In the gaming parlor data collection system of this embodiment, a decoder 732 sequentially scans the sensors Si in each gaming machine, and temporarily holds the winning ball detection signal generated by each sensor Si in a latch circuit 721 via a transmission line 210. At the same time, the address of the memory 741 is associated with the address of the sensor Si on a one-to-one basis,
When a certain sensor Si generates a winning ball detection signal, the integrated value in the immediately previous scan cycle stored in the corresponding i address of the memory 741 is preset in the preset counter 751, and the preset counter 751 adds or maintains the integrated value. Later, the data is written to the corresponding address in the memory 741 again, and therefore the preset counter 751 is used in a time-division manner for each scan cycle. In addition, to further explain the means for transmitting the count-up signal mentioned above, these means are connected to the sensor Si installed on each pachinko machine.
This is to prevent the data collection system from accumulating winning ball detection signals redundantly due to the difference in operating speed between the data collection system and the data collection system. To be more specific, for example, a sensor Si such as a winning ball detector is generally composed of a micro switch, a photoelectric sensor, etc., and its operating speed is on the order of several hundred milliseconds. The system scans all pachinko machines at intervals of several tens of milliseconds. Therefore, unless such a means is provided, even if a certain sensor Si generates a winning ball detection signal and this is accumulated in the memory 741, that sensor Si will normally continue to be turned on in the next scan cycle. Therefore, the contents of the memory 741 may be added by two or more due to one winning ball detection. Therefore, the opening/closing of the AND gate 763 is controlled by changing the state of the memory 761 having the address corresponding to the output of the decoder 732.
The contents of the memory 741 are incremented by 1 based on the winning balls detected each time. Next, the operation during data collection in this embodiment will be described in detail with reference to the timing chart in FIG. 712 is incremented, and the counter 731 is incremented by the carry over output of this counter 712. Therefore, while the counter 731 is incremented by one step, the count value of the counter 712 goes around once, and the decoder 71
The various control signals outputted by No. 3 also go through one cycle. Also, the count value of the counter 731 is determined by the decoder 732.
The decoder 732 is added to the counter 7
31 count values are decoded and terminal designation signals 220i are sequentially output. For example, if the count value of the counter 731 is [1], the decoder 732 outputs the terminal designation signal 2201, and as a result, the sensor S1 becomes electrically connected to the transmission line 210. In this way, when sensor S1 generates a winning ball detection signal while sensor S1 is conductive, this winning ball detection signal is applied to latch circuit 721 via transmission line 210 and raises the output level of latch circuit 721. The output of the latch circuit 721 is connected to the data input terminal of the memory 761 and the AND gate 7.
63 to one control terminal. On the other hand, the count value of the counter 712 is added to the decoder 713, and the decoder 713 sequentially outputs eight types of control signals numbered 0 to 7 while the decoder 732 designates the sensor S1. First, the No. 0 output of the decoder 713 is applied as a load signal to the preset counter 751, and the preset counter 751 uses this load signal to preset the contents of the address specified in the memory 741. At this point, the output of the OR gate 716 is the L level, so the tri-state buffer 714 is activated.
Therefore, the count value of the counter 731, that is, [1], is stored in the memory 741 as the tri-state buffer 71.
4 as a read address, and the contents of the first address of the memory 741 are preset into the preset counter 751. Subsequently, when the load signal, which is the 0th output of the decoder 713, falls, the first output of the decoder 713
The count-up signal, which is the number output, rises,
This count up signal is applied to AND gate 763. As already mentioned, one control input terminal of the AND gate 763 is at H level because the latch circuit 721 holds the winning ball detection signal, and the other control input terminal of the AND gate 763 is connected to the memory. The contents of the first address 761 are added via an inverter gate 762. One bit of memory 761 for each memory address.
As will become clear later, the stored content is at L level in the initial state, so it is inverted by inverter gate 762, and the control input terminal of AND gate 763 is at H level at this point. Therefore, the count up signal which is the first output of the decoder 713 is sent to the clock input terminal of the preset counter 751 via the AND gate 763.
In response to this count-up signal, the preset counter 751 increments the already preset contents of the first address of the memory 741 by one. Subsequently, when the count up signal, which is the first output of the decoder 713, falls, at the same time, the write control signal, which is the second output of the decoder 713, rises, and this write control signal is applied to the memory 761.
and added to memory 741. First, the output of the latch circuit 721 is applied to the data input terminal D of the memory 761, and at this time, the output level of the latch circuit 721 is at H level due to the winning ball detection signal.
The content of address 0 is H. On the other hand, the Q output of the preset counter 751 is applied to the data input terminal D of the memory 741, and the count value of the preset counter 751 is incremented by 1 by the count up signal. A value obtained by adding 1 to the integrated value of the winning ball detection signal in the immediately preceding scan cycle is written as the integrated value of the winning ball detection signal. Therefore, according to this embodiment, the memory 74
The first address of 1 has the first address by that scan cycle.
The integrated value of winning ball detection signals generated at each stand is always stored. Similarly, the winning ball detection signals generated by the sensors S2 to Sn in synchronization with the progress of the counter 731 are also sent to the latch circuit 7 via the transmission line 210.
21, and is integrated and stored in the second to nth addresses of the memory 741. And the sensor
When the winning ball detection signal generated by Sn is collected, the count value of the counter 731 returns to [1], and the decoder 7
32 again addresses the sensor S1, and the counter 731 is stored in the memory 741 and the memory 761 via the tri-state buffer 714.
The count value of is given as an address. and,
After decoder 732 addresses sensor S1 in this manner, it takes only a few tens of milliseconds for decoder 732 to address sensor S1 again. However, since the operating time of sensor Si is usually in the order of several hundred milliseconds, when sensor S1 is addressed again, sensor S1 still
A winning ball detection signal is output. Therefore, in this embodiment, in order to accept only the first winning ball detection signal as valid, a memory 761, an inverter gate 762, and an AND gate 763 are provided. This prevents them from being added. That is, at the same time that the decoder 732 specifies the sensor S1, the count value of the counter 731 is given as an address to the memory 741 and the memory 761 via the tri-state buffer 714, and the load which is the first output of the decoder 713 is given as an address to the memory 741 and the memory 761. At the rising edge of the signal, the contents of the first address of the memory 741 are preset in the preset counter 751. Subsequently, when the load signal, which is the first output of the decoder 713, falls, the decoder 713 raises the count-up signal, which is the first output, and this count-up signal is sent to the AND gate 76.
However, the contents of the first address of the memory 761 are inverted by the inverter 762 and added to the control input terminal of the AND gate 763, and the contents of the first address of the memory 761 are added to the control input terminal of the AND gate 763. Since the signal is at H level, the control input terminal of AND gate 763 becomes L level, and therefore, no count up signal is applied to preset counter 751. Therefore, the count value of the preset counter 751 remains the value just preset from the memory 741, and even if the decoder 713 subsequently raises its second output, the write control signal, the count value of the memory 741
The integrated value of winning ball detection signals in the immediately preceding scan cycle is written as is. In this way, when the scan cycle by the decoder 732 is repeated several times, one operation of the sensor S1 is completed and the sensor S1 is turned off. Then, when sensor S1 turns off, decoder 7
32 next scans the sensor S1, the output of the latch circuit 721 becomes L level, so the first address of the memory 761 is read at the timing when the decoder 713 raises its second output, the write control signal. Contents

[0], therefore, inverter 7
The output of 62 becomes H level. Therefore, when the sensor S1 generates a winning ball detection signal after the next scan cycle, as described above,
A count-up signal, which is the first output of the decoder 713, is applied to the preset counter 751, and the integrated value of the winning ball detection signal is added. Similarly, every time a certain sensor Si generates a winning ball detection signal, the corresponding i-th data in the memory 741 is
The integrated value of the winning ball detection signal at the address is stored. Next, the operation when transmitting the data collected in this way to the computer system 100 side will be described. In summary, the CPU 110 is connected to the system bus 16
0, the read address of the memory 741 is written to the latch circuit 771. The integrated value of the number of winning balls of the corresponding pachinko machine is read from the specified address of the memory 741, and this integrated value is read into the CPU 110 via the buffer gate 772 and the system bus 160. More specifically, the CPU 110 sequentially sends the addresses of the pachinko machines whose integrated information is to be collected periodically to the system bus 160, and these addresses are temporarily held in the latch circuit 771. Specifically, for example, if the integrated value of the number of winning balls in the first series is to be read, the address of the first address of the memory 741 is written to the latch circuit 771. On the other hand, the decoder 713 constantly decodes the count value of the counter 712 from the time the power is turned on, and
The logical sum of the third to sixth outputs of the decoder 713 is added to the gate input terminals of the tristate buffers 714 and 715. Tri-state buffer 714 is activated when the output of OR gate 716 is at L level, and tri-state buffer 715 is activated when the output of OR gate 716 is at H level. Therefore, as described above, while the tri-state buffer 715 is closed when the cumulative value of the winning ball detection signals generated by each sensor Si is written into the memory 741, the tri-state buffer 715 is closed. When the write control signal, which is the second output, falls, then the third, fourth, and fifth outputs of the decoder 713
The outputs No. 6 and No. 6 rise in sequence, and during this time the tri-state buffer 715 is opened. Therefore, the address of the first address of the memory 741 held in the latch circuit 771 is given to the memory 741 via the tri-state buffer 715, and the cumulative value of the number of winning balls generated by the sensor S1 is stored in the memory. 741 and is read out from the CPU 1 via the buffer gate 772 and the system bus 160.
Added to 10. Then, the CPU 110 once stores the integrated value of the number of winning balls read from the memory 741 in the RAM area of the memory 120, and then uses these data to perform the known centralized management of the game parlor. The OR gate 733 is for preventing various sensors Si from being specified when the CPU 110 reads data from the memory 741, and when the output of the OR gate 733 is at L level, the decoder 73
2 is enabled. In addition, although the case where the integrated value of the number of winning balls is collected has been described above, the data collection system for a game parlor of the present invention can also be used in other ways, for example,
Any data that needs to be grasped as an integrated value due to the nature of the data, such as the number of balls hit, the number of balls supplied, the number of coins inserted, and the number of special games, can be applied as is. In addition, although the above description assumes that the present invention is used in a pachinko game parlor, the present invention can be used not only in coin-operated game parlors and arranged ball parlors, but also in real-time information generation sources. This method can be applied as is when collecting data that occurs in the field and needs to be understood as an integrated value due to the nature of the data. Furthermore, in the above example, information sources with the same functional structure, such as winning ball detectors, are connected to a common transmission line, but in the present invention, each of the information sources and the memory 741 is Since there is a one-to-one correspondence with addresses, if the type of information stored in each address of the memory 741 is registered in advance on the computer system 100 side, information sources with different functional structures can be connected to a common transmission line. It is also possible to connect to. Furthermore, in the above, for example, information that is meaningful as an integrated value, such as the number of winning pitches, is stored in the memory 74.
1, but by making some structural changes to the above embodiment, it is also possible to collect status information such as an abnormality detection signal. Specifically, when collecting such status information, for example, the memory 741 is configured with one bit per address, the preset counter 751 is not provided, and the output of the AND gate 763 is used as the data of the memory 741. Just add it to the input terminal. Further, in the above example, the memory 7661 and the inverter gate 762 are provided in order to prevent the trouble of double detection caused by the difference between the operating speed of various sensors and the operating speed of the data collection system. If the operating speed of the sensors is sufficiently fast, the opening and closing of the AND gate 763 may be controlled solely by the output of the latch circuit 721 without providing the memory 761 or the inverter gate 762.

【effect】

As explained above, according to the present invention, it is possible to connect a large number of terminal devices serving as information generation sources to a single transmission line, and the information to be finally processed is numerical information. Since only 1-bit information indicating ON/OFF is sent over the transmission line, the amount of information on the transmission line is minimized, and line costs are reduced. Furthermore, when integrating a large number of numerical information,
Since a single counter is used in a time-sharing manner, the counter can be used effectively, and as long as the address of the memory means has enough space, it is possible to add more terminal devices without having to add more counters. This can only be done through software.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a data collection system for a gaming parlor, Fig. 2 is a schematic diagram showing the island equipment of the gaming parlor, and Fig. 3 is a digital circuit diagram showing one embodiment of the present invention.
FIG. 4 is a timing chart of the basic operation of the present invention. 100...computer system, 210...
Transmission line, 220i... terminal designation signal, Si... sensor, 713... decoder, 721... latch circuit, 732... decoder, 741... memory, 7
61...Memory, 751...Preset counter.

Claims (1)

[Scope of Claims] 1 A plurality of terminal devices serving as information generation sources to which a series of addresses are assigned are connected to a central processing unit via a transmission line, and each of the terminal devices is updated while sequentially updating the addresses of the plurality of terminal devices. In a data collection system for a game parlor that transmits data generated by terminal devices to the central processing unit in a time-sharing manner, the system has a storage area that includes at least the addresses of each of the terminal devices, and cumulatively stores numerical information in each address. counter means that performs a step-by-step operation from a preset value; address generation means that generates a common address for each of the terminal devices and the cumulative information storage means; among the plurality of terminal devices; and information holding means for temporarily holding data having two meanings, true or false, sent from a terminal device specified by the address generating means, and the address specifying means is one of the terminals. Presets the contents of the corresponding storage area of the cumulative information storage means into the counter means within the time period in which the address of the device is specified, and when the contents of the information holding means are true, the counted value of the counter means is set. The counter means is incremented and written into the cumulative information storage means, and when the content of the information holding means is false, the stored content of the counter means is written into the cumulative information storage means without incrementing. A data collection system for amusement arcades.