JPH03132205A - Demodulator - Google Patents

Abstract

PURPOSE:To prevent influence on offset by sampling and holding detected output obtained by supplying a reference signal, generating a second control signal to control a voltage (or current) controlled oscillator, and adding it on a first control signal. CONSTITUTION:A phase comparator 14 phase-compares a signal from a switch 13 with a signal from the voltage controlled oscillator(VCO) 15, and derives its detected output to an output terminal 16, and supplies it to a first volt-ampere converter 17. The volt-ampere converter 17 controls the oscillation frequency and the phase of the voltage controlled oscillator(VCO) 15 corresponding to the detected output, and phase-locks it with an input signal frequency. Furthermore, the output of the phase comparator 14 is inputted to a sample-and-hold circuit 19 via a switch 18, and its output is inputted to a volt-ampere converter 20. And the output of the second volt-ampere converter 20 is supplied to the oscillation frequency and phase control terminal of the VCO 15. Thereby, it is possible to make the offset hard to receive the influence, and to accurately obtain demodulated output.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a demodulation device that is used in, for example, a television signal processing device and demodulates an FM-modulated signal.

(Prior Art) Color television signal systems currently used in the world include NTSC and PAL.

There are three methods of SECAM. Among these, the SECAM method is mainly adopted in Eastern bloc countries and France.

In the SECAM system, color signals (R-Y) and (B-Y) are FM demodulated and transmitted line-sequentially in order to improve characteristics against transmission distortion. The FM demodulation carrier is (RY)
, (B-Y), and (R-Y) is 282fH.

(B-Y) is 272 f I (fll-15,82
5KIIz).

Also, similar to the carrier suppression performed in the NTSC system,
In the SECAM system, in order to reduce the influence of the chrominance signal on the luminance signal, the chrominance signal is processed through a band suppression (inverted bell type during transmission) filter called a bell filter.

In a color television receiver that receives and processes the above-mentioned color signals, when focusing only on one horizontal period (IH line), only one side of the color difference signal is always present, so the color difference signal of the previous line is delayed until the next line. It is necessary to maintain and synchronize the data.

Therefore, conventionally, a glass delay line is used to obtain an IH delayed color difference signal. Conventionally, this glass delay line is provided at a position that provides delay in the radio frequency (RF) band. This caused a beat to occur between the undelayed direct signal and the delayed signal, resulting in a screen disturbance called line crawling. In order to avoid this, it is necessary to alternately input the demodulated line-sequential color difference signals, that is, the (RY) signal and the (B-Y) signal.
It is sufficient to perform simultaneous processing with a delay of H. With the development of a CCD (charge-coupled device), it is possible to implement this as an element that delays the signal after demodulation.

Next, it is necessary to perform matrix calculation using the synchronized (RY) and CB-Y) signals.

For this purpose, it is necessary to separate the (RY) signal and the (B-Y) signal and appropriately supply each signal to a predetermined input terminal of the matrix circuit.

For this purpose, it is necessary to accurately identify the arrival of the (RY) signal and the (B-Y) signal. In order to perform this identification, the transmitting side sends the FM signal of each line called an ID signal.
An identification signal (ident signal) is being transmitted. This ID
The signal is inserted into the back porch of the horizontal period and part of the vertical retrace period.

FIG. 5 shows a conventional ID signal demodulation circuit.

A SECAM type signal from an input terminal 1 is guided to a phase comparator 2. The phase comparator 2 compares the phases of the signal from the input terminal 1 and the signal from the voltage controlled oscillator (VCO) 3, and outputs the phase detection output to the output terminal 4. Here, the phase detection output is also supplied to a voltage-current converter 5, and the output of this converter 5 constitutes a phase-locked loop circuit so as to control the oscillation frequency and phase of the VCO 3.

This ID signal demodulation circuit utilizes the fact that the ID signal has a different frequency for each IH, and sets the free run frequency of the VCO 3 to (foB+foR)/2 in FIG. 6(A). Then, the ID signal rOR of the (RY) signal
When the ID signal of the (BY) signal arrives, the detected output V FOR can be obtained, and when the ID signal of the (BY) signal arrives, the detected output V FOB can be obtained.

Thereby, by determining whether the reference voltage V rer is large or small, it is possible to identify the arrival period of the (RY) signal and the arrival period of the (B-Y) signal.

(Problems to be Solved by the Invention) According to the conventional ID signal demodulation circuit described above, when there is no offset in the circuit, the characteristics shown by the solid line in FIG. 6(A) are obtained, and no error occurs in ID signal determination. However, when an offset occurs, the detection characteristic becomes, for example, as indicated by the dashed-dotted line in FIG. 6(A).

In such a case, the detection voltage for the (B-Y) signal is VfOB', the detection voltage for the (R-Y) signal is VfOR', and both detection voltages are equal to the reference voltage V.
The voltage will be higher than rer.

Originally, as shown in FIG. 6(B), the reference voltage V r
It should be noted that positive and negative detected voltages appear when the (R-Y) signal and (B-Y) signal arrive with respect to er.
As shown in Figure (C), all of them are on the positive side, making identification impossible.

Furthermore, if the offset shown in FIG. 6(A) becomes even larger, it may become impossible to obtain a detected output because the frequency FOR is set toward the end of the frequency variable range of the VCO3. . In such a state, the phase lock is lost and the VCO 5 is in a free run state, and it is determined that there is no signal (no color signal), and the color killer function may be activated. In order to improve such problems, it is possible to design the electronic circuit by increasing the margin for the dynamic range and the frequency variable range of vCO, but this may limit the electronic circuit design or reduce the current A new problem will arise: waste of money.

SUMMARY OF THE INVENTION An object of the present invention is to provide a demodulation device that is less susceptible to offset in a demodulation circuit that uses a phase-locked loop.

Another object of the present invention is to provide a demodulator that can accurately identify an ID signal when used as an ID signal identification circuit.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a phase comparator that performs a phase comparison between an oscillation output from a voltage (or current) controlled oscillator and an input signal, and a detected output of this phase comparator. is supplied, and creates a first control signal according to this detected output, thereby controlling the oscillation frequency and phase of the voltage (or current) controlled oscillator, so that the oscillation output has a phase corresponding to the input signal. In the demodulator, which has a frequency control means for pulling in, and uses the detected output as a demodulated signal, the input signal includes means for intermittently supplying a reference signal in addition to the original input signal to be detected; A second circuit for controlling the voltage (or current) controlled oscillator according to the hold signal by sampling the detected output obtained by supplying the reference signal.
and second frequency control means for creating a control signal and adding it to the first control signal.

(Function) With the above means, the demodulation circuit forming the phase-locked loop can obtain a detection output of the reference signal using the second frequency control means. If there is an offset in the circuit, the detected output of the reference signal will also be offset. Therefore, if the detection output level of the original input signal is determined based on the detection output of this reference signal, erroneous determination of the detection output level of the input signal will not occur even if there is a circuit offset.

(Embodiments) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which an input terminal 11 is supplied with a SECAM system signal, and an input terminal 12 is supplied with a reference signal. These signals are led to one input terminal and the other input terminal 13a and 13b of the switch 13, and are introduced into the phase comparator 14 at a timing to be described later.

The phase comparator 14 compares the phases of the signal from the switch 13 and the signal from the voltage controlled oscillator (VCO) 15, and outputs the detected output to the output terminal 16.

The output of the phase comparator 14 is supplied to a first voltage-current converter 17. This voltage-current converter 17 controls the oscillation frequency and phase of the VCO 15 according to the detection output, and synchronizes the phase with the input signal frequency.

Furthermore, the output of the phase comparator 14 is input to a sample and hold circuit 19 via a switch 18, and the output of this sample and hold circuit 19 is inputted to a second voltage-current converter 20.
is input. The output of the second voltage-current converter 20 is then supplied to the oscillation frequency and phase 1111m terminal of the VCO 15.

One embodiment of this invention is configured as described above,
FIG. 2 shows signal waveforms of each part shown in the text to explain its operation.

FIG. 2(A) shows the SECAM signal, and its identification signal is introduced into the input terminal 11. FIG. 2B shows a reference signal, which is introduced into the input terminal 12. FIG. 2C shows a key pulse for controlling the switch 13, and during the period when this pulse is at a high level, the switch 13 selects the reference signal. Therefore, the output of the switch 13 becomes a reference signal and an identification signal, as shown in FIG. here,
The switch 18 is turned on in synchronization with the timing of the reference signal (see (E) in the figure), and introduces the detected output of the reference signal into the sample and hold circuit 19. Therefore, when the reference signal is input, the VCO 15 is always pulled into a constant frequency and phase. This means that the level of the detection output from the phase comparator 14 ((F) in the same figure) is always constant when the reference signal is input.

On the other hand, the voltage-current converter 17 obtains an output corresponding to a detection output when an ID signal (ID signal) arrives. This output is supplied to the frequency and phase control terminals of VCO 15. Therefore, the frequency of the oscillation output of vC015 is 2
82f H and 272f H will be drawn in alternately for each IH. Therefore, the level of the detection output in each case also differs.

FIG. 2(G) is a diagram showing both detection outputs when the reference signal is input and when the ID signal is input.

In the case of such a demodulator, when identifying the ID signal for (B-Y) and the ID signal for (R-Y), the discrimination is made based on whether it is larger or smaller than the detection output V rer of the reference signal. be able to. The detection output V re of this reference signal
The relative magnitude relationship of the ID signal to r is always constant regardless of whether there is an offset in the circuit. This is because the detection output V rer of the reference signal changes according to the offset, and from the perspective of the detection output of each ID signal, the offset is canceled.

FIG. 3 shows the detection characteristics of the above demodulator. The solid line shows the characteristics of the conventional circuit when there is no offset, the dashed line shows the characteristics of the conventional circuit when an offset occurs, and the dotted line shows the characteristics of this embodiment when an offset occurs.

FIGS. 4A and 4B show the circuit blocks of FIG. 1 in more detail. Components corresponding to blocks in FIG. 1 are given the same reference numerals as in FIG. Figure 4 (A)
includes a VCO 15, a phase detector 14, and a voltage-current converter 17.
It shows a part of.

V CO15c, transistors Q1-Q17 and resistor R
1-R11 and a capacitor CI, and an oscillation output is taken out between the emitter of the transistor Q3 and the emitter of the transistor Q2. By controlling the current flowing into the collector of transistor Q15, the current flowing through transistors Q13 and Q14 is controlled, and the oscillation frequency and phase can be controlled.

The phase detector 14 includes transistors Q24 to Q37, Q4
4. Consists of resistors R17 to R24 and R34, forming a double-balanced differential amplifier, and transistors Q2g and Q
A SECAM signal is provided between the bases of 29. Further, the oscillation output is supplied between the common bases of transistors Q24 and Q27 and the common bases of transistors Q25 and Q28. The phase detection output is derived from the common collector of transistors Q35 and Q37.

As shown in Figure CB), the first voltage-current converter 17 is composed of transistors Q38 to Q43, Q45 to Q47, resistors R25 to R33, and R36 to R3g, and converts the voltage input to the base of transistor Q3g into A corresponding current is output from the collector of transistor Q41.

Further, the output of the phase detector 14 is transmitted to the sample hold circuit 1.
It is also supplied to the base of transistor Q53 of No. 9. 7
The bull hold circuit 19 includes transistors Q50~05g.
, resistors R50 to R53, and capacitor C2, transistors 050 to Q52 correspond to the switch 18, and a key pulse is supplied to the base of the transistor 050. The sampled and held signal is transferred to transistor Q5.
7 emitters are derived and input to the second voltage-current converter 20.

The second voltage-current converter 20 includes transistors 080 to Q
68. It is composed of resistors R54 to R62, and a current corresponding to the voltage supplied to the base of the transistor Q60 is derived from the collector of the transistor Q83 and is fed back to the VCO 15 as a control signal.

The properties of each circuit will be further explained.

C015 Transistors Ql-Q15 form an emitter-coupled multivibrator, and transistors 01B and Q17 act as current sources. Multivibrator is capacitor CI
The oscillation output is obtained by alternately charging and discharging the battery. The discharge current is the collector current of the transistors Q13 and Q14, and since the transistors Q13 to Q15 form a current mirror circuit, the sum of the collector current of the current source transistor QIB and the feedback control current is the total discharge current. It becomes an electric current. The oscillation voltage generated across resistors R1 and R2 is
It is equal to the potential difference generated across resistor R3 because it is clamped by transistors Ql, Q2, and Q3. If the above current sum is Ieont and the potential difference generated across resistor R3 is VH2, the oscillation frequency f osc is fose-1
cont/ (4X CI X V R3). V
Since H2 is constant, the oscillation frequency varies linearly with respect to the control current, which is convenient for use in modulation/demodulation circuits.

Phase detector 14 The detected output is derived by two systems of current mirror circuits (transistors Q30-Q37) and output by a single-end circuit.

Voltage-current converter 17 The collector currents of transistors Q3g and Q39 are single-ended by a current mirror circuit of transistors Q40 and Q41 to obtain a converted current of 1 outl.

Letting the conversion rate of this converter be Gml, G sl=1/2(re+R27). However, re-1c/VTs summer C-collector current, VT
-Thermoelectromotive force ore<(When R27, Gml is Gml-
It is given by 1/2R27.

Sample and hold circuit 19 The detected voltage held in this circuit is the pace emitter voltage of transistor Q57, and this voltage is held while the switch is off.

Voltage-current converter 20 The collector currents of transistors Q60 and Q61 are single-ended by a current mirror circuit of transistors Q62 and Q63, and output current 1 out2 is obtained from the collector of transistor Q83.

Letting the conversion rate of this converter be Gmaro2, then Gmaro2- 1/2(re+159)re=Ic
/VT, Ic-collector current, VT-thermoelectromotive force.

When re<<R59 G■2-1/2R59 is given by

Next, the ident signal detection voltage V out in demodulation processing using the phase-locked loop (PLL) method will be determined.

The frequency deviation of the input SECAM signal (FM signal) is
If f is the control current Δ■ required for the VCO, I cont −1e (QlB) + I outl+
From I out2 ΔI -1c (QIB) + ΔI ou
tl+ I out2-4XCIXVR3XΔf The cause of this ΔI is ΔI outl, and ΔI ou
When finding v out that generates tl, we get V out-ΔI outl/Q @-2(re+
R27) X (4X CI X V R3XΔf-I
c(QlB) -1out2).

Therefore, the offset of the detected voltage is reduced by 2(re+R27) X I out2. In addition, since the offset of the free run frequency of the VCO is removed by I outl and I out2 that are supplied to the control terminals of the VCO 15, the range in which vCO can be controlled by I outl is expanded, which improves identification signal identification performance. You can improve.

In the above embodiment, the demodulation circuit has been described for identification signal identification, but the present invention is not limited to this field and can be easily applied to input signals in which there is a period in which a reference signal can be inserted. .

[Effects of the Invention] As described above, the present invention makes it possible to make a demodulation circuit using a phase-locked loop less susceptible to offset, and to obtain accurate demodulated output.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a signal waveform diagram shown to explain the operation of the circuit shown in Fig. 1, and Fig. 3 shows the detection characteristics of the circuit shown in Fig. 1. A characteristic diagram shown for explanation, FIG. 4 is a circuit diagram showing the block in FIG. 1 in more detail, and FIG. 5 is a diagram showing the conventional identification signal tIa.
FIG. 6 is a diagram showing the circuit, and is a characteristic diagram and a signal waveform diagram shown to explain the operation of the circuit of FIG. 5. 13.18... Switch, 14... Phase detector, 1
5...Voltage controlled oscillator (VCO), 17.20...
-Voltage-current converter, 19...sample hold circuit.

Claims (2)

[Claims] (1) A phase comparator that performs a phase comparison between the oscillation output from the voltage (or current) controlled oscillator and the input signal, and the detection output of this phase comparator is supplied, and a first control signal corresponding to the detection output is supplied. and thereby control the oscillation frequency and phase of the voltage (or current) controlled oscillator to draw the oscillation output into a phase corresponding to the input signal, and convert the detected output into a demodulated signal. In the demodulator, the input signal includes means for intermittently supplying a reference signal in addition to the original input signal to be detected, and means for sampling a detection output obtained by supplying the reference signal. a second for holding and controlling the voltage (or current) controlled oscillator in response to this hold signal;
and second frequency control means for creating a control signal and adding it to the first control signal. (2) Claim further comprising means for obtaining a signal for identifying whether the detected output of the input signal is large or small based on the level of the detected output obtained when the reference signal is supplied. The demodulator according to the first aspect.