JPS58215888A - Color signal processor - Google Patents

Color signal processor

Info

Publication number
JPS58215888A
JPS58215888A JP9966782A JP9966782A JPS58215888A JP S58215888 A JPS58215888 A JP S58215888A JP 9966782 A JP9966782 A JP 9966782A JP 9966782 A JP9966782 A JP 9966782A JP S58215888 A JPS58215888 A JP S58215888A
Authority
JP
Japan
Prior art keywords
phase
ntsc
pal
signal
killer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9966782A
Other languages
Japanese (ja)
Other versions
JPS6242431B2 (en
Inventor
Kenichi Tsunashima
綱島 憲一
Toshifumi Yoshida
敏文 吉田
Michio Furuhashi
古橋 道夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP9966782A priority Critical patent/JPS58215888A/en
Publication of JPS58215888A publication Critical patent/JPS58215888A/en
Publication of JPS6242431B2 publication Critical patent/JPS6242431B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/64Circuits for processing colour signals
    • H04N9/642Multi-standard receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To simplify a circuit and to eliminate unnaturalness between PAL and NTSC, by applying subcarrier having specified phase difference to a killer detecting means of a PAL and an NTSC signal processing circuit. CONSTITUTION:A switch SW1 is placed at a terminal side (a) for PAL by a mode switching signal 54 and a color signal from an AGC circuit 11 is divided into two systems of a 1H (one horizontal scanning period) delay line 12 and a direct signal; and they are applied to a B-Y demodulator 6 and an R-Y demodulator 7 through an adder 14 and a subtracter 15 respectively. The SW1 is placed at a terminal side (b) for NTSC, and only the direct wave is applied to the demodulators 6 and 7. Further, a switch SW2 is inverted alternately at intervals of one horizontal period by the signal 54 in PAL mode and switches 60 and 61 are fixed at contact sides (b) in NTSC mode. The subcarriers 36 and 37 applied to the killer detector 3 are 45 and 225 deg. out of phase with a 180 deg. burst respectively. Switches 64 and 65 are operated to apply signals 40 and 41 which are inverted in phase at intervals of one horizontal period. The switches 64 and 65 are fixed at the contact sides (b) in NTSC mode.

Description

【発明の詳細な説明】 本発明は多方式カラーテレビジョン受像機の色信号処理
に関するものであり、その目的は、NTSC信号とPA
I、信号の色復調に用いる回路を共用化することにある
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to color signal processing for a multi-scheme color television receiver, and its purpose is to process NTSC signals and PA signals.
I. The purpose is to share the circuit used for signal color demodulation.

現在、世界で実用されているカラーテレビジョン信号に
は大別してNTSC,PAL及びSECAM方式があり
、それぞれ固有の特徴を有し、各方式に適合した受像機
がつくられている。
Color television signals currently in use around the world can be roughly divided into NTSC, PAL, and SECAM systems, each of which has its own unique characteristics, and receivers suitable for each system have been manufactured.

近時、放送の普及、映像情報を伝える媒体の多様化が進
み、複数方式のカラーテレビジョン信号を受信あるいは
受像できる地域や機会が増加し、1台で複数の方式のテ
レビ信号を受信できる受像機も多く作られている。前記
の3方式が受像できるもの、PALとSRCAM2方式
が受像できるもの、さらに前記3方式に加えて、色副搬
送波周波数が4.433618MHz  (以下、4.
43MH2と略す)であるNTSC信号(これiMod
ifiedNTSC:と呼称されている)も受像できる
合計4通りの信号が受像できるものもある。こ几らの受
像機では各方式の色信号を処理するので必然的に色信号
処理回路が複雑になり、部品点数も多く、工数も多くな
る。従って多方式の色信号全処理する回路の簡略化、経
済的合理化!小形化などが要求されている。
In recent years, with the spread of broadcasting and the diversification of media that convey video information, the number of regions and opportunities where it is possible to receive or receive color television signals of multiple formats has increased, and the number of areas and opportunities that can receive or receive color television signals of multiple formats has increased. Many machines are also made. One that can receive images in the three systems mentioned above, one that can receive images in PAL and SRCAM2 systems, and in addition to those that can receive images in the above three systems, a color subcarrier frequency of 4.433618 MHz (hereinafter referred to as 4.
NTSC signal (abbreviated as 43MH2) (this iMod
There are also devices that can receive a total of four types of signals. Since these receivers process color signals of various systems, the color signal processing circuit is inevitably complicated, and the number of parts and man-hours are also large. Therefore, the circuit that processes all the color signals of multiple methods can be simplified and economically rationalized! There is a demand for miniaturization.

本発明は、かかる要求に応えるための手段としてPAL
とNTSOの信号処理回路のうち共用できる部分を共用
し、回路の簡易化9合理化をはかると共に特性性能を加
善し、良好な受像性能を確保せんとするものである。
The present invention provides PAL
The purpose is to share the common parts of the signal processing circuits of the NTSO and NTSO, simplify and rationalize the circuit, improve characteristic performance, and ensure good image reception performance.

以下、本発明の実施例につき図面を用いて詳細に説明す
る。
Embodiments of the present invention will be described in detail below with reference to the drawings.

第1図にNTSC方式復調器の要部金示す。色信号入力
端子50より入力さ几た色信号はACC回路11を辿り
、APC検波器4.キラー検波器3、B−Y復調器6.
R−Y復調器7に加えられる。電圧制御発振器1の発振
出力ばTINT制御用の移相器2を通り、A P C@
波器4とキラー検波器3に加えられる。コンデンサ8,
10及び水晶9は電圧制御発振器1の発振素子である電
圧制御発振器1.TINT制御用移相器2.Ap′c検
波器4、ロードパスフィルタ6はP L L (PHA
SELOCKIi:D LOOP )全構成し、NTS
Cバースト位相(1800)に対しAPC検波器の差動
入力34゜36の差の位相は90となる。
FIG. 1 shows the main parts of an NTSC demodulator. The color signal inputted from the color signal input terminal 50 follows the ACC circuit 11 and is sent to the APC detector 4. Killer detector 3, B-Y demodulator 6.
RY demodulator 7. The oscillation output of the voltage controlled oscillator 1 passes through the phase shifter 2 for TINT control, and the APC@
It is added to the wave detector 4 and the killer detector 3. capacitor 8,
10 and crystal 9 are voltage controlled oscillators 1.1 which are oscillation elements of voltage controlled oscillator 1. TINT control phase shifter 2. The Ap'c detector 4 and the load pass filter 6 are P L L (PHA
SELOCKIi:D LOOP) all configured, NTS
The differential phase of the differential input 34°36 of the APC detector is 90 with respect to the C burst phase (1800).

30〜37はバースト位相にロックした副搬送波である
。T I N T fli制御用移相器2に制御′電圧
22によって、副搬送波30,31,32,33をそ几
ぞno”、  180’、  90O:270%中七・
ニ±4C可変させるものである。B−Y復調器6にはo
918σの副搬送7113o、31が入力され一方、R
−Y復調器7には9o’、27o勉副搬送波32.33
が人力さnている。
30 to 37 are subcarriers locked to the burst phase. The subcarriers 30, 31, 32, 33 are applied to the control phase shifter 2 by the control voltage 22.
It is variable by ±4C. B-Y demodulator 6 has o
918σ subcarriers 7113o, 31 are input, while R
- Y demodulator 7 has 9o', 27o subcarriers 32.33
is manpower.

第2図に実際のTINTN路2の回路図を示す。FIG. 2 shows a circuit diagram of the actual TINTN path 2.

また第3図にTINT中央時の各部の位相ベクトル図、
第4図にTINT制御電圧22を可変した時の各部の位
相ベクトル図を示す。
In addition, Fig. 3 shows the phase vector diagram of each part at the center of TINT,
FIG. 4 shows a phase vector diagram of each part when the TINT control voltage 22 is varied.

第2自において、トランジス’#201,202は定電
流源、220,223,224は適当な直流バイアス電
圧、230〜236は抵抗、30゜31.32.33は
前出の副搬送波である。トランジスタ207〜214は
TINT制御電圧(22a−22b)により、34〜3
7の副搬送波位相r30〜33の位相に対して移相させ
る。
In the second transistor, transistors #201 and 202 are constant current sources, 220, 223, and 224 are appropriate DC bias voltages, 230 to 236 are resistors, and 30° 31, 32, and 33 are the aforementioned subcarriers. The transistors 207 to 214 are connected to 34 to 3 by the TINT control voltage (22a-22b).
7 subcarrier phase r30 to r33.

(34の位相−35の位相)はApcループの性質上バ
ースト位相1800に対し900にりるからその結果副
搬送波30〜33は各々σ 1800゜9σ、2アσの
位相をモ45°変化させることができる。第3図の30
1、第41スの401はNl5C方式バースト位相を示
す。
(Phase of 34 - Phase of 35) is 900 compared to the burst phase of 1800 due to the nature of the Apc loop.As a result, subcarriers 30 to 33 each change the phase of σ 1800°9σ and 2aσ by 45°. be able to. 30 in Figure 3
1. 401 in the 41st line indicates the Nl5C burst phase.

ジノ、後の説明では常にTINT中央22a=22bと
して説明する。従って副搬送波の位相関係は、第2図の
様になる。
In the following explanation, it will always be assumed that TINT center 22a=22b. Therefore, the phase relationship of the subcarriers is as shown in FIG.

一方、キラー検波器には36に45°イ立相、37に1
35°位相の副搬送波が加えられる。
On the other hand, the killer detector has 45° positive phase on 36 and 1 on 37.
A 35° phase subcarrier is added.

次に第5図に上記NTSC方式をもとにしてPAL方式
も受像可能な本発明のシステムのブロック図を示す。説
明の簡略化のため、PAL/Modified N T
 S C受像システムについて説明する。
Next, FIG. 5 shows a block diagram of a system of the present invention which is based on the above-mentioned NTSC system and is also capable of receiving images of the PAL system. For simplicity of explanation, PAL/Modified N T
The SC image receiving system will be explained.

第1図のNTSC方式と異なる点のみ説明する。Only the differences from the NTSC system shown in FIG. 1 will be explained.

A CC回路11 ’、r出ft色信号1rJ−P A
 L/ N T S Gモード切替信号54により、P
AL時SW1はa端子となり、1Hディレィライン12
全通る信号と、直接信号の二系統に分けられ加算器14
、減算器15で加算、減算さ几それぞれB−Y復調器6
、及びR−Y復調器7に加えられる。NTSC時SW1
はb端子になり直接信号のみが復調器6゜7に加えられ
る。
A CC circuit 11', r output ft color signal 1rJ-P A
L/N T S G mode switching signal 54 causes P
When AL, SW1 becomes terminal a, and 1H delay line 12
The adder 14 is divided into two systems: a full signal and a direct signal.
, are added and subtracted by the subtractor 15, respectively, by the B-Y demodulator 6.
, and R-Y demodulator 7. NTSC time SW1
becomes the b terminal and only the direct signal is applied to the demodulator 6.7.

PALシステムではバーストバー水平期間毎+1350
、−136°の位相で送信きれるが、PLLのローパス
フィルター5の時定数を太きくとれば、+135°’、
−135句平均位相1800に対してロックするため、
副搬送波30〜36はNTSCと同様に第3図の様にな
る。(PAL時にはTINT制御しないため、TINT
制御信号22は中央に固定される) またPAL方式では一水平期間毎にR−Y成分の位相を
反転させているため、これに合わせてR−Y復調器7へ
加える副搬送波をスイッチ60゜6Q及び位相反転器6
2.63を用いてPAL/N−TSC切替制御信号54
に従い、PAL時1−j−水平期間毎に5w24切替え
反転させて正規の復調を行っている。NTSC時には、
スイッチ60゜61は接点す側に固定される。
For PAL systems, burst bar +1350 per horizontal period
, it can be transmitted with a phase of -136°, but if the time constant of the low-pass filter 5 of the PLL is made thicker, the phase becomes +135°',
-135 to lock to the average phase of 1800,
The subcarriers 30 to 36 are as shown in FIG. 3, similar to NTSC. (TINT control is not performed during PAL, so TINT
(The control signal 22 is fixed at the center.) Furthermore, in the PAL system, the phase of the R-Y component is inverted every horizontal period, so the sub-carrier to be applied to the R-Y demodulator 7 is switched 60° in accordance with this. 6Q and phase inverter 6
PAL/N-TSC switching control signal 54 using 2.63
According to the PAL mode, normal demodulation is performed by switching and inverting 5w24 every 1-j horizontal periods. At the time of NTSC,
The switches 60 and 61 are fixed on the contact side.

キラー検波器3に加えられる副搬送l!1.36゜37
は第1図のNTSC方式ではバースト位相180℃対し
て各々45’、135’の位相のものを加えていたが、
N T S C/P A L両用方式では、45’、2
25°を加える。こ几は、キラー検波器をPAL時にラ
イン識別を行う目的がある。才たスイッチ64.65及
び位相反転器66.67’を用い、制御信号54に従っ
て、スイッチ64. 65を動作させ、−水平期間毎に
位相反転させた信号40.41i加えている。NTSC
時にはスイッチ641 65[b接点に固定さfしてい
る。
Subcarrier l added to killer detector 3! 1.36°37
In the NTSC system shown in Figure 1, 45' and 135' phases were added to the burst phase of 180°C, but
In the NTS C/PAL dual-use system, 45', 2
Add 25°. The purpose of this method is to perform line identification when the killer detector is in PAL mode. According to the control signal 54, the switches 64 . 65 is operated, and a phase-inverted signal 40.41i is added every -horizontal period. NTSC
Sometimes the switches 641 and 65 are fixed at contact B.

第6図、第7図にキラー検波の様子を示す。第6図、第
7図中のn、n+1.n+2は第n番目が異なる。この
ことt6 P A L時キラーが浅くなる等の不都合ケ
生じる。
Figures 6 and 7 show the state of killer detection. n, n+1 in FIGS. 6 and 7. n+2 is different at the n-th point. This causes inconveniences such as the killer becoming shallow at t6 P A L.

本発明の一実施例のブロック図を第13図に示す。この
実施例は、上記不都合をなくすために、P A L、/
N T S Cでキラー検波へ加えられる副搬送波36
,37の位相をN780時45°、  226PPAL
時90°、270°に切り替える簡単な回路ケ与えてい
る。第13自のブロック南の内科は、PA L/N T
 S C切替信号54がTINT回路2に接続されてい
る以外rri第5図と同等である。
A block diagram of an embodiment of the present invention is shown in FIG. In this embodiment, in order to eliminate the above-mentioned inconvenience, P A L, /
Subcarrier 36 added to killer detection at NTSC
, 37 phase at N780: 45°, 226PPAL
A simple circuit for switching between 90° and 270° is provided. The internal medicine department located south of the 13th block is PA L/N T.
This is the same as in FIG. 5 except that the SC switching signal 54 is connected to the TINT circuit 2.

実施例の細部回路を第8図に示す。この1ixl路は第
13図の1°INT回路2の部分である。
A detailed circuit of the embodiment is shown in FIG. This 1ixl path is a part of the 1° INT circuit 2 in FIG.

第8図に示すように、トランジスタ203゜204にそ
几ぞ几コレメタ・ エミッタ共通のトランジスタ701
,702をつけ、トランジスタ701.702の共通ベ
ース703をPAL時には203,204のベースより
高い電位に、またNTSC時には、203.204のベ
ースより低い電位にする。
As shown in FIG.
, 702, and the common base 703 of transistors 701 and 702 is set to a higher potential than the bases of 203 and 204 during PAL, and lower than the bases of 203 and 204 during NTSC.

第9図にNTSC時の各部の位相、第10図にPAL時
の位相ケ示す。この場合は前出の説明とまったく同様で
ある。第10図にPAL時の各部の位相を示す。この場
合B−Y軸0軸方0方向搬送波30.31は入力されな
いため34. 36,36゜37の位相は90°、27
♂、  9dO+  2yO°となる。
FIG. 9 shows the phase of each part in NTSC mode, and FIG. 10 shows the phase in PAL mode. This case is exactly the same as the previous explanation. FIG. 10 shows the phase of each part during PAL. In this case, the B-Y axis 0 axis direction 0 direction carrier wave 30.31 is not input, so 34. The phase of 36, 36°37 is 90°, 27
♂, 9dO+2yO°.

APC恢肢器4へ加えられる差動入力位相は、PAL時
、NTSO時とも90°であり、キラー検波3に加えら
れる差動入力位相は、PAL時90’。
The differential input phase applied to the APC detector 4 is 90° both in PAL and NTSO, and the differential input phase applied to the killer detector 3 is 90' in PAL.

NloSC時45°となる。この様子を第11図、第1
2図に示す。
It becomes 45° at NloSC. This situation is shown in Figure 11,
Shown in Figure 2.

以」二のように本発明によnば、PAL/NTSC両方
式においてキラー感度の差異がなくなり、両方式間の不
自然さをなくすことができるものである。
As described above, according to the present invention, there is no difference in killer sensitivity between both PAL/NTSC systems, and unnaturalness between the two systems can be eliminated.

【図面の簡単な説明】[Brief explanation of the drawing]

第1(9)idN”l’ S G方式のカラーテレビジ
ョン受像機のブロック図、第2図は同受像機のTINT
回路の回路図、第3図はTINT中央時中央部の位相を
示すベクトル図、第4図は同TINTy化時の各部の位
相ケ示すベクトル+W、第5図id P AL/N T
 S C両用システムのカラーテレビジョン受像機のブ
ロック図、第6図、第7図は同受像機のキラー検波のベ
クトルおよび波形図、第8図はラー検波出力のベクトル
および波形図、第13図は本発明一実施例における色信
号処理装置のブロック線図である。 1・・・・・・電圧制御発振器、2・・・・・・移相器
、3・・・・・・キラー検波器、4・・・・・・A20
m波器、5・・・・・・ローパスフィルタ、6・・・・
・・B−Ya調器、7・・・・・・R−Y復調器、SW
l、SW2・・・・・・スイッチ、14・・・・・・加
算器、15・・・・・・減算器、12・・・・・1Hト
イレイライン、60.61,64.65・・・・・・ス
イッチ、54・・・・・・制御信号、62,63,66
.67・・・・・・位相反転器。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第2
図 第3図 /?−Y# 96’ P−Yk /?r 第6図 ハ゛−ストイ之釦 h       ntr      tH2n4J  
    n+4(#6hイう、* −4/Iし?M才1
1)第7図 B    JtL     n+Z    n+2  
 7+t4第8図 第9図 第 10図 第11図 第12図
1 (9) idN"l' SG A block diagram of a G system color television receiver, and Figure 2 is a TINT of the same receiver.
Circuit diagram of the circuit, Figure 3 is a vector diagram showing the phase of the center part when TINT is at the center, Figure 4 is a vector diagram showing the phase of each part when the same TINTy is converted, Figure 5 is id P AL / N T
A block diagram of a color television receiver for an SC dual-use system. Figures 6 and 7 are vector and waveform diagrams of the killer detection of the same receiver. Figure 8 is a vector and waveform diagram of the error detection output. Figure 13. FIG. 1 is a block diagram of a color signal processing device according to an embodiment of the present invention. 1... Voltage controlled oscillator, 2... Phase shifter, 3... Killer detector, 4... A20
m-wave device, 5...Low pass filter, 6...
...B-Ya modulator, 7...R-Y demodulator, SW
l, SW2...Switch, 14...Adder, 15...Subtractor, 12...1H toilet line, 60.61, 64.65. ...Switch, 54...Control signal, 62, 63, 66
.. 67... Phase inverter. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
Figure 3/? -Y# 96' P-Yk /? r Fig. 6 High Stoy Button h ntr tH2n4J
n+4 (#6h, * -4/I?M-year-old 1
1) Figure 7B JtL n+Z n+2
7+t4Figure 8Figure 9Figure 10Figure 11Figure 12

Claims (1)

【特許請求の範囲】[Claims] 第1のカラーテレビ信号受信モードと第2のカラーテレ
ビ信号受信モードで切り替わるスイッチ手段と、バース
ト信号から色副搬送波を再生するAPC色同期手段と、
バースト信号を位相検波してキラー出力を取り出すキラ
ー検出手段と、APCループ内に副搬送et移相する移
相手段とを具備し、前記スイッチ手段により、キラー検
出手段に加わる副搬送波の位相を第1の受信モードと第
2の受信モードにて(−j−士下)(ただしn−0゜1
.2・ 3・・・・・リラジアンの位相差をもたせるこ
とを特徴とした色信号処理装置。
a switch means for switching between a first color television signal reception mode and a second color television signal reception mode; and an APC color synchronization means for reproducing a color subcarrier from the burst signal;
It is equipped with a killer detection means for phase detecting a burst signal to extract a killer output, and a phase shift means for shifting the phase of the subcarrier et in the APC loop, and the switch means shifts the phase of the subcarrier applied to the killer detection means. In the first reception mode and the second reception mode (-j-shige) (however, n-0゜1
.. 2. 3... A color signal processing device characterized by providing a phase difference of liradians.
JP9966782A 1982-06-09 1982-06-09 Color signal processor Granted JPS58215888A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9966782A JPS58215888A (en) 1982-06-09 1982-06-09 Color signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9966782A JPS58215888A (en) 1982-06-09 1982-06-09 Color signal processor

Publications (2)

Publication Number Publication Date
JPS58215888A true JPS58215888A (en) 1983-12-15
JPS6242431B2 JPS6242431B2 (en) 1987-09-08

Family

ID=14253380

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9966782A Granted JPS58215888A (en) 1982-06-09 1982-06-09 Color signal processor

Country Status (1)

Country Link
JP (1) JPS58215888A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831680A (en) * 1995-03-15 1998-11-03 Nec Corporation Color signal processing circuit capable of processing PAL/NTSC color television signals which prevents image deteriorization caused by chromatization
EP1947867A1 (en) * 2005-10-11 2008-07-23 Matsushita Electric Industrial Co., Ltd. Chroma killer detection circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501496A (en) * 1973-05-09 1975-01-09
JPS5380913A (en) * 1976-10-16 1978-07-17 Toshiba Corp Singnal processing circuit
JPS5627035A (en) * 1979-08-08 1981-03-16 Nissan Motor Co Ltd Fuel controlling device of gas turbine
JPS5715582U (en) * 1980-07-02 1982-01-26

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715582B2 (en) * 1973-05-31 1982-03-31

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS501496A (en) * 1973-05-09 1975-01-09
JPS5380913A (en) * 1976-10-16 1978-07-17 Toshiba Corp Singnal processing circuit
JPS5627035A (en) * 1979-08-08 1981-03-16 Nissan Motor Co Ltd Fuel controlling device of gas turbine
JPS5715582U (en) * 1980-07-02 1982-01-26

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831680A (en) * 1995-03-15 1998-11-03 Nec Corporation Color signal processing circuit capable of processing PAL/NTSC color television signals which prevents image deteriorization caused by chromatization
EP1947867A1 (en) * 2005-10-11 2008-07-23 Matsushita Electric Industrial Co., Ltd. Chroma killer detection circuit
EP1947867A4 (en) * 2005-10-11 2010-09-29 Panasonic Corp Chroma killer detection circuit
US8031269B2 (en) 2005-10-11 2011-10-04 Panasonic Corporation Chroma killer detection circuit

Also Published As

Publication number Publication date
JPS6242431B2 (en) 1987-09-08

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