JPH03130100U - - Google Patents
Info
- Publication number
- JPH03130100U JPH03130100U JP3847690U JP3847690U JPH03130100U JP H03130100 U JPH03130100 U JP H03130100U JP 3847690 U JP3847690 U JP 3847690U JP 3847690 U JP3847690 U JP 3847690U JP H03130100 U JPH03130100 U JP H03130100U
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- diodes
- signal
- input terminal
- inverting input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims 3
- 238000010586 diagram Methods 0.000 description 4
Description
第１図は本考案の一実施例に係るピークホール
ド回路の構成図、第２図は同実施例の動作を説明
するための信号波形図、第３図は従来のピークホ
ールド回路の構成図、第４図は第３図の動作を説
明するための信号波形図である。
ＯＰ１，ＯＰ２……オペアンプ、Ｄ１〜Ｄ３…
…ダイオード、Ｔｓｗ……スイツチング素子。
FIG. 1 is a block diagram of a peak hold circuit according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram for explaining the operation of the same embodiment, and FIG. 3 is a block diagram of a conventional peak hold circuit. FIG. 4 is a signal waveform diagram for explaining the operation of FIG. 3. OP1, OP2... operational amplifier, D1-D3...
...Diode, Tsw...Switching element.
Claims (1)
のオペアンプと、このオペアンプの出力信号が電
流制限用の抵抗及び２個のダイオードを直列に介
して非反転入力端に入力される第２のオペアンプ
と、上記２個のダイオードを介して出力される信
号が電流制限用の抵抗を介して入力されるピーク
電圧保持用のホールドコンデンサと、上記電流制
限用抵抗とホールドコンデンサとの直列回路に並
列に設けられ、リセツト信号により上記ホールド
コンデンサをリセツトするスイツチング素子と、
上記２個のダイオードを介して出力される信号を
上記第１のオペアンプの反転入力端にフイードバ
ツクするフイードバツク手段と、上記第２のオペ
アンプの出力信号をピークホールド出力すると共
に自己の反転入力端にフイードバツクし、更に抵
抗を介して上記２個のダイオードの中間点に入力
する手段とを具備したことを特徴とするピークホ
ールド回路。 The first one, in which the analog signal is input to the non-inverting input terminal.
an operational amplifier, a second operational amplifier in which the output signal of this operational amplifier is input to the non-inverting input terminal via a current limiting resistor and two diodes in series, and the output signal is output via the above two diodes. A hold capacitor for holding a peak voltage to which a signal is input via a current limiting resistor, and a switching device that is provided in parallel with the series circuit of the current limiting resistor and the hold capacitor, and resets the hold capacitor by a reset signal. Motoko and
Feedback means for feeding back the signal outputted through the two diodes to the inverting input terminal of the first operational amplifier, and holding the output signal of the second operational amplifier at its peak and feeding it back to the inverting input terminal of the second operational amplifier. and further comprising means for inputting the input to the midpoint between the two diodes via a resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3847690U JPH03130100U (en) | 1990-04-12 | 1990-04-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3847690U JPH03130100U (en) | 1990-04-12 | 1990-04-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03130100U true JPH03130100U (en) | 1991-12-26 |
Family
ID=31546516
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3847690U Pending JPH03130100U (en) | 1990-04-12 | 1990-04-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03130100U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002288990A (en) * | 2001-03-22 | 2002-10-04 | Hitachi Shonan Denshi Co Ltd | Peak hold circuit |
-
1990
- 1990-04-12 JP JP3847690U patent/JPH03130100U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002288990A (en) * | 2001-03-22 | 2002-10-04 | Hitachi Shonan Denshi Co Ltd | Peak hold circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH03130100U (en) | ||
| JPS6083408A (en) | Current converting circuit | |
| JPS6410816U (en) | ||
| JPS6168517U (en) | ||
| JPS6421418U (en) | ||
| JPS5925839U (en) | One-shot multivibrator circuit | |
| JPS628726U (en) | ||
| JPS61160516U (en) | ||
| JPH0314826U (en) | ||
| JPH01101126U (en) | ||
| JPH02118485U (en) | ||
| JPH0390315U (en) | ||
| JPS645457U (en) | ||
| JPH0379525U (en) | ||
| JPH0485158U (en) | ||
| JPH0469924U (en) | ||
| JPH01146174U (en) | ||
| JPS5945753U (en) | Tape end detection device | |
| JPS6195128U (en) | ||
| JPH0433115U (en) | ||
| JPS5850452B2 (en) | pulse shaping circuit | |
| JPS615029U (en) | Sawtooth wave generator | |
| JPH0379567U (en) | ||
| JPH026316U (en) | ||
| JPS6253825U (en) |