JPH0313005A - Multi-gain amplifier - Google Patents

Abstract

PURPOSE:To eliminate spike noise by using an analog switch provided with a base effect compensation circuit correcting the fluctuation of an impedance between input and output terminals for a 1st switch and using an analog switch not provided with the base effect compensation circuit for a 2nd switch. CONSTITUTION:Analog switches 8, 9 may generate spike noise by providing a base effect compensation circuit 39. Since the analog switches are not connected to an operational amplifier 1, the noise is not inputted to the operational amplifier 1. On the other hand, analog switches 6, 7 connecting to a resistor 2 have no base effect compensation circuit, therefore for impedance is changed by an input voltage Vi. Since the input resistance of the operational amplifier 1 is large, a current flowing to the analog switch 6 is very small. Since the potential fluctuation at a connecting point due to the changeover of the analog switches is less, a fast response is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a multi-gain amplifier suitable for use by switching gains.

"Conventional technology" A circuit diagram of a conventional multi-gain amplifier is shown in FIG.

In the figure, l is an operational amplifier, and its output signal voltage V
. is output to the output terminal 17. 6.7.13 and 14
is a bidirectional analog switch, and each has a control terminal labeled C in the figure and a pair of input/output terminals not labeled. In these analog switches, when a "1" level signal is supplied to the control terminal C, the input and output terminals become conductive, and the signal becomes 0".
When a level signal is supplied, the input and output terminals become non-conductive. 10 is an oscillation prevention capacitor. In the figure, S
Co and SC8 are control signals that are manually input in a complementary manner so that when one becomes "1" level, the other becomes "0" level. The control signals SCo and SC1 are supplied to the control terminals C of the analog switches 6 and 7, respectively, and are inverted by the inverters 11 and 12, respectively, and are set to (1) at the control terminals C of the analog switches 13 and 14. , analog switches 6 and 13 become conductive or non-conductive in a complementary manner, and analog switches 7 and 14 similarly become conductive or non-conductive in a complementary manner.

16 is an input terminal to which a human power signal voltage Vi is applied from the outside. Resistor 2 (resistance value R4°) and resistor 4 (resistance value R2°) are inserted in series between input terminal 16 and output terminal 17. Similarly, resistor 3 (resistance value R2°) is inserted in series. R0
) and a resistor 5 (resistance value R21) are inserted in series. Analog switches 6 and 13 are inserted in series between the inverting input terminal of operational amplifier 1 and ground, and the connection point between these analog switches 6 and 13 is the connection point between resistors 2 and 4. It is connected. Similarly, analog switches 7 and 14 are inserted in series between the inverting input terminal of operational amplifier 1 and the ground, and the connection point between analog switches 7 and 14 is the connection point between resistors 3 and 5. It is connected to the.

The above component 2.4.6.11.13 is the gain setting circuit 5
0 and the component 3.5.7.12.14 constitutes the gain setting circuit 51.

In the above configuration, the control signal SCo is set to "1" level,
When the control signal S01 is set to 0 level, the analog switches 6 and 14 become conductive, and the analog switches 7 and 13 become non-conductive. Since the resistors 3 and 5 are connected to the ground via the analog input terminal 14, the input resistance R and voltage gain G of the multi-gain amplifier as seen from the input terminal 16 are . is as follows.

Rr= Rlo / / R+1 = R1'0R11/ (R1[l+R11)----
(1) Go=-R,, /R,, -... (2) Also, if the signal SCo is set to the "0" level and the signal SC1 is set to the °1 level, the input resistance R1 is calculated as the formula (1). The voltage gain G at this time is G, = −R□1/R
1...(3).

By the way, analog switch 6.7.13 in Figure 4
and 14 are so-called C-MOS type analog switches, which are constructed as shown in FIG. In FIG. 2, reference numerals 20 and 21 are P-channel and N-channel field effect transistors (FETs), respectively, whose source and drain ends are connected to input/output terminals 23 and 24, respectively. In addition, a positive voltage V is applied to the back gate terminal of FET20.21. I) and a negative voltage vs8 are each applied. 26 is a control end, which is connected from the outside.
1" level or +1o'1 level control signal SC
is supplied. The signal SC is supplied to the gate end of the FET 20, and is inverted by the inverter 25.
0 gate 21.

In the above configuration, 1. When the control terminal 26 is supplied with the signal SC of the "0" level, the signal SC of the "0" level is supplied to the gate terminal of the FET 21, and the FET 2
A signal of "■" level is supplied to the gate end of 0. This causes FETs 20 and 21 to become non-conductive, so
Ana9gusinoch becomes non-conductive. On the other hand, when a 1" level signal SC is supplied to the control terminal 26, F
A signal SC of "■" level is supplied to the gate end of ET21, and a signal SC of level "°0°" is supplied to the gate end of FET20.Thereby, FET20.21
becomes conductive, so the analog switch becomes conductive.

By the way, in a state where the relationship between the potential of the input voltage to the analog switch and the potential of the source of the analog switch creates a reverse bias between the source and the back gate (base), M
This has the effect of increasing the effective value of the OS transistor's threshold voltage (1) and increasing the on-resistance of the analog switch (substrate voltage effect), resulting in large fluctuations in the on-resistance depending on the input voltage. As a result, in FIG. 4, the potential at the connection point between the analog switches 13 and 6 and 14 and 7 rises significantly above the ground potential due to the voltage drop in the on-resistance section due to the inflow current, and the fluctuation becomes large. On the other hand, when the analog switch 6 or 7 is conductive, the current flowing into the inverting input terminal of the operational amplifier 1 is small, so the voltage drop is small (the potential at the connection point of the switch is almost the ground potential. When the switch is switched, the potential at the connection point of the analog switch fluctuates greatly, causing a problem in that the response of the amplifier becomes slow.

In order to solve this problem, an analog switch shown in FIG. 3 was developed. In FIG. 3, parts corresponding to those in FIG. 2 are designated by the same reference numerals, and explanations thereof will be omitted.

In the figure, 39 is a substrate voltage effect compensation circuit, and the FET
32, 33, 34 and an inverter 30. The drain ends of FETs 32 and 33, the source ends of FET 34, and the back gate end of FET 21 are connected to each other. Further, the control terminal 26 is connected to the gate terminal of the FET 34 and, via the inverter 30, to the gate terminals of the FETs 32 and 33. FE
The source ends of T33 and T34 are connected to the input/output end 24, and a negative voltage V55 is applied to the source end and back gate end of FET'32. In addition, a positive voltage ■ is applied to the back gate end of FET'33. D is applied.

According to the above configuration, when the 1" level signal SC is supplied to the control terminal 26, the FETs 33 and 34 become conductive, and the voltage V applied to the input/output terminal 24 is applied to the FET 3.
3.34 to the back gate end of FET21. Thereby, an increase in impedance due to the substrate voltage effect of the FET 21 can be corrected. Moreover, when a "0" level signal is supplied to the control terminal 26,
FETs 33 and 34 become non-conductive, and FET 32
becomes conductive. Therefore, )<2 gate end 31
A negative voltage VS5 is applied to.

According to the above operation, the analog switch 6 in FIG.
．． 7. If 13 and 14 are configured as shown in FIG. 3, the influence of the substrate voltage effect described above can be reduced. That is, when the human input signal voltage v1 changes, the impedance values of the analog switches 13 and 14 and their fluctuations become smaller. Therefore, the potential at the connection point between the analog switches 6, 13, 7, and 14 is almost close to the ground potential, and fluctuations are small, so that the amplifier response when switching the analog switches becomes faster.

"Problem to be Solved by the Invention" By the way, in the analog switch shown in FIG. 3, when the control signal SC supplied to the control terminal 26 is changed from the "0" level to the "1" level, the The applied voltage is from voltage Vss to ■,
changes rapidly. By changing rapidly, FET
Since the charge stored in the junction capacitance between the gate and the channel of 21 is rapidly discharged, there is a problem in that spike-like noise appears at the input/output terminals 23 and 24.

That is, in the multi-gain amplifier shown in FIG. 4, if the analog switches 46.7, '13 and 14 are configured as shown in FIG. As a result, analog switch 6
There is a problem in that the potential at the connection points between There was a problem.

An object of the present invention is to provide a multi-gain amplifier in which the potential at the connection point between analog switches 6 and 13 and between analog switches 7 and 14 is approximately constant when the switches are on and off, and does not generate spike noise. .

"Means for Solving the Problems" In order to solve the above problems, the present invention includes an input terminal, an amplifier that inverts and amplifies a signal supplied to an inverting input terminal and outputs the inverted and amplified signal to an output terminal; It includes first and second resistors sequentially inserted in series between the output terminal and first and second switches sequentially connected in series between ground and the inverting input terminal. , a plurality of gain setting circuits configured by connecting the connection points of the first and second resistors and the connection points of the first and second switches, respectively; Selectively turn on,
In a multi-gain amplifier configured to complementarily turn off the first switch connected to the multi-gain amplifier, base effect compensation is provided for correcting the value of impedance between the input and output terminals of the first switch and its fluctuation. The present invention is characterized in that an analog switch equipped with a circuit is used, and an analog switch not equipped with the base effect compensation circuit is used as the second switch.

"Operation" When the second switch of any gain setting circuit is turned on, the second switch of the other gain setting circuit is turned off. Further, the switch of each part 1 is turned on/off complementary to the corresponding second switch. And the second one turned on
The first and second resistors connected to the switch become connected to the inverting input terminal of the amplifier, and these first and second resistors are connected to the inverting input terminal of the amplifier.
The gain of the multi-gain amplifier is set by the ratio of the resistance values of the second resistor and the second resistor. Further, the first resistors connected to the other gain setting circuits are each connected to ground through a corresponding first switch.

In the present invention, since the second switch is not equipped with a base effect compensation circuit, no spike-like noise is generated here. On the other hand, since the first switch is equipped with a base effect compensation circuit, its impedance value and its fluctuation are small. In addition, the first switches are equipped with a base effect compensation circuit, which may generate spike-like noise, but since these first switches are not connected to the amplifier, noise is applied to the amplifier. Not done.

"Example" Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the electrical configuration of a first embodiment of the present invention. In the figure, the same reference numerals are given to the parts corresponding to those in FIG. 4, and the explanation thereof will be omitted.

In the figure, 6 and 7 are analog switches not equipped with a base effect compensation circuit (see FIG. 2), and 8 and 9 are analog switches equipped with a base effect compensation circuit 39 (see FIG. 3). The configuration other than the above is the same as that in FIG. 4.

In addition, component 2.4.6.8, ll is a gain setting circuit 5.
2 and components 3.5.7.9.12 constitute a gain setting circuit 53.

In the above configuration, the signal SCo is set to "1" level, and the signal s
When c is set to °'O'' level, analog switches 6 and 9 become conductive, and analog switches 7 and 8 become non-conductive, as in FIG. 4. At this time, analog switches 8 and 9 The provision of the compensation circuit 39 may generate spike-like noise. However, these analog switches
Since this noise is not connected to the operational amplifier l, this noise is not input to the operational amplifier l. Furthermore, since the analog switch 9 is equipped with a base effect compensation circuit 39, the value and fluctuation of the on-resistance of the analog switch 9 are small, and therefore the potentials at the contact points of the analog switches 8, 6, 9, and 7 are It is close to ground potential and fluctuations are small. On the other hand, since the analog switch connected to the resistor 2 does not have a base effect compensation circuit, its impedance changes depending on the input voltage V. However, since the input resistance of the operational amplifier 1 is large, the current flowing through the analog switch 6 is scarce. Therefore, analog switches 8 and 6.9 and 7
The potential at the connection point is almost the same as the virtual ground potential. Therefore, according to the above configuration, there is little potential fluctuation at the connection point due to switching of the analog switch.
It has the advantage of fast response.

Note that this embodiment has two gains G shown in equations (2) and (3). and G are selected and used at any time,
By appropriately adding resistors, analog switches, etc., it is also possible to configure a structure in which three or more stages of gains can be selected.

"Effects of the Invention" As explained above, according to the present invention, it is possible to provide a multi-gain amplifier whose input impedance is substantially constant and which does not generate spike noise.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of analog switches 6 and 7 in FIG. 1, and FIG. 3 is a circuit diagram of analog switches 8 and 9 in FIG.
FIG. 4 is a circuit diagram of a conventional multi-gain amplifier. l...Operational amplifier (amplifier), 2.3...
...Resistor (first resistor 1), 4.5...Resistor (second resistor), 6.7...Analog switch (second switch), 89 ...Analog switch (first switch), 'L6...Input terminal, 17...Output terminal, 39...Base effect compensation circuit, 5253...Gain Setting circuit.

Claims (1)

[Claims] (a) an input terminal; (b) an amplifier that inverts and amplifies a signal supplied to an inverting input terminal and outputs the amplified signal to an output terminal; (c) between the input terminal and the output terminal first and second resistors connected in series in sequence between the ground and the inverting input terminal;
a plurality of gain setting circuits each connecting a connection point between the first and second resistors and a connection point between the first and second switches; In the multi-gain amplifier configured to selectively turn on one of the two switches and complementary turn off the first switch connected to the multi-gain amplifier, the input and output terminals are connected to the first switch. A multi-gain amplifier characterized in that an analog switch equipped with a base effect compensation circuit for correcting impedance fluctuations between the first and second switches is used, and an analog switch not equipped with the base effect compensation circuit is used as the second switch.