JPH03125477A - Manufacture of hetero junction bipolar transistor - Google Patents

Abstract

PURPOSE:To enable a higher current amplification factor by specifying an emitter area by ion implantation, forming a side wall on an ion implantation mask, and carrying out etching. CONSTITUTION:H<+> is implanted until it reaches a layer 3, using multi-layer structural materials which comprise an n-type high doped GaAs layer 2, an n-type doped AlGaAs layer 3, a p-type doped GaAs layer 4, an n-type doped GaAs layer 5, and an n-type high doped GaAs layer 6, which have formed epitaxially on a semi-insulation GaAs substrate 1, thereby forming partially a higher resistant region 8 on the AlGaAs layer 3. In this process, a part of the layer 3 is defined as an emitter region 11. Then, an SiO2 9 is formed across the substrate, and anisotropic dry etching is carried out, thereby forming an SiO2 9-made side wall 10 on a mask 7. Then, the GaAs film 4 is exposed by wet etching.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a heterojunction bipolar transistor having a collector top structure.

Conventional technology A heterojunction bipolar transistor (rHBT) uses a semiconductor with a larger bandgap for the emitter than the semiconductor that forms the base in a bipolar transistor.
Research and development is currently being actively conducted as one of the leading candidates for ultra-high speed and ultra-high frequency transistors. Collector top type HBTs are broadly classified into collector top type HBTs placed at the top.Collector top type HBTs have a base-collector capacitance that can be reduced compared to emitter top type HBTs.
It has the advantage of being able to operate at higher speeds and making it easier to form emitter-grounded integrated circuits. However, collector-top HBTs have a structure in which the electron force injected from the emitter to the base (because it is easily absorbed into the base electrode) makes it difficult to obtain a high current amplification factor.
As a method of suppressing this phenomenon, there are methods of increasing the resistance under the external base or forming a pn junction between the external base and the emitter, which has a higher on-voltage than that between the intrinsic base and emitter.

A conventional example of a method for manufacturing a collector top type HBT will be described with reference to the drawings. On the semi-insulating GaAs substrate 41 as shown in FIG. 3(a)? Qn-type highly doped GaAs layer 4λ n-type doped AlGaA
s layer 43. P-type doped GaAs layer 44Sn-type doped GaAs layer 45. Highly doped n-type Ga
The As layer 46 is epitaxially formed to form a multilayer structure material, and then etched as shown in FIG.
After forming an ion implantation mask 61 and etching down to the p-type doped GaAs layer 44, hydrogen ions (H3) are implanted (to form a high resistance region 56 as shown in FIG. 3(c)). Then, photolithography and etching are performed to form a transistor structure, and an emitter electrode 58, a base electrode 5Q, and a collector electrode 60 are respectively formed as shown in FIG. 51.
．． 52, 53, 54, 55 are emitter contacts.

Each area of the emitter and collector contact consists of layers 42, 43, 44 and 45, 46, respectively.

Problems to be Solved by the Invention However, the manufacturing method described above (Tomo Figure 2)
As shown in a), side etching occurs during etching to form the collector mesa (step shown in Figure 3), and the collector-base junction area becomes smaller than the intrinsic base-emitter junction area, causing the emitter to be separated from the periphery. Electrons Q injected into the base are more easily absorbed into the base electrode than into the collector. Therefore, the problem is that the smaller the collector size is, the smaller the current amplification factor is compared to the emitter top type. The present invention provides a method for manufacturing a collector top type HBT having a high current amplification factor.

Means for Solving the Problems In order to solve the above problems, in the present invention, the emitter area is defined by ion implantation. A feature is that a collector having a larger area than the emitter is formed by self-alignment with the emitter.

Effect: In the above HBT manufacturing method, the collector having a larger area than the emitter is formed by self-alignment with the emitter. Therefore, it is possible to fabricate a collector-top type HBT with a high current amplification factor.

EXAMPLE Hereinafter, a method for manufacturing an HBT according to an example of the present invention will be described with reference to the drawings.

As shown in FIG. 1(a), a semi-insulating GaAs substrate 1 is formed; second, a heavily n-doped GaAs layer 2, an n-doped AlGaAs layer 3, and a p-doped GaAs layer 2;
Using a multilayer structure material in which an As layer 4, an n-type doped GaAs layer 5, and a highly n-type doped GaAs layer 6 are epitaxially formed, an ion implantation and etching mask 7 made of 5iOa having a predetermined size is formed. Form. Next, as shown in the same figure (b), 120KeV, I E 14
The row t is set so that H reaches the injection layer 3 under the condition of cm-'.
, X, a high resistance region 8 in a part of the AlGaAs layer 3
form. In this step, a part of the layer 3 (the part where the mask 7 is placed) is defined as the emitter region 11.

By forming E 5iO29 on the entire surface and performing anisotropic dry etching, a side wall IO made of 5iOa9 as shown in FIG. 7(d) is formed on the mask 7. Then, as shown in the same figure (e), E
The GaAs layer 4 is exposed by wet etching. The following steps are to fabricate a transistor in the same manner as in the conventional example. In this process, the width of the mask 7 is increased at the side wall 1o. Even if side etching occurs under the mask during wet etching, the width of the remaining collector layer 6 is made wider than the emitter region 11 below. It becomes possible to do so.
The collector can be formed in self-alignment with the emitter, which is extremely effective in terms of process. The completed drawing is shown in the same figure (f). 16 is an element isolation region 41
1, +2.13.14.15 are emitters, emitter contacts.

In each region of the Boehm collector and collector contact layer 3. 2. 4. 6. Consists of 5.

In the embodiment, the high resistance region 8 is formed using H+ implantation, and beryllium ions (Be'') and magnesium ions (Mg'') are implanted to create a higher on-voltage between the external base and emitter than between the intrinsic base and emitter. It is also possible to form a pn junction with a large value.

In the embodiment, it is also possible to use wet etching to expose the base layer and dry etching.

In the embodiment, it is also possible to form a rectangular collector electrode using an ion implantation and etching mask made of It 5iCh and use it as a mask.

FIG. 2(b) shows the details of the collector base in the present invention. Because the collector is wide, electrons injected into the base are not sucked into the base electrode 18, and the current amplification factor is reduced. Does not occur.

Effects of the Invention As described above, the method for manufacturing an HBT having the structure of the present invention makes it possible to form a collector having a larger area than the emitter in self-alignment with the emitter. A current amplification factor comparable to that of a conventional type can be obtained.Also, even if the collector size becomes smaller, the current amplification factor does not decrease.

[Brief explanation of drawings]

Figures 1(a,) to (f) show the HB in the embodiment of the present invention.
Cross-sectional view showing the manufacturing method of T Figure 2 (a), (b) (
Figures 3(a) to 3(d) are cross-sectional views showing the conventional HBT manufacturing method.

Claims (3)

[Claims] (1) In a method for manufacturing a heterojunction bipolar transistor in which the emitter uses a semiconductor material having a wider forbidden band width than the base, from the substrate side a semiconductor layer for forming at least an emitter region, a semiconductor layer for forming a base region, a step of sequentially stacking semiconductor layers for forming a collector region; a step of forming a mask of a predetermined size and performing ion implantation until at least reaching the semiconductor layer for forming the emitter region; A method for manufacturing a heterojunction bipolar transistor, comprising the step of forming sidewalls on the mask and etching up to a semiconductor layer for forming the base region. (2) A method for manufacturing a heterojunction bipolar transistor according to claim 1, wherein the etching is wet etching. (3) A method for manufacturing a heterojunction bipolar transistor according to claim 1, wherein the ion implantation is hydrogen ion implantation.