JPH03122753A - Processor control system - Google Patents

Processor control system

Info

Publication number
JPH03122753A
JPH03122753A JP26107089A JP26107089A JPH03122753A JP H03122753 A JPH03122753 A JP H03122753A JP 26107089 A JP26107089 A JP 26107089A JP 26107089 A JP26107089 A JP 26107089A JP H03122753 A JPH03122753 A JP H03122753A
Authority
JP
Japan
Prior art keywords
processor
state
request
processors
disconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26107089A
Other languages
Japanese (ja)
Inventor
Takeshi Momoi
桃井 武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP26107089A priority Critical patent/JPH03122753A/en
Publication of JPH03122753A publication Critical patent/JPH03122753A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To dynamically change the number of driven processors without stopping a system by setting up the state of each processor to a fixed state to integrate the processor. CONSTITUTION:Three states, i.e. a driven state (ALIVE), a stopped state (DEAD) and a transfer state (FETUS) from the stopped state to the driven state, are prepared as the states of each processor. In the case of newly integrating a processor into the system, the FETUS processing of the processor concerned is executed after checking the DEAD state of the processor to request the integration of the processor. The processor receiving the request checks its own FETUS state and then executes processing for turning itself to the ALIVE state. A task scheduler allocates a task to the ALIVE processor. Consequently, the number of processors can be dynamically changed during the operation of the system.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は、マルチプロセッサシステムにおいて。[Detailed description of the invention] [Industrial application fields] The present invention relates to a multiprocessor system.

システムを停止させることなく、稼働プロセッサ数を動
的に変化させることを可能にする。プロセッサ管理方式
に関する。
It is possible to dynamically change the number of operating processors without stopping the system. Regarding processor management methods.

[従来技術その課題] 従来(7)ALIVE、DEADの2状態ニヨルプロセ
ッサ管理方式において、プロセッサの組み入れ処理を実
現するためには、他のプロセッサが。
[Prior art and its problems] In the conventional (7) two-state processor management system of ALIVE and DEAD, in order to implement processing for incorporating a processor, other processors must be connected.

組み入れようとするプロセッサの状態を、直接ALIV
Eにすることにより、実現するしかなかった。この実現
法においては、新たにシステムに組み入れられるプロセ
ッサが故障していて、稼働できない場合に、該当プロセ
ッサが現実には稼働していないのに、ALIVEと書か
れているために。
Direct ALIV of the state of the processor to be incorporated
The only way to achieve this was to change it to E. In this implementation method, if a processor newly incorporated into the system is malfunctioning and cannot be operated, the processor is marked as ALIVE even though it is not actually operating.

システムからは稼働しているように見えてしまう。The system appears to be working.

そのため、システム上の他のプロセッサから、該当プロ
セッサに対して、要求を発行した場合、処理完了の永久
待ち状態に陥ることになってしまっていた。従来の方式
では、上記のような問題のため、システム稼働中に新た
にプロセッサを組み入れることができなかった。
Therefore, when a request is issued to the corresponding processor from another processor on the system, the request is placed in an eternal waiting state for the processing to be completed. In the conventional system, due to the above-mentioned problems, it was not possible to install a new processor while the system was in operation.

[課題を解決するための手段] 本発明によるプロセッサ管理方式は、プロセッサ状態と
して。
[Means for Solving the Problems] A processor management method according to the present invention uses a processor state as a processor state.

a)マルチプロセッサシステム中のすべてのプロセッサ
から見て自プロセッサが稼働していると認識された状態
(以下この状態をAL I VEと書く)と。
a) A state in which the own processor is recognized as operating from the perspective of all processors in the multiprocessor system (hereinafter this state will be referred to as ALIVE).

b)マルチプロセッサシステム中のすべてのプロセッサ
から見て自プロセッサが停止していると認識された状態
(以下この状態をDEADと書く)と2 C)自プロセッサのみが自プロセッサの稼働を認識し、
かつ、他プロセッサから見て自プロセッサが停止してい
ると認識された状態(以下この状態をFETUSと書く
)と を有し。
b) A state in which the own processor is recognized as stopped from the perspective of all processors in the multiprocessor system (hereinafter this state will be referred to as DEAD); and 2) C) Only the own processor recognizes that the own processor is operating.
It also has a state (hereinafter this state will be referred to as FETUS) in which the own processor is recognized as stopped from the perspective of other processors.

イ)プロセッサ状態がALIVEのプロセッサに切り離
し要求を行なう手段と。
b) means for issuing a disconnection request to a processor whose processor status is ALIVE;

口)前記切り離し要求を受けたプロセッサが。口) The processor that received the disconnection request.

切り離し動作までに完了すべき処理を行った後に、プロ
セッサ状態をDEADにし、プロセッサ切り離しを行な
う手段と。
Means for setting the processor state to DEAD and disconnecting the processor after performing processing to be completed before the disconnection operation.

ハ)プロセッサ状態がDEADのプロセッサに組み入れ
要求を行う手段と。
c) means for requesting integration into a processor whose processor status is DEAD;

二)前記組み入れ要求を受けたプロセッサが。2) The processor that received the incorporation request.

プロセッサ状態をFETUSにし1組み入れ動作までに
完了すべき処理を行った後に、プロセッサ状態をALI
VEにし、プロセッサ組み入れを行う手段と を有することを特徴としている。
After setting the processor state to FETUS and performing the processing that should be completed by one installation operation, change the processor state to ALI.
It is characterized in that it has a means for making it a VE and incorporating a processor.

[実施例] 次に本発明の実施例について、第1図を参照しながら説
明する。
[Example] Next, an example of the present invention will be described with reference to FIG.

まず初めに、プロセッサの状態として、稼働状態(以下
この状態をAL I VEと書く)1停止状態(以下こ
の状態をDEADと書<)、更に停止状態から稼働状態
への移行状態(以下この状態をFETUSと書く)とい
うものを設ける。
First of all, the states of the processor are: an operating state (hereinafter referred to as AL I VE), a stopped state (hereinafter referred to as DEAD), and a transition state from a stopped state to an operating state (hereinafter referred to as this state). (written as FETUS).

共有メモリ上に、システム上の全てのプロセッサの状態
を記録してあり、システム上のすべてのプロセッサから
各プロセッサの存在、およびそのプロセッサの状態を認
識することが可能となっているシステムにおいて、AL
IVEはシステムの全てのプロセッサが、自プロセッサ
の稼働を認識した状態を、DEADはシステムの全ての
プロセッサが、自プロセッサの停止を認識した状態を。
The AL
IVE is a state in which all processors in the system recognize that their own processor is operating, and DEAD is a state in which all processors in the system recognize that their own processor is stopped.

FETUSは自プロセッサのみが自プロセッサの稼働を
認識し、他のプロセッサからは自プロセッサが停止状態
であると認識された状態を、それぞれ指している。
FETUS refers to a state in which only the own processor recognizes that the own processor is operating, and other processors recognize that the own processor is in a stopped state.

システム稼働中に、故障したプロセッサをシステムから
切り離す時には、まずPSIOIで、現在稼働状態のプ
ロセッサが複数存在することを確認する。これは1稼働
状態のプロセッサが1台しかない時に、そのプロセッサ
を切り離してしまうとシステムが停止してしまうためで
ある。その後。
When disconnecting a failed processor from the system while the system is in operation, first confirm using PSIOI that there are multiple processors currently in operation. This is because when there is only one processor in one operating state, if that processor is disconnected, the system will stop. after that.

PS102で、停止要求の対象プロセッサがALIVE
であることを確認の上、PS103で、対象プロセッサ
に対し、システムからのプロセッサの切り離しを行なっ
てもらうための切り離し要求を行なう。すると対象プロ
セッサは、PS104て、要求を受け取り、PS105
で、そのプロセッサで走行していたタスクを、タスクの
走行待ちキューにつなぐことで、そのタスクの処理を終
了させずに、中断させる。中断されたタスクはスケジュ
ーラ−によって、他のプロセッサで走行するように割り
当てられる。タスクを中断した後、PS106で、該当
プロセッサは、自らをDEADにする処理をおこなった
後、PSlolで、プロセッサの稼働を停止する。以上
の動作を行なうことにより、システムを停止させること
なく、該当プロセッサをシステムから切り離すことか可
能となる。
In PS102, the target processor of the stop request is ALIVE.
After confirming that this is the case, the PS 103 issues a disconnection request to the target processor to disconnect the processor from the system. Then, the target processor receives the request at PS104 and sends it to PS105.
Then, by connecting the task that was running on that processor to the task running queue, the processing of that task is interrupted without being terminated. The suspended task is assigned by the scheduler to run on another processor. After interrupting the task, the corresponding processor performs processing to set itself to DEAD at PS106, and then stops the operation of the processor at PSlol. By performing the above operations, it becomes possible to disconnect the relevant processor from the system without stopping the system.

一方、システムに対して新たにプロセッサを組み入れた
い時には、PS108て、新たにシステムに組み入れる
プロセッサが、DEADであることを確認した上で、P
S109で、該当プロセッサに、FETUSにする処理
を行なうことで 該当プロセッサに対して組み入れ要求
を行なう。P5110で、要求を受けたプロセッサは、
PSlllで、自分がFETUSであることを確認した
上で、PS112で、自分をAL I VEにする処理
を行なう。タスクのスケジューラ−はプロセッサの状態
が、ALIVEであるプロセッサに対してタスクを割り
振る。以上の動作を行なうことにより、システムを停止
させることなく、新たにプロセッサをシステムに組み入
れることが可能となる。
On the other hand, when you want to incorporate a new processor into the system, use the PS108 to confirm that the new processor to be incorporated into the system is DEAD, and then
In S109, a request for incorporation is made to the corresponding processor by performing processing to make the corresponding processor FETUS. At P5110, the processor that received the request:
After confirming that it is FETUS at PS11, it performs processing to make itself ALIVE at PS112. A task scheduler allocates tasks to processors whose processor status is ALIVE. By performing the above operations, it becomes possible to incorporate a new processor into the system without stopping the system.

[発明の効果] 以上の説明で明らかなように1本発明により。[Effect of the invention] As is clear from the above description, according to the present invention.

プロセッサの台数をシステムの稼働中において。Number of processors in system operation.

動的に変更可能になり、システム稼働中にプロセッサの
台数を増やしたり、故障したプロセッサをシステムから
切り離すために、システムを停止させる必要がなくなっ
た。また、システム稼働中にプロセッサの台数を増やせ
るようになったため。
It can now be changed dynamically, eliminating the need to stop the system to increase the number of processors while the system is running or to remove a failed processor from the system. Also, it is now possible to increase the number of processors while the system is running.

システムの起動時において、全てのプロセッサが稼働す
るのを待つ必要がなくなり、最初に立ち上がったプロセ
ッサのみで稼働を開始し、他のプロセッサに対しては、
システム稼働後に組み入れ要求を発行して、システム内
のプロセッサ数を増加させることが可能となり、システ
ムの早い立ち上がりを実現することが可能になった。
When the system starts up, there is no need to wait for all processors to start working, and only the first processor that starts up starts working, and other processors
It is now possible to increase the number of processors in the system by issuing an integration request after the system is operational, allowing the system to start up quickly.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例によるプロセッサ管理方式を
説明するためのフローチャートである。 PSlolからPS103はプロセッサの切り離し要求
を行なう処理を示し、PS104がらPSlolは要求
を受けたプロセッサが切り離しを行なう処理を示し、P
S108がらPS109はプロセッサの組み入れ要求を
行なう処理を示しPSlloからPS112は要求を受
けたプロセッサが組み入れを行なう処理を示す。
FIG. 1 is a flowchart for explaining a processor management method according to an embodiment of the present invention. PSlol to PS103 indicates the process of requesting a processor to be disconnected, and PS104 to PSlol indicates the process of the processor receiving the request to disconnect;
S108 to PS109 represent processing for requesting processor installation, and PSllo to PS112 represent processing for installation by the processor that has received the request.

Claims (1)

【特許請求の範囲】 1、互いに接続された複数のプロセッサを有するマルチ
プロセッサシステムにおいて、各プロセッサのプロセッ
サ状態として、 a)前記マルチプロセッサシステム中のすべてのプロセ
ッサから見て、自プロセッサが稼働していると認識され
た第1の状態と、 b)前記マルチプロセッサシステム中のすべてのプロセ
ッサから見て、自プロセッサが停止していると認識され
た第2の状態と、 c)自プロセッサのみが自プロセッサの稼働を認識し、
かつ、他プロセッサから見て自プロセッサが停止してい
ると認識された第3の状態とを有し、 イ)プロセッサ状態が前記第1の状態のプロセッサに切
り離し要求を行なう切り離し要求手段と、 ロ)前記切り離し要求を受けたプロセッサが、切り離し
動作までに完了すべき処理を行った後に、プロセッサ状
態を前記第2の状態にし、プロセッサ切り離しを行なう
切り離し実行手段と、 ハ)プロセッサ状態が前記第2の状態のプロセッサを前
記第3の状態にすることにより、組み入れ要求を行う組
み入れ要求手段と、 ニ)前記組み入れ要求を受けたプロセッサが、組み入れ
動作までに完了すべき処理を行った後に、プロセッサ状
態を前記第1の状態にし、プロセッサ組み入れを行う組
み入れ実行手段とを有することを特徴とするプロセッサ
管理方式。 2、前記切り離し要求手段は、稼働中のプロセッサが複
数存在することを確認する手段と、停止要求の対象プロ
セッサが前記第1の状態であることを確認する手段と、
前記対象プロセッサに対し切り離し要求を行なう手段と
を有し、前記切り離し実行手段は、前記対象プロセッサ
で前記切り離し要求を受け取る手段と、前記対象プロセ
ッサで走行中のタスクを走行待ちキューにつなぐ手段と
、前記対象プロセッサを前記第2の状態にする手段と、
前記対象プロセッサの稼働を停止する手段とを有する請
求項1記載のプロセッサ管理方式。 3、前記組み入れ要求手段は、本マルチプロセッサシス
テムに組み入れるべきプロセッサが前記第2の状態であ
ることを確認する手段と、前記組み入れるべきプロセッ
サへ組み入れ要求を行なう手段とを有し、前記組み入れ
実行手段は、前記組み入れるべきプロセッサが前記組み
入れ要求を受け取る手段と、前記組み入れるべきプロセ
ッサが前記第3の状態であることを確認する手段と、前
記組み入れるべきプロセッサを前記第1の状態にする処
理を行なう手段とを有する請求項1記載のプロセッサ管
理方式。
[Claims] 1. In a multiprocessor system having a plurality of processors connected to each other, the processor state of each processor is: a) When viewed from all the processors in the multiprocessor system, the own processor is in operation. b) a second state in which the own processor is recognized as stopped from the viewpoint of all processors in the multiprocessor system; and c) only the own processor is in the stopped state. Recognizes the operation of the processor,
and a third state in which the own processor is recognized as stopped from the perspective of other processors; (a) a disconnection request means for requesting disconnection from the processor whose processor status is in the first state; ) a disconnection execution means for changing the processor state to the second state and disconnecting the processor after the processor that has received the disconnection request performs processing to be completed before the disconnection operation; c) a processor state that is set to the second state; (d) After the processor that has received the incorporation request performs the processing to be completed before the incorporation operation, the processor state is changed to the third state. a processor management method, comprising: an installation execution means for bringing the processor into the first state and installing the processor. 2. The disconnection request means includes means for confirming that there are a plurality of operating processors, and means for confirming that the target processor of the stop request is in the first state;
means for issuing a disconnection request to the target processor; the disconnection executing means includes means for receiving the disconnection request in the target processor; and means for connecting a task running in the target processor to a running queue; means for bringing the target processor into the second state;
2. The processor management method according to claim 1, further comprising means for stopping operation of said target processor. 3. The incorporation requesting means has means for confirming that the processor to be incorporated into the multiprocessor system is in the second state, and means for making an incorporation request to the processor to be incorporated, and the incorporation execution means means for the processor to be installed to receive the request for installation; means for confirming that the processor to be installed is in the third state; and means for bringing the processor to be installed into the first state. 2. The processor management method according to claim 1, comprising:
JP26107089A 1989-10-05 1989-10-05 Processor control system Pending JPH03122753A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26107089A JPH03122753A (en) 1989-10-05 1989-10-05 Processor control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26107089A JPH03122753A (en) 1989-10-05 1989-10-05 Processor control system

Publications (1)

Publication Number Publication Date
JPH03122753A true JPH03122753A (en) 1991-05-24

Family

ID=17356665

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26107089A Pending JPH03122753A (en) 1989-10-05 1989-10-05 Processor control system

Country Status (1)

Country Link
JP (1) JPH03122753A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100287136B1 (en) * 1996-04-15 2001-04-16 윤종용 Scheduler of single processor system capable of dynamic reconfiguration
KR20010064807A (en) * 1999-12-18 2001-07-11 이계철 Dynamic controlling and automatic regenerating apparatus for abnormally terminated processes and method for using it
JP2006178851A (en) * 2004-12-24 2006-07-06 Nec Corp Failure monitoring method, failure monitoring system and program
KR100940256B1 (en) * 2008-04-23 2010-02-04 현대건설주식회사 A boiler discharging cold water and mixid water by the thermo valve to large number of water outlet and warm water supply system of the instantaneous heater

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5267935A (en) * 1975-12-03 1977-06-06 Nec Corp Information processing system
JPS5418252A (en) * 1977-07-12 1979-02-10 Toshiba Corp Computer composite system
JPS59206973A (en) * 1983-05-11 1984-11-22 Hitachi Ltd Back-up system of job
JPS61216046A (en) * 1985-02-21 1986-09-25 Fujitsu Ltd System for deciding expulsion and entry processing in composite system
JPS62197860A (en) * 1986-02-10 1987-09-01 テラデータ・コーポレーション Multiprocessor system and data processing by the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5267935A (en) * 1975-12-03 1977-06-06 Nec Corp Information processing system
JPS5418252A (en) * 1977-07-12 1979-02-10 Toshiba Corp Computer composite system
JPS59206973A (en) * 1983-05-11 1984-11-22 Hitachi Ltd Back-up system of job
JPS61216046A (en) * 1985-02-21 1986-09-25 Fujitsu Ltd System for deciding expulsion and entry processing in composite system
JPS62197860A (en) * 1986-02-10 1987-09-01 テラデータ・コーポレーション Multiprocessor system and data processing by the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100287136B1 (en) * 1996-04-15 2001-04-16 윤종용 Scheduler of single processor system capable of dynamic reconfiguration
KR20010064807A (en) * 1999-12-18 2001-07-11 이계철 Dynamic controlling and automatic regenerating apparatus for abnormally terminated processes and method for using it
JP2006178851A (en) * 2004-12-24 2006-07-06 Nec Corp Failure monitoring method, failure monitoring system and program
KR100940256B1 (en) * 2008-04-23 2010-02-04 현대건설주식회사 A boiler discharging cold water and mixid water by the thermo valve to large number of water outlet and warm water supply system of the instantaneous heater

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