JPH03117901A - Adjusting pattern for high frequency amplifier - Google Patents

Adjusting pattern for high frequency amplifier

Info

Publication number
JPH03117901A
JPH03117901A JP25667289A JP25667289A JPH03117901A JP H03117901 A JPH03117901 A JP H03117901A JP 25667289 A JP25667289 A JP 25667289A JP 25667289 A JP25667289 A JP 25667289A JP H03117901 A JPH03117901 A JP H03117901A
Authority
JP
Japan
Prior art keywords
adjustment
adjustment pattern
lands
adjusting
main line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25667289A
Other languages
Japanese (ja)
Inventor
Katsumi Sakuma
勝美 佐久間
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP25667289A priority Critical patent/JPH03117901A/en
Publication of JPH03117901A publication Critical patent/JPH03117901A/en
Pending legal-status Critical Current

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  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To realize various kinds of amplifier which have a good reproducibility and have the reliability improved and can select frequencies by cutting connection lands of an adjusting pattern in narrow positions. CONSTITUTION:An adjusting pattern 3 consists of a main line 3a as the signal line in an about center of a dielectric substrate, linear connection lands 3c which are branched from the main line 3a and are connected, and adjusting lands 3b which have a face form and are connected to connection lands 3c and form inductance components and capacitance components, and connection lands 3c are cut away in desired position to adjust the impedance. This adjusting pattern is provided with the main line 3a as one signal line in the center, and plural coupling and branched connection lands 3c are connected to the main line 3a, and plural adjusting lands 3b are connected to connection lands 3c. Thus, designated connection lands 3c are merely cut and adjusting lands 3b are cut away to adjust the adjusting pattern 3, and adjustment of good reproducibility is possible.

Description

【発明の詳細な説明】 〔概 要〕 高周波増幅器の入出力整合回路のインピーダンス調整に
関し、 再現性のあるインピーダンス調整の可能な調整パターン
の提供を目的とし、 電界効果トランジスタの入力端子および出力端子に誘電
体基板上に設けられた調整パターンを接続し、該調整パ
ターンを調整することにより高周波増幅器のインピーダ
ンス整合をとるものにおいて、前記調整パターンを、前
記誘電体基板のほぼ中央にあって信号路となる主線路と
、該主線路から複数本を枝分かれして接続された線状の
接続ランドと、面形状を有して該接続ランドに接続され
かつインダクタンス分およびキャパシタンス分を形成す
る調整ランドとから形成し、前記接続ランドを所望の位
置で切り離してインピーダンスを調整するように構成す
る。
[Detailed Description of the Invention] [Summary] Regarding the impedance adjustment of the input/output matching circuit of a high frequency amplifier, the purpose of the present invention is to provide an adjustment pattern that allows reproducible impedance adjustment, and to adjust the impedance at the input terminal and output terminal of a field effect transistor. In a device that connects adjustment patterns provided on a dielectric substrate and adjusts the adjustment patterns to achieve impedance matching of a high frequency amplifier, the adjustment pattern is located approximately in the center of the dielectric substrate and is connected to a signal path. A main line, a linear connection land connected to a plurality of branches branching from the main line, and an adjustment land having a surface shape and connected to the connection land and forming an inductance component and a capacitance component. The impedance is adjusted by separating the connection land at a desired position.

〔産業上の利用分野〕[Industrial application field]

本発明は、高周波増幅器の入出力整合回路のインピーダ
ンス調整に関する。
The present invention relates to impedance adjustment of an input/output matching circuit of a high frequency amplifier.

〔従来の技術〕[Conventional technology]

高周波増幅器は、高信頬性かつ多品種であることが要求
さるが、これに伴い周波数帯域の調整に再現性がありか
つ而単にできる入出力整合回路の調整パターンの提供が
望まれている。
High-frequency amplifiers are required to have high reliability and a wide variety of types, and accordingly, it is desired to provide an adjustment pattern for an input/output matching circuit that allows frequency band adjustment to be performed easily and reproducibly.

第3図(A)は従来例の調整パターンを用いた入出力整
合回路を示す図であり、また第3図(B)は第3図(A
)の等価回路を示す図である。第、3図(A)図中、1
1は誘電体材よりなる第一絶縁基板、12は第一絶縁基
板と同一構造の第二絶縁基板、13は第一絶縁基板11
の上に設けた金箔導体の第−調整パターン、14は第二
絶縁基板12の上に設けた金箔導体の第二調整パターン
、15は第一調整パターン11および第二調整パターン
12の一部を切削してインピーダンスの調整をするダイ
ヤモンドスクライバ、16は増幅器として動作する電界
効果トランジスタである。
FIG. 3(A) is a diagram showing an input/output matching circuit using a conventional adjustment pattern, and FIG. 3(B) is a diagram showing an input/output matching circuit using a conventional adjustment pattern.
) is a diagram showing an equivalent circuit of. Figure 3 (A), 1
1 is a first insulating substrate made of a dielectric material, 12 is a second insulating substrate having the same structure as the first insulating substrate, and 13 is a first insulating substrate 11
14 is a second adjustment pattern of gold foil conductors provided on the second insulating substrate 12; 15 is a part of the first adjustment pattern 11 and the second adjustment pattern 12; A diamond scriber 16 performs cutting to adjust impedance, and 16 is a field effect transistor that operates as an amplifier.

この第一絶縁基板11および第二絶縁基板12は、一方
の面上(例えば上面側)に第一調整パターン13および
第二調整パターン14の導体パターンを有しており、他
の面上(例えば下面側)には図示せざる導体板が接着し
て設けられている。このため第一調整パターン13およ
び第二調整パターン14は、図示せざる導体板との間で
分布定数型高周波インピーダンス線路を形成する。即ち
第3図(A)の第一調整パターン13と第二調整パター
ン14は周波数が高(なると、■と■の領域は誘導性イ
ンピーダンスに、また■と■は容量性インピーダンスを
示すようになる。なお第3図(A)の分布定数回路は、
第3図(B)−に示すようなり、とclおよびLtとC
2集中定数回路として表される。このことからLlとC
8は電界効果トランジスタ16の入力整合回路を、また
L2と02により電界効果トランジスタ16の出力整合
回路を形成する。
The first insulating substrate 11 and the second insulating substrate 12 have conductor patterns of a first adjustment pattern 13 and a second adjustment pattern 14 on one surface (for example, the upper surface side), and have conductor patterns of a first adjustment pattern 13 and a second adjustment pattern 14 on the other surface (for example, A conductive plate (not shown) is attached to the lower surface side. Therefore, the first adjustment pattern 13 and the second adjustment pattern 14 form a distributed constant type high frequency impedance line with a conductive plate (not shown). In other words, the first adjustment pattern 13 and the second adjustment pattern 14 in FIG. .The distributed constant circuit in Fig. 3(A) is
As shown in Figure 3 (B), and cl and Lt and C
Represented as a two lumped constant circuit. From this, Ll and C
8 forms an input matching circuit of the field effect transistor 16, and L2 and 02 form an output matching circuit of the field effect transistor 16.

このようにして形成された入力整合回路(L、。The input matching circuit (L,) formed in this way.

C+)および出力整合回路(Lz+Cz )の調整は、
第一調整パターン13および第二調整パターン14をダ
イヤモンドスクライバ15を用いて切削したり、或いは
必要に応じて金箔を追加したりして行うことによりイン
ピーダンスを変化させて入力整合回路および出力整合回
路の調整をする。この調整パターンをダイヤモンドスク
ライバで幅広く切削したり、或いは金箔を追加したりす
る調整は、絶縁基板を幅広く傷つけまたは傷口が不規則
となり、所望の周波数に対するインピーダンス調整を再
現性よく行うことは困難にならざるを得ない。
Adjustment of C+) and output matching circuit (Lz+Cz) is as follows:
By cutting the first adjustment pattern 13 and the second adjustment pattern 14 using a diamond scriber 15, or by adding gold foil as necessary, the impedance is changed and the input matching circuit and output matching circuit are adjusted. Make adjustments. Adjustment by cutting this adjustment pattern widely with a diamond scriber or adding gold foil may damage the insulating substrate over a wide area or cause the scratches to become irregular, making it difficult to perform impedance adjustment for the desired frequency with good reproducibility. I have no choice but to.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従って、従来の調整パターンを用いての調整は、絶縁基
板を幅広(傷つけたり、または傷口が不規則で再現性が
悪くなり、従って周波数の変更調整が困難であるという
問題がある。
Therefore, the adjustment using the conventional adjustment pattern has the problem that the insulating substrate is wide (damaged) or the scratches are irregular, resulting in poor reproducibility, and therefore, it is difficult to change and adjust the frequency.

本発明は、再現性のあるインピーダンス調整の可能なる
調整パターンの提供を目的とする。
An object of the present invention is to provide an adjustment pattern that allows reproducible impedance adjustment.

〔課題を解決するための手段〕[Means to solve the problem]

本発明では、電界効果トランジスタ6の入力端子および
出力端子に誘電体基板上に設けられた調整パターン3を
接続し、該調整パターン3を調整することにより高周波
増幅器のインピーダンス整合をとるものにおいて、前記
調整パターン3を、前記誘電体基板のほぼ中央にあって
信号路となる主線路3aと、該主線路3aから複数本を
枝分かれして接続された線状の接続ランド3cと、面形
状を有して該接続ランド3cに接続されかつインダクタ
ンス分およびキャパシタンス分を形成する調整ランド3
bとから形成し、前記接続ランド3cを所望の位置で切
り離してインピーダンスを調整する構成とするものであ
る。
In the present invention, an adjustment pattern 3 provided on a dielectric substrate is connected to an input terminal and an output terminal of a field effect transistor 6, and impedance matching of a high frequency amplifier is achieved by adjusting the adjustment pattern 3. The adjustment pattern 3 has a surface shape including a main line 3a that is located approximately in the center of the dielectric substrate and serves as a signal path, and a linear connection land 3c that is connected to a plurality of branches branching from the main line 3a. An adjustment land 3 that is connected to the connection land 3c and forms an inductance component and a capacitance component.
b, and the connection land 3c is separated at a desired position to adjust the impedance.

〔作 用〕[For production]

本発明の調整パターンは第1図に示す如く、中央に1本
の信号線路としての主線路3aを設け、該主線路3aか
らは枝分かれ連接した複数の接続ランド3cを接続し、
さらにそれぞれの接続ランド3cには複数の調整ランド
3bを接続している。
As shown in FIG. 1, the adjustment pattern of the present invention is to provide a main line 3a as a single signal line in the center, and connect a plurality of connecting lands 3c branched and connected from the main line 3a.
Further, a plurality of adjustment lands 3b are connected to each connection land 3c.

従って、この調整パターン3の調整は、単に指定の接続
ランド3cを切断し調整ランド3bを切り離せば可能で
あり、このため再現性の良い調整が可能となる。
Therefore, the adjustment of this adjustment pattern 3 can be made by simply cutting the specified connection land 3c and separating the adjustment land 3b, which allows adjustment with good reproducibility.

〔実 施 例〕〔Example〕

第1図は本発明の調整パターンを示す図である。 FIG. 1 is a diagram showing an adjustment pattern of the present invention.

図中、3は調整パターンを示し、3aは信号の通路であ
る主線路、3bはインピーダンス調整のための調整ラン
ド、また3cは接続ランドであり、主線路3aから枝分
かれ接続されたものである。
In the figure, 3 indicates an adjustment pattern, 3a is a main line as a signal path, 3b is an adjustment land for impedance adjustment, and 3c is a connection land, which is branched and connected from the main line 3a.

第2図は本発明の調整パターンを用いた入出力整合回路
を示す図であり、第1図の調整パターンをインピーダン
ス調整用として設けている。第2図中、1は誘電体材よ
りなる第一絶縁基板、2は第−絶縁基板と同一構造の第
二絶縁基板、3は第一絶縁基板l及び第二絶縁基板2の
上に設けた金箔導体の調整パターン、5は調整パターン
3の上に設けた接続ランド3cを切削し、接続ランド3
Cに接続されている調整ランド3bを切り離してインピ
ーダンスの調整を行うダイヤモンドスクライバ、6は増
幅器としての電界効果トランジスタである。
FIG. 2 is a diagram showing an input/output matching circuit using the adjustment pattern of the present invention, in which the adjustment pattern of FIG. 1 is provided for impedance adjustment. In Fig. 2, 1 is a first insulating substrate made of a dielectric material, 2 is a second insulating substrate having the same structure as the second insulating substrate, and 3 is provided on the first insulating substrate l and the second insulating substrate 2. Adjustment pattern 5 of the gold foil conductor is obtained by cutting the connection land 3c provided on the adjustment pattern 3.
A diamond scriber 6 separates the adjustment land 3b connected to C to adjust the impedance, and 6 is a field effect transistor as an amplifier.

また7は電源であり、電極棒8に電圧を印加して所望の
接続ランド3Cを溶断し、接続ランド3Cに接続されて
いる調整ランド3bを切り離してインピーダンスの調整
を行うためのものである。
Further, reference numeral 7 denotes a power source, which applies a voltage to the electrode rod 8 to melt down a desired connection land 3C, disconnect the adjustment land 3b connected to the connection land 3C, and adjust the impedance.

この第一絶縁基板1及び第二絶縁基板2は、−方の面上
(例えば上面側)に金箔4体からなる調整パターン3が
設けられており、他の面上(例えば下面側)には図示せ
ざる導体板が接着し設けられており、この調整パターン
3と図示せざる導体板との間において、例えば第3図(
B)に示す分布定数型インピーダンス等価回路を形成す
ることは従来例の通りである。なお第1図および第2図
に示す調整パターン3の構成は、中央に1本の信号の伝
送導体としての主線路3aを設け、該主線路3aからは
枝分かれ連接した複数の約0.05mm幅の接続ランド
3cを接続し、さらにそれぞれの接続ランド3cには横
0.1龍x uo、os酊の複数の調整ランド3cには
横Q、1mX縦0.05mmの複数の調整ランド3bを
接続している。
The first insulating substrate 1 and the second insulating substrate 2 are provided with an adjustment pattern 3 consisting of four pieces of gold foil on the negative side (for example, the top side), and on the other side (for example, the bottom side). A conductive plate (not shown) is bonded and provided between the adjustment pattern 3 and the conductive plate (not shown), for example, as shown in FIG.
The distributed constant impedance equivalent circuit shown in B) is formed as in the conventional example. The configuration of the adjustment pattern 3 shown in FIGS. 1 and 2 is that a main line 3a as a signal transmission conductor is provided in the center, and a plurality of approximately 0.05 mm width branches are connected from the main line 3a. Connect the connection land 3c of , and connect the multiple adjustment lands 3b of width 0.1 length x uo to each connection land 3c, width Q, 1m x length 0.05mm to the multiple adjustment lands 3c of os. are doing.

このようにして形成された枝分かれ接続された調整パタ
ーン3の調整は、ダイヤモンドスクライバ5を用いて指
定の接続ランド3cを切断し調整ランド3bを切り離し
て所望のインピーダンスになるように変更するか、また
は電源7から電極棒8に電圧を印加して接続ランド3c
を焼き切る溶断により同様に調整を行う。この場合の調
整は単に、約0.05m重幅の接続ランド3cの切断ま
たは溶断であり、このため接続ランド3cの切り口が均
一にでき、従って再現性の良い調整ができる。
Adjustment of the branched and connected adjustment pattern 3 thus formed can be made by cutting the specified connection land 3c using a diamond scriber 5 and separating the adjustment land 3b to change the impedance to a desired value, or A voltage is applied from the power source 7 to the electrode rod 8 to connect the connecting land 3c.
Adjustment is made in the same way by burning out the fuse. In this case, the adjustment is simply cutting or fusing the connecting land 3c with a width of about 0.05 m, so that the cut end of the connecting land 3c can be made uniform, and therefore adjustment can be made with good reproducibility.

〔発明の効果〕 以上の説明から明らかなように本発明によれば、調整パ
ターンの接続ランドが細い個所の切断であるため、再現
性がよくかつ信頼性が向上し、周波数が選択できる多品
種の増幅器を実現できる。
[Effects of the Invention] As is clear from the above description, according to the present invention, since the connection land of the adjustment pattern is cut at a narrow point, reproducibility and reliability are improved, and a wide variety of products with selectable frequencies can be produced. amplifier can be realized.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の調整パターンの構成を示す図、第2図
は本発明の調整パターンを用いた入出力整合回路を示す
図、 第3図(A)と第3図(B)は本発明の調整パターンを
用いた入出力整合回路を示す図、である。 図において、 1は第一絶縁基板、 2は第二絶縁基板、 3は調整パターン、 3aは主線路、 3bは調整ランド、 3cは接続ランド、 5はダイヤモンドスクライバ、 6は電界効果トランジスタ、 を示す。 第 1 ■ ?
FIG. 1 is a diagram showing the configuration of the adjustment pattern of the present invention, FIG. 2 is a diagram showing an input/output matching circuit using the adjustment pattern of the present invention, and FIGS. 3(A) and 3(B) are FIG. 3 is a diagram showing an input/output matching circuit using the adjustment pattern of the invention. In the figure, 1 is a first insulating substrate, 2 is a second insulating substrate, 3 is an adjustment pattern, 3a is a main line, 3b is an adjustment land, 3c is a connection land, 5 is a diamond scriber, and 6 is a field effect transistor. . 1st ■?

Claims (1)

【特許請求の範囲】  電界効果トランジスタ(6)の入力端子および出力端
子に誘電体基板上に設けられた調整パターン(3)を接
続し、該調整パターン(3)を調整することにより高周
波増幅器のインピーダンス整合をとるものにおいて、 前記調整パターン(3)を、前記誘電体基板のほぼ中央
にあって信号路となる主線路(3a)と、該主線路(3
a)から複数本を枝分かれして接続された線状の接続ラ
ンド(3c)と、面形状を有して該接続ランド(3c)
に接続されかつインダクタンス分およびキヤパシタンス
分を形成する調整ランド(3b)とから形成し、前記接
続ランド(3c)を所望の位置で切り離してインピーダ
ンスを調整するようにしたことを特徴とする高周波増幅
器用調整パターン。
[Claims] By connecting the adjustment pattern (3) provided on the dielectric substrate to the input terminal and output terminal of the field effect transistor (6), and adjusting the adjustment pattern (3), the high frequency amplifier can be controlled. In the device for impedance matching, the adjustment pattern (3) is connected to a main line (3a) which is located approximately in the center of the dielectric substrate and serves as a signal path;
A linear connection land (3c) which is connected to a plurality of branches from a), and a connection land (3c) having a surface shape.
and an adjustment land (3b) that is connected to and forms an inductance component and a capacitance component, and the connection land (3c) is separated at a desired position to adjust impedance. adjustment pattern.
JP25667289A 1989-09-29 1989-09-29 Adjusting pattern for high frequency amplifier Pending JPH03117901A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25667289A JPH03117901A (en) 1989-09-29 1989-09-29 Adjusting pattern for high frequency amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25667289A JPH03117901A (en) 1989-09-29 1989-09-29 Adjusting pattern for high frequency amplifier

Publications (1)

Publication Number Publication Date
JPH03117901A true JPH03117901A (en) 1991-05-20

Family

ID=17295865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25667289A Pending JPH03117901A (en) 1989-09-29 1989-09-29 Adjusting pattern for high frequency amplifier

Country Status (1)

Country Link
JP (1) JPH03117901A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05308207A (en) * 1992-04-30 1993-11-19 Fukushima Nippon Denki Kk High frequency semiconductor package
EP1814223A1 (en) * 2006-01-25 2007-08-01 ATMEL Germany GmbH Device for transmitting electromagnetic signals and its usage
JP2011171697A (en) * 2010-01-22 2011-09-01 Toshiba Corp High-frequency semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05308207A (en) * 1992-04-30 1993-11-19 Fukushima Nippon Denki Kk High frequency semiconductor package
EP1814223A1 (en) * 2006-01-25 2007-08-01 ATMEL Germany GmbH Device for transmitting electromagnetic signals and its usage
JP2011171697A (en) * 2010-01-22 2011-09-01 Toshiba Corp High-frequency semiconductor device

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