JPH03116935A - Improvement of characteristic of mos semiconductor device - Google Patents

Abstract

PURPOSE:To reduce an interfacial level density increased by injecting hot carriers by a method wherein a forward bias is applied to the drain junction of a MOS transistor having deteriorated characteristics. CONSTITUTION:A silicon substrate 1 is set to OV, a negative voltage, such as -5V, is applied to a source 4 and a drain 5 and the junction between the source 4 and the drain 5 is formed so that it is forward biased. That is, forward currents 6 are respectively made to flow between the substrate 1 and the source 4 and between the substrate 1 and the drain 5. Accordingly, if a device is packaged in such a way as to lead out terminals of the substrate 1, a power terminal and an earth terminal are negatively biased and the substrate 1 is positively biased, a forward bias results in being applied to the source 4 and the drains 5 of almost all transistors. Thereby, an interfacial level density increased by injecting hot carriers can be effectively decreased, in particular the reliability of a MOS semiconductor device using fine elements can be significantly improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for improving the characteristics of a MOS type semiconductor device whose characteristics have deteriorated.

(Prior Art) In conventional MO3 integrated circuits, deterioration of device characteristics due to so-called hot carriers has become a major problem as devices become finer. That is, when the channel length of a MOS (MOS) transistor becomes fine, a high electric field is generated near the drain of the channel region, and carriers (for example, electrons in an n-channel MOS) in the silicon substrate are accelerated by the high electric field and have large energy. Since these hot carriers have high energy, they can be directly injected into the gate oxide film, or collide with the lattice of the silicon substrate to cause impact ionization, resulting in even higher energy electron-hole pairs, that is, hot carriers. Carriers are generated and these are also injected into the gate oxide film. When hot carriers are injected into the gate oxide film, fixed charges are generated in the gate oxide film and interface states are generated at the interface between the gate oxide film and the substrate. This allows the MOS
) The characteristics of transistors deteriorate, such as changes in threshold voltage. Particularly in the case of an n-channel MOS transistor, deterioration of characteristics due to the generation of interface states is dominant.

Figure 4 shows the MO due to the hot carrier stress mentioned above.
The deterioration of the characteristics of the S transistor is seen from the gate voltage-drain current characteristics.

(Problems to be Solved by the Invention) As described above, conventional MOS transistors have a problem in that interface states generated by hot carrier injection deteriorate characteristics, especially when miniaturized.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for improving characteristics of a MOS type semiconductor device, which restores deteriorated characteristics of a MOS transistor by hot carrier injection.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a solution to a MOS transistor with deteriorated characteristics.
It is characterized by applying a forward bias to its drain junction.

(Function) Applying a forward bias to the drain junction of a MOS transistor can effectively reduce the interface state density increased by hot carrier injection. This was confirmed experimentally by measuring the change in interface state density with respect to forward bias time.

(Example) Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.

FIG. 1 shows the bias conditions of the n-channel MOS transistor in the characteristic improvement mode, and FIG. 2 shows the bias conditions of the n-channel MOS transistor in the normal operation mode. In the normal operation mode, as shown in FIG. 2, the p-type silicon substrate 1 and the source 4 are set to Ov, and a positive voltage, for example 5V, is applied to the drain 5 to apply a reverse bias to the drain junction. do. At this time,
No current flows between the silicon substrate 1 and the source 4 and between the silicon substrate 1 and the drain 5.

On the other hand, in the characteristic improvement mode, as shown in FIG. 1, the silicon substrate 1 is set to Ov, and a negative voltage, for example -5V, is applied to the source 4 and drain 5 so that the source and drain junctions become forward biased. Make it. That is, a forward current 6 is caused to flow between the silicon substrate 1 and the source 4 and between the silicon substrate 1 and the drain 5. The gate electrode 2 is floating.

FIG. 3 shows experimental data in which the interface state density was reduced by passing a forward current between the source and drain of an n-channel MOS and the substrate, whose interface state density was increased by hot carrier injection. This experimental data is obtained when the forward bias voltage is 1V. As is clear from the figure, even if the applied forward bias is small, the interface state density is effectively reduced by applying it for a long time. This is the first time this phenomenon has been discovered.

In an actual integrated circuit, a large number of MOS transistors are wired in a complicated manner, but if they are assembled into a package by pulling out the terminals of the board, the power supply terminal and ground terminal are made negative, and the board is biased positively. , a forward bias is applied to the sources and drains of almost all transistors. Although there is a possibility that forward bias is not applied to all transistors, even if the deterioration of some transistors is recovered, the performance of the integrated circuit as a whole can be greatly recovered.

In the embodiment, the gate potential is set to floating, but the gate potential may be arbitrarily selected. Furthermore, although the embodiment has been described with respect to an n-channel MOS transistor, the present invention can be applied to a p-channel MOS transistor in exactly the same way by reversing the polarity of the bias. Furthermore, it can also be applied to CMO8 field effect transistors.

Further, in the embodiment, a forward bias was applied to both the source and drain junctions, but the effect of improving the characteristics can also be obtained by applying a forward bias only to the drain junction. This is because hot carrier injection occurs near the drain, and therefore the interface state density also increases near the drain. .

Furthermore, the present invention can be applied to various MOS memories in addition to ordinary MOS integrated circuits. Especially EPROM and E2P that actively utilize carrier injection into the gate insulating film.
Great effects can be expected when applied to ROM, etc.

[Effects of the Invention] According to the present invention, the interface state density due to hot carrier injection can be effectively reduced, and in particular, the reliability of MO5 type semiconductor devices using micro elements can be greatly improved. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing the bias conditions of an n-channel MOS transistor in the characteristic improvement mode, FIG. 2 is a diagram showing the bias conditions of the n-channel MOS transistor in the normal operation mode, and FIG. 3 is a diagram showing the interface conditions according to the embodiment. Figure 4 shows the data on the decrease in potential density. Figure 4 shows the n-channel MO due to the generation of hot carriers.
5) It is a diagram for explaining deterioration of transistor characteristics. DESCRIPTION OF SYMBOLS 1... Silicon substrate, 2... Gate, 3... Gate oxide film, 4... Source, 5... Drain, 6...
・Forward current.

Claims (1)

[Claims] 1. A method for improving characteristics of a MOS type semiconductor device, which comprises applying a forward bias to a drain junction to reduce interface state density of a MOS transistor, which has increased due to hot carrier stress or the like.