JPH03113445U - - Google Patents
Info
- Publication number
- JPH03113445U JPH03113445U JP2133590U JP2133590U JPH03113445U JP H03113445 U JPH03113445 U JP H03113445U JP 2133590 U JP2133590 U JP 2133590U JP 2133590 U JP2133590 U JP 2133590U JP H03113445 U JPH03113445 U JP H03113445U
- Authority
- JP
- Japan
- Prior art keywords
- dma
- control circuits
- request
- cpu
- devices
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2133590U JPH03113445U (en:Method) | 1990-03-02 | 1990-03-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2133590U JPH03113445U (en:Method) | 1990-03-02 | 1990-03-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03113445U true JPH03113445U (en:Method) | 1991-11-20 |
Family
ID=31524384
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2133590U Pending JPH03113445U (en:Method) | 1990-03-02 | 1990-03-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03113445U (en:Method) |
-
1990
- 1990-03-02 JP JP2133590U patent/JPH03113445U/ja active Pending