JPH03111028U - - Google Patents
Info
- Publication number
- JPH03111028U JPH03111028U JP2036690U JP2036690U JPH03111028U JP H03111028 U JPH03111028 U JP H03111028U JP 2036690 U JP2036690 U JP 2036690U JP 2036690 U JP2036690 U JP 2036690U JP H03111028 U JPH03111028 U JP H03111028U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- comparator
- transformer
- operational amplifier
- synchronized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims 2
- 238000004804 winding Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 238000007781 pre-processing Methods 0.000 description 1
Landscapes
- Rectifiers (AREA)
- Dc-Dc Converters (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は第１図の回路の動作を説明する波形図、第３
図は従来装置の構成ブロツク図、第４図はその波
形図である。
ＣＴ……カレントトランス、Ｕ１……オペアン
プ、Ｕ２……コンパレータ、Ｑ……トランジスタ
、１０……前処理回路、２０……しきい値電圧発
生回路、３０……レベルシフト回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a waveform diagram explaining the operation of the circuit in Figure 1.
The figure is a block diagram of the configuration of a conventional device, and FIG. 4 is a waveform diagram thereof. CT... Current transformer, U1... Operational amplifier, U2... Comparator, Q... Transistor, 10... Preprocessing circuit, 20... Threshold voltage generation circuit, 30... Level shift circuit.
Claims (1)
圧信号に変換するオペアンプと、 このオペアンプの出力信号をしきい値電圧と比
較し、入力ＡＣ信号に同期したデユーテイ比５０
％のオンオフ信号を出力するコンパレータと、 このコンパレータの出力信号をＴＴＬレベルに
レベルシフトするトランジスタ回路と、 を具備することを特徴とするＡＣ周波数に同期す
るパルス生成回路。[Claims for Utility Model Registration] A transformer to which an AC signal is supplied to the primary winding, an operational amplifier that converts the current signal appearing in the secondary winding of this transformer into a voltage signal, and a threshold value for the output signal of this operational amplifier. Duty ratio 50 compared to voltage and synchronized to input AC signal
A pulse generation circuit synchronized with an AC frequency, comprising: a comparator that outputs an on/off signal of %; and a transistor circuit that level-shifts the output signal of the comparator to a TTL level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2036690U JPH03111028U (en) | 1990-02-28 | 1990-02-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2036690U JPH03111028U (en) | 1990-02-28 | 1990-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03111028U true JPH03111028U (en) | 1991-11-14 |
Family
ID=31523457
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2036690U Pending JPH03111028U (en) | 1990-02-28 | 1990-02-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03111028U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5116247A (en) * | 1974-07-31 | 1976-02-09 | Nippon Tokushu Toryo Co Ltd | |
| JPS6152021A (en) * | 1984-08-22 | 1986-03-14 | Fujitsu Ltd | Squelch circuit |
-
1990
- 1990-02-28 JP JP2036690U patent/JPH03111028U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5116247A (en) * | 1974-07-31 | 1976-02-09 | Nippon Tokushu Toryo Co Ltd | |
| JPS6152021A (en) * | 1984-08-22 | 1986-03-14 | Fujitsu Ltd | Squelch circuit |