JPS6384578U - - Google Patents
Info
- Publication number
- JPS6384578U JPS6384578U JP17820786U JP17820786U JPS6384578U JP S6384578 U JPS6384578 U JP S6384578U JP 17820786 U JP17820786 U JP 17820786U JP 17820786 U JP17820786 U JP 17820786U JP S6384578 U JPS6384578 U JP S6384578U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- rectifier circuit
- output voltage
- value output
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000003079 width control Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 1
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Emergency Protection Circuit Devices (AREA)
Description
第１図は本案の一実施例を示す回路図、第２図
は縦来技術を説明するための回路図、第３図は第
１図、第２図を説明するための図である。
１，２…入力電源端子、３，４…出力端子、５
…停電検出信号出力端子、８…パルス幅制御回路
、１０…トランス、１５…ダイオード、１６…コ
ンデンサ、１７，１９，２０，２１…抵抗、１８
…ツエナーダイオード、２２…トランジスタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram for explaining the conventional technology, and FIG. 3 is a diagram for explaining FIGS. 1 and 2. 1, 2...Input power supply terminal, 3, 4...Output terminal, 5
...Power failure detection signal output terminal, 8...Pulse width control circuit, 10...Transformer, 15...Diode, 16...Capacitor, 17, 19, 20, 21...Resistor, 18
...Zener diode, 22...transistor.
Claims (1)
得る整流回路を有し、この整流回路の出力をフイ
ードバツクし、パルス幅制御により出力電圧を制
御するスイツチング電源において、前記整流回路
とは別に波高値出力電圧を得る整流回路と比較回
路を設け、前記波高値出力電圧を前記比較回路で
比較し、この比較回路の出力を停電検出信号とし
、デイジタル演算回路のリセツト信号を作る電源
回路の２次側で停電検出信号を得ることを特徴と
する停電検出回路。 In a switching power supply that has a rectifier circuit that obtains an average value output consisting of an inductor and a capacitor, feeds back the output of this rectifier circuit, and controls the output voltage by pulse width control, the peak value output voltage is obtained separately from the rectifier circuit. A rectifier circuit and a comparison circuit are provided, the peak value output voltage is compared by the comparison circuit, the output of this comparison circuit is used as a power failure detection signal, and a power failure detection signal is generated on the secondary side of the power supply circuit to generate a reset signal for the digital arithmetic circuit. A power outage detection circuit characterized in that:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17820786U JPS6384578U (en) | 1986-11-21 | 1986-11-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17820786U JPS6384578U (en) | 1986-11-21 | 1986-11-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6384578U true JPS6384578U (en) | 1988-06-02 |
Family
ID=31120127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17820786U Pending JPS6384578U (en) | 1986-11-21 | 1986-11-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6384578U (en) |
-
1986
- 1986-11-21 JP JP17820786U patent/JPS6384578U/ja active Pending