JPH03110489U - - Google Patents

Info

Publication number
JPH03110489U
JPH03110489U JP1903190U JP1903190U JPH03110489U JP H03110489 U JPH03110489 U JP H03110489U JP 1903190 U JP1903190 U JP 1903190U JP 1903190 U JP1903190 U JP 1903190U JP H03110489 U JPH03110489 U JP H03110489U
Authority
JP
Japan
Prior art keywords
signal
circuit
signal conversion
conversion circuits
formats
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1903190U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1903190U priority Critical patent/JPH03110489U/ja
Publication of JPH03110489U publication Critical patent/JPH03110489U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案実施例の回路構成を示すブロツ
ク図、第2図は従来例の回路構成を示すブロツク
図である。 1……計算器、2……画像処理装置、21,1
21〜125……信号変換回路、22……表示器
用コントローラ、23……表示器、100……表
示装置インタフエース、111……選択スイツチ
、112……デコーダ、113……リレー、12
0……表示装置本体。
FIG. 1 is a block diagram showing the circuit configuration of an embodiment of the present invention, and FIG. 2 is a block diagram showing the circuit configuration of a conventional example. 1...Calculator, 2...Image processing device, 21,1
21-125...Signal conversion circuit, 22...Display controller, 23...Display device, 100...Display device interface, 111...Selection switch, 112...Decoder, 113...Relay, 12
0...Display device main body.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 異なる信号伝送フオーマツトで複数の画像信号
発生源から送られてくる各画像信号を表示用の信
号フオーマツトに変換する複数の信号変換回路と
、当該複数の信号変換回路を択一的に指定する指
定回路と、該指定回路により指定された信号変換
回路に対してのみ変換対象の画像信号の入力を許
可する制御回路とを具えたことを特徴とする表示
装置。
A plurality of signal conversion circuits that convert image signals sent from a plurality of image signal generation sources in different signal transmission formats into signal formats for display, and a designation circuit that selectively specifies the plurality of signal conversion circuits. and a control circuit that permits input of an image signal to be converted only to a signal conversion circuit designated by the designation circuit.
JP1903190U 1990-02-27 1990-02-27 Pending JPH03110489U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1903190U JPH03110489U (en) 1990-02-27 1990-02-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1903190U JPH03110489U (en) 1990-02-27 1990-02-27

Publications (1)

Publication Number Publication Date
JPH03110489U true JPH03110489U (en) 1991-11-13

Family

ID=31522167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1903190U Pending JPH03110489U (en) 1990-02-27 1990-02-27

Country Status (1)

Country Link
JP (1) JPH03110489U (en)

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