JPH03109349U - - Google Patents
Info
- Publication number
- JPH03109349U JPH03109349U JP1990016235U JP1623590U JPH03109349U JP H03109349 U JPH03109349 U JP H03109349U JP 1990016235 U JP1990016235 U JP 1990016235U JP 1623590 U JP1623590 U JP 1623590U JP H03109349 U JPH03109349 U JP H03109349U
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- pin
- integrated circuit
- pad
- insertion hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990016235U JPH03109349U (enExample) | 1990-02-22 | 1990-02-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990016235U JPH03109349U (enExample) | 1990-02-22 | 1990-02-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03109349U true JPH03109349U (enExample) | 1991-11-11 |
Family
ID=31519515
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990016235U Pending JPH03109349U (enExample) | 1990-02-22 | 1990-02-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03109349U (enExample) |
-
1990
- 1990-02-22 JP JP1990016235U patent/JPH03109349U/ja active Pending