JPH03108966A - Solid-state image pickup element - Google Patents

Abstract

PURPOSE:To raise the sensitibility only at the time of a low illuminance by divisionally connecting electrodes of the register of a horizontal transfer register part to signal lines of respective systems so that the same signal is supplied to electrodes at intervals of a specific number of electrodes. CONSTITUTION:A light receiving part 1 is placed by a vertical transfer register 2, and a horizontal transfer register part 3 is provided in one end of the vertical transfer register part 2, and an output part 4 is connected to its last part. In the horizontal transfer register part 3, electrodes of the register are divisionally connected to signal lines A to D of four systems, and signal lines A to D are so connected that the same signal is supplied to every fourth electrode of the register. Thus, a solid-state image pickup element itself copes with the change of sensitivity if the illuminance of an object is reduced by pulses impressed to signal lines A to D to reduce the level of the output signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state image sensor used as an input sensor for a television camera, and more particularly to the structure of a CCD solid-state image sensor.

[Conventional technology]

Conventionally, a solid-state imaging device with this type of CCD structure, for example, an interline transfer type CCD, consists of a light receiving section 1, a vertical transfer register section 2, a horizontal transfer register section 3, and an output section 4, as shown in FIG. There is. The light receiving section 1 is installed next to the vertical transfer register section 2, and the horizontal transfer register section 3 is installed at one end of the vertical transfer register section 2. Further, the output section 4 is installed at the rear end of the horizontal transfer register section 3.

A signal input to the light receiving section 1 during one vertical scanning period is read out to the vertical transfer register section 2 during the vertical blanking period, and is transferred to the vertical transfer register section 2 at a rate of one stage per horizontal blanking period. At the same time, the data is transferred from the last part of the vertical transfer register section 2 to the horizontal transfer register section 3. The signals of the horizontal transfer register section 3 are driven by the horizontal transfer register drive waveform shown in FIG. 4, and all the signals are outputted through the output section 4 during one horizontal scanning period.

The signal charge input to the horizontal transfer register section 3 can exist in the register section during the Hi level period of the drive waveform shown in FIG. 4, and adjacent registers always have different polarities (A, B).
and C, D).

If adjacent registers have drive waveforms of the same polarity, the signal charges of the registers with the same polarity will mix, and the signal charges input to the horizontal transfer register section 3 will be As the data progresses, it is gradually transferred to the output unit 4 side.

[Problem to be solved by the invention]

In the above-mentioned conventional CCD zero-structure solid-state image sensor, the horizontal transfer register section 3 is driven by two-phase positive and negative pulses, or a method is applied in which a pulse is applied only to one electrode and only a direct current is applied to the other electrode. The horizontal transfer drive method could only be selected according to a predetermined format.

In such a conventional solid-state image sensor with a CCD structure, when the illuminance of the subject decreases and the level of the output signal decreases,
Leave the output signal of the solid-state image sensor as it is and change the amplification level of the signal processing stage after the sample and hold section, or change the level of the signal input to the solid-state image sensor by opening the aperture of the lens, or input it to the solid-state image sensor. The image output has been corrected using means such as amplifying the previous signal using a photomultiplier.

Therefore, the solid-state image sensor itself has the disadvantage of not being able to cope with changes in sensitivity.

An object of the present invention is to provide a solid-state image sensor that solves the above problems.

[Means to solve the problem]

In order to achieve the above object, the solid-state image sensor of the present invention has a CCD structure, which has a light receiving section, a vertical transfer register section, a horizontal transfer register section, and an output section. The poles are respectively connected to the register 4 (four signal lines repeated every second), and each can be driven independently.

〔Example〕

Next, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows an interline transfer method C according to an embodiment of the present invention.
FIG. 3 is a diagram showing an ellipse of a CD solid-state image sensor.

In the figure, the light receiving section 1 is located next to the vertical transfer register section 2. A horizontal transfer register section 3 is installed at one end of the vertical transfer register section 2 . An output section 4 is connected to the rear end of the horizontal transfer register section 3.

In the horizontal transfer register section 3, a common CCD solid-state image element and adjacent electrodes of the register are connected to a common signal line in each stage so that they have different polarities.

On the other hand, in the case of the present invention, the resistor has four electrodes.
The signal lines A to D of the system are connected separately. The four signal lines A to D are the resistor voltages, [! They are connected so that every fourth signal is supplied with the same signal. Here, signal lines A and C are commonly connected, and signal lines B and D are commonly connected.

The signal input to the light receiving section 1 during one vertical scanning period is read out to the vertical transfer register section 2 during the vertical retrace period, and is read out to the vertical transfer register section 2 during one horizontal retrace period, as in the case of a conventional CCD type solid-state image sensor of this type. The data is transferred through the vertical transfer register section 2 at a rate of 1 stage. At the same time, the data is transferred from the last part of the vertical transfer register section 2 to the horizontal transfer register section 3.

The signal input to the horizontal transfer register section 3 is a pulse applied to the signal lines A-D of the horizontal transfer register section 3 through the signal lines A and C.
When signal lines B and D are connected in common and a pulse similar to that used to drive a conventional solid-state image sensor is applied, all signals are generated in one horizontal scanning period as signals of the same form as the conventional solid-state image sensor. It is output through the output section 4.

On the other hand, if the pulses applied to signal lines A to D are as shown in FIG. 3, the signals for 2 bits of the vertical transfer register transferred from the vertical transfer register section 2 are added, It is considered to be a 1-bit signal. Therefore, the newly created horizontal transfer register signal has 1/2 the number of bits compared to the conventional signal, and is applied to signal lines A to D of the horizontal transfer register section 3 in this case. The frequency of the pulses is reduced to 1/2 of the conventional one so that one horizontal scanning period remains the same as the conventional one.

In the present invention, the electrodes of the registers of the horizontal transfer register section 3 are connected to four signal lines A to D so that the same signal is supplied to every fourth register, and the pulses as shown in FIG. By applying , the signals for 2 register bits transferred from the vertical transfer register section 2 are added in the horizontal transfer register to become a signal for 1 bit of the horizontal transfer register. In addition, the frequency of the drive pulse for the horizontal transfer register section 3 is halved, so that one horizontal scanning period remains the same as the conventional time, and the horizontal resolution is reduced to half that of the conventional one. The amount of signal charge per bit can be twice as large as that of the conventional method and can be extracted as a solid-state image sensor output signal.

〔Effect of the invention〕

As explained above, according to the solid-state image sensor of the present invention,
Although the horizontal resolution is reduced, it is possible to create an element with twice the sensitivity of conventional ones, and one solid-state image sensor can have two different sensitivities, with only one sensitivity in low light. can also be raised. Furthermore, when applying the pulses shown in FIG. 3, the drive frequency of the horizontal transfer register can be lowered, and in applications that do not require high resolution, the generation of high frequency tallock noise can be reduced.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the structure of a solid-state image sensor according to an embodiment of the present invention, FIG. 2 is a diagram showing the structure of a conventional solid-state image sensor, and FIG. 3 is a diagram showing the structure of a conventional solid-state image sensor.
The figure shows the horizontal transfer register drive waveform of the solid-state image sensor of the present invention at high sensitivity, and Figure 4 shows the horizontal transfer register drive waveform of the conventional solid-state image sensor and the solid-state image sensor of the present invention at high resolution. FIG. 3 is a diagram showing horizontal transfer register drive waveforms. 1... Light receiving section 2... Vertical transfer register section 3... Horizontal transfer register section 4... Output section

Claims (1)

[Claims] (1) In a CCD-structured solid-state imaging device having a light receiving section, a vertical transfer resist section, a horizontal transfer resist section, and an output section, the electrodes of the horizontal transfer register section are connected to four signal lines repeating every four registers, respectively. A solid-state image sensing device characterized in that each of the solid-state image sensors can be driven independently.