JPH03108725A - Semiconductor crystal - Google Patents

Abstract

PURPOSE:To obtain a wafer structure which is characterized by excellent heat stability, excellent confining property of holes in a base layer and no Kirk effect, which poses a problem when a bipolar transistor is operated with a large current, and which is suitable of manufacturing the bipolar transistor by providing specified four compound semiconductor layers. CONSTITUTION:An n- or neutral InAlGaAs layer 24 is located in a composition region which is approximately aligned with the lattice of a high-resistance InP substrate. A first i-GaAsSb layer 25 is located in a composition region which is approximately aligned with the lattice of the InP substrate 21 and has at least one or more atomic layer. The layer 25 is provided on the InAlGaAs layer 24. The composition of Al of a p<+>-InAlGaAs layer 26 is lower than that of the other InAlGaAs layer 24. The layer 26 is located in the composition region which is approximately aligned with the lattice of the InP substrate 21. The layer 26 is provided on said GaAsSb layer 25. A second i-GaAsSb layer 25 is provided on said p-InAlGaAs layer 26. The layer 25 has at least one or more atomic layers. The layer 25 is located in a composition region which is approximately aligned with the lattice of the InP substrate 21. An n-InAlGaAs graded layer 28 is provided on said second GaAsSb layer 25 and located in a composition region which is approximately alinged with the lattice of the InP substrate.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to semiconductor crystals, especially npn heterojunction bipolar transistors that have excellent interface thermal stability and excellent hole trapping in the base layer. Regarding the wafer structure to be manufactured.

[Conventional technology]

■= Many of the V group compound semiconductors have attracted attention as materials for high-speed devices and optical devices because of their high electron mobility and direct transition type band structure, and have been actively researched. It is now being incorporated into actual products such as preamplifiers for satellite broadcast reception and optical communication equipment, and is becoming pervasive in daily life. Incidentally, in order to make the most of the characteristics of the ■-V group compound semiconductor devices, many of them have a heterostructure. For example, two-dimensional electron gas field effect transistors used in preamplifiers for satellite broadcast reception and semiconductor lasers used in optical communications are representative examples. However, the reliability of the heterointerface structure has not been established. For example, here n −I
Let us assume a heterojunction bipolar transistor consisting of an nGaAs structure and a -InGaAs structure.In this device, n-In
A large potential barrier on the valence band side of the AlAs emitter layer blocks holes in the p''-InGaAs base layer, making it possible to reduce the base current and, therefore, increasing the arrival rate of electrons injected from the emitter. I can do it.

However, on the other hand, the so-called Kirk effect (I.R.E. Transactions on Electron Devices) increases the effective base layer thickness during high current operation of bipolar transistors.
RE Trans, on ElectronDevi
ces ED-9f1962) 164) still remains.

To avoid this drawback, the collector layer can be made of InAlGaA
A so-called double heterostructure bipolar transistor having an S layer is considered. That is, in this case, p+-I
Since the n, GaAs base layer and the InAlGaAs collector layer also form a hetero interface, together with the hetero interface between the n-InAlAs emitter layer and the p+ InGaAs base layer, there are two hetero interfaces, and good device characteristics are obtained. For this purpose, it is particularly important that the characteristics of the two interfaces be good. Incidentally, in actual device fabrication, a heat treatment process is performed, or if the interface is thermally unstable, interdiffusion and the like occur, which impairs the steepness of the interface and causes deterioration of device characteristics. This deterioration also occurs for the same reason when the growth temperature of the hetero layer is high. Conventionally, in order to prevent this deterioration, the growth temperature has been lowered, and the device manufacturing process has been performed at a sufficiently low temperature so that deterioration due to interdiffusion and the like can be ignored.

[Invention or problem to be solved]

In the device manufacturing process, the restriction that the heat treatment temperature be low enough to ignore deterioration due to interdiffusion at the interface, etc. imposes a significant restriction on the device manufacturing process. Furthermore, in crystal growth, it is difficult to obtain a wafer with high crystallinity by low-temperature growth. In addition, under the harsh conditions of high-power operation at high temperatures required when a heterojunction bipolar transistor is used as a power amplifying element, there is also concern that the device characteristics may deteriorate due to interfacial thermal instability. .

It is an object of the present invention to be free from the above-mentioned drawbacks, that is, to have excellent thermal stability, excellent hole trapping in the base layer, and to avoid the so-called Kirk effect, which is a problem when bipolar transistors operate at large currents. The present invention provides a wafer structure suitable for fabrication of heterojunction bipolar transistors without oxidation.

[Means to solve the problem]

In order to achieve the above object, the semiconductor crystal of the present invention comprises In
n-type or neutral I with a composition range that is almost lattice matched to the P substrate
A first G in a composition range that is approximately lattice matched to an InP substrate of at least 61 atomic layers provided on an nAlGaAs layer.
an aAsSb layer; provided on the GaAsSb layer;
p-type InAl with a composition range lower than that of other In and AlGaAs layers and almost lattice matched to the InP substrate.
a GaAs layer, a second GaAs SI layer provided on the p-type InAp, GaAs layer and having a composition range that is approximately lattice matched to the InP substrate of at least one atomic layer;
It has an n-type InAlGaAs layer provided on the aAsSb layer and having a composition range that is approximately lattice matched to the InP substrate.

[Effect]

A heterojunction is a structure in which different materials are connected at an interface, and has the property of diffusing and mixing with each other when heat is applied. For example, Al A s/G
The thermal stability of the a A s interface has been investigated relatively well, and it has been reported that interdiffusion occurs at heat treatment temperatures of 650°C or higher (Japanese Journal of Applied Physics (Jan, J., 8pp1. Ph.
ys, 24 (1985) 117), therefore,
The process temperature for manufacturing elements of this system needs to be sufficiently lower than the temperature at which interdiffusion occurs. by the way,
(2) Some of the V-group compound semiconductor materials have an unstable mixed region within their mixed crystal composition range. Mixing instability means that it is difficult to mix in the negative direction, and A+
In the case of a quaternary system of type -, B, C1-yDy, phase separation occurs, for example, AB and CD. In terms of thermal equilibrium, when a solution with a multicomponent composition solidifies, rather than precipitating as a multicomponent mixed crystal, several
For example, phase separation and precipitation as a binary or ternary crystal is energetically stable.

Here, on the n-type or neutral InA'QGaAs layer having a composition that is approximately lattice matched to the InP substrate, at least one atomic layer of Ga having a composition approximately lattice matched to the InP substrate is formed.
AsSb layer, on which Al composition is other InAlGa
A p-type InAlGaAs layer with a composition range lower than the As layer and almost lattice-matched to the InP substrate, and on top of that a GaAsSb layer of at least one atomic layer with a composition range almost lattice-matched to the InP substrate, and further above that, an InP substrate. n-type I n A Q G a A in the composition range that is almost lattice matched to
The reason why the thermal stability of a semiconductor crystal for a heterojunction bipolar transistor having an S layer is improved will be explained. FIG. 1 shows the above-mentioned unstable mixed composition region obtained as a result of thermal equilibrium calculations when solid crystals are precipitated from a quaternary solution. (Japanese Journal of Applied Physics (Jpn, J, Appl, P
hys, 21 (1982) 1323), in the figure,
11 is a composition range lattice-matched to InP, 12 is a composition range lattice-matched to InAs, 13 is a composition range lattice-matched to GaAs, 14 is the boundary between the stable and unstable regions at a precipitation temperature of 400°C, and 15 is the composition range lattice-matched to InP. 16 is the boundary between the stable and unstable regions at a precipitation temperature of 600°C, 16 is the boundary between the stable and unstable regions at a precipitation temperature of 800°C, and 17 is the boundary between the stable and unstable regions at a precipitation temperature of 1000°C. show. Each square represents the composition range of each quaternary system. That is, the corners of the quadrilateral are binary systems, each side is a ternary system, and the inside of the quadrilateral is a quaternary system.

100 times the number on each curve indicates the temperature at which solid crystals are precipitated from each quaternary solution, and the area inside the curve is an unstable mixed composition region. Dotted lines indicate compositions with equal lattice constants, from top to bottom: GaSb, In
This is a composition region that is lattice matched to As and InP, respectively.

Here, if we look at the unstable mixed region of the InAlAsSb system, for example, it will be seen that it widely spreads over the entire composition range. Therefore, for example, InAlAsS at 400°C
It is expected that almost no solid with a mixed crystal composition is obtained from the b-based mixed solution, and that solids with a composition close to a binary system of InAs, InSb, AlAs, or AlSb are precipitated in a mosaic shape. Conversely, it can be said that in this InAl, As5b system, a solid having a composition close to a binary system is stable. That is, for example, assuming a heterojunction of InAs and AlSb, even if heat treated, it will become a mixed crystal and become InAlAsSb.
This means that it is more energetically stable to remain a heterojunction of InAs and AlSb than to form a mixed crystal. The same thing can be seen from Figure 1, A Q G
The same can be said about the a A ssb system and the InGaAs Sb system, so overall, I n A Q Ga
It can be said that the heterojunction interface between the As system and the InAlGaSb system is thermally stable. By the way, in reality, it is generally available, and when integration is assumed, a heterojunction interface with a composition that is almost lattice matched to an InP crystal substrate, which generates less parasitic capacitance and provides a high-quality, high-resistance substrate, is used. It would be appropriate to assume that.

Therefore, from this constraint, I nAlGaAs system and Al G
It is concluded that a combination of a A s S b systems would be appropriate.

However, as can be seen from FIG. 1, the A Q Ga As S b system has a large unstable mixing region spread throughout its composition range, and it is judged that it is not suitable for use over the entire composition range. From Figure 1, we can see that AlAsSb and Ga
It can be seen that AsSb is relatively stable.

However, A Q A s S b is unstable in water and is not suitable for current processes, and it is an indirect transition type semiconductor with low electron mobility, so GaA
sSb is more attractive. Therefore, from both the thermal stability of the heterojunction interface and the practical use, InAlG
It is concluded that the combination of aAs system and G a As S b system is the most suitable combination. Therefore, InP
On an n-type or neutral InAlGaAs layer in the 0 composition range that is approximately lattice matched to the substrate,
A GaAsSb layer of at least one atomic layer or more in a composition range that is approximately lattice matched to the InP substrate, and on top of it a p-type InA layer that has an Al composition lower than other InAlGaAs layers and also has a composition range that is approximately lattice matched to the InP substrate. Q G a
As layer, and at least one atomic layer of In on it.
A semiconductor crystal characterized by having a GaAsSb layer with a composition range that is approximately lattice matched to a P substrate and further thereon an n-type InAlGaAS layer with a composition range that is approximately lattice matched to an InP substrate has high thermal stability.

Furthermore, the proposed n-type or neutral I n A Q G a
A s / G a As S b / p-type InAl
GaAs/GaAs S b / n-type I nAlGa
In the As'J7f4 semiconductor crystal, one composition of the p-type I nAlGaAs layer serving as the base layer is an n-type or neutral I nAlGaAs collector layer and an n-type I nAlGaAs collector layer.
By making the Aq composition lower than that of the s emitter layer, the band structure of the present semiconductor crystal can be changed to the top of the valence band of the base layer or
Higher than the top of the valence band of the emitter layer and collector layer,
1 Holes in the base layer are completely confined within the base layer.

Therefore, the problem of the so-called Kirk effect, in which the effective thickness of the base layer increases during large current operation of the bipolar transistor, can also be avoided. Therefore, according to the present invention, it is possible to obtain a heterojunction bipolar transistor that not only has excellent thermal stability but also has better device characteristics than a normal heterojunction bipolar transistor having one heterojunction.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

FIG. 2 is a cross-sectional view showing a heterojunction bipolar transistor manufactured using the semiconductor crystal according to the present invention.

The wafers for the heterojunction bipolar 1 to transistors are grown on a semi-insulating InP substrate using the molecular beam growth method.
It was prepared at ℃. Its structure consists of a high-resistance In, P substrate 21, a collector contact layer of 3,000 layers, and an electron concentration of 2 x 1019CI+-' n+In o5sG.
ao, 47A 5 layers 22, 500 as collector layer
0 people, n -I of electron concentration 1 x 1016 CI11-3
no, 53G 2 ao47As layer 23, 50A as sub-collector layer, @
Child drift rate I x 10"am-'n+I no, 53
A 'n O, 24 Gao 23 As layer 24. 1 of 12
-GaAsSb layer 25, 1000 as base layer, hole concentration 2X1019G-3 P +I no, s3G
ao47A s layer 26.12 i-Ga A s
S b layer 25, 1500 people as emitter layer, n I n 0.52A Q 0 with electron concentration 2X10"am'
．． 48A S layer 27, emitter layer and emitter contact 1
~The Al group composition is 0 as a layer that electrically connects the layers smoothly.
．． The thickness varied from 48 to 0.500 n I
n, yA QeGa+-x-yAs graded layer (y20.5 > 28, 500 as emitter contact layer, n+ with electron concentration 2X1019cm+-3
-I no 6gGao 47As layers 29 are sequentially laminated.

The ohmic metal 30 is AuGe/Au, and the ohmic metal 31 is A u M n /A u. The band structure is shown in FIG. The current amplification factor of this heterojunction bipolar transistor when the emitter is grounded is 100, and its characteristics hardly deteriorated even after heat treatment in hydrogen at 600° C. for 130 minutes. In the figure, 32 is the Fermi level.

〔Effect of the invention〕

As described above, according to the semiconductor crystal of the present invention, a thermally stable heterojunction can be obtained, so that the restrictions on crystal growth temperature and device fabrication process temperature are not significantly relaxed, but rather the A heterojunction bipolar transistor with excellent hole containment and no Kirk effect can be manufactured. Furthermore, it is clear that devices fabricated using the present invention can be expected to perform well and stably for long periods of time even under severe temperature conditions.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a cross-sectional view showing a heterojunction bipolar transistor manufactured using the semiconductor crystal according to the present invention, and FIG. FIG. 2 is a diagram showing the band structure of a heterojunction bipolar transistor fabricated using the same method. 11... Composition region lattice matched to InP 12... In
Composition region 4 lattice-matched to As 13... Composition region 14 lattice-matched to GaSb... Boundary between stable region and unstable region at precipitation temperature 400°C 15...
Boundary between stable region and unstable region at precipitation temperature 600℃ 16...
・Boundary between stable and unstable region at precipitation temperature 800℃ 17・
...Boundary between stable region and unstable region at precipitation temperature 1000℃ 2
1... High resistance InP substrate 22...n"-InGaAs layer 23...-n-InGaAs layer 24...-n-InAl, GaAs layer 25-i'-G a As S b layer 2G=-p
"-InGaAs layer 27--n-InAlAs layer 28--n-I nAlGaAs graded layer 29
-n''-InGaAs layer 30...Ohmic metal 31...Ohmic metal 32...Fermi level

Claims (1)

[Claims] (1) a first GaAsSb layer having a composition of at least one atomic layer or more and having a composition of approximately lattice matching to the InP substrate, provided on an n-type or neutral InAlGaAs layer having a composition of approximately lattice matching to the InP substrate; A p-type I layer formed on the GaAsSb layer and having an Al composition lower than that of other InAlGaAs layers and in a composition range that is almost lattice matched to the InP substrate.
an nAlGaAs layer; a second GaAsSb layer of at least one atomic layer provided on the p-type InAlGaAs layer and having a composition approximately lattice-matched to the InP substrate; and an InP layer provided on the second GaAsSb layer. 1. A semiconductor crystal comprising an n-type InAlGaAs layer having a composition range that is approximately lattice matched to a substrate.