JPH03108060A - Digital correlating device - Google Patents

Abstract

PURPOSE:To execute the switching of a reference data instantaneously by providing plural shift registers which input and hold the reference data, and a data selector which selects one of the shift registers. CONSTITUTION:Shift registers 6b, 6c input and hold the reference data. A data selector 7 selects a data inputted at terminals A1, B1 by the selection signal of a selection terminal 3, and outputs the data to a terminal Y1. Correlated data is inputted from a terminal 1 to a shift register 6a, compared with the reference data selected by the selector 7, coincidence/non-coincidence of each bit is decided by an exclusive OR 8, the number of coincidences is calculated at an adder 9, and the correlation value is outputted from a terminal 10. Thus, without re-inputting the reference data, the switching of the data can be executed instantaneously.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital correlator that performs correlation calculations on binary data.

[Conventional technology]

FIG. 3 shows a conventional digital correlator.

In the figure, 1 is an input terminal for correlated data, 2 is a clock input terminal for serial input of correlated data, 4 is an input terminal for reference data, 5 is a clock input terminal for serial input of reference data, and 6a is a clock input terminal for serial input of reference data. Serial-in-parallel out shift register (hereinafter simply referred to as shift register) for holding correlation data; 6b is a serial-in-parallel out shift register for inputting reference data; 8 is for each bit of correlation data and reference data. 9 is an adder for calculating the number of matches of the exclusive OR 8, 10 is an output terminal for the calculation result of the adder 9, that is, the correlation result; 11 is a data register for holding reference data; 12 is a clock input terminal of the data register 11;

Next, the operation will be explained.

Reference data serving as reference data for the correlation calculation is input from the input terminal 4 to the shift register 6b. Next, the input reference data is loaded and held in the data register 11 by applying a clock to the input terminal 12. The correlated data is serially inputted to the shift register 6a from the input terminal 1, and the match/mismatch for each bit is obtained by exclusive OR 8. The number of matches is calculated by the adder 9, and as a result, That is, a correlation value is obtained from the output terminal 10. The correlation calculation is performed in synchronization with the shift clock 2 of the data to be correlated, the calculation is performed every 1 bit shift, and the calculation results are continuously output in synchronization with the shift clock 2.

Furthermore, when changing the reference data during the calculation, this is done by inputting new reference data to the shift register 6b and reloading it to the data register 11.

[Problem to be solved by the invention]

Conventional digital correlators are configured as described above, so when changing the reference data, the reference data must be re-inputted into the shift register each time, which takes time and requires continuous processing. There were problems such as the inability to switch reference data.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a digital correlator that can switch between two or more types of reference data at high speed when handling two or more types of reference data.

[Means to solve the problem]

A digital correlator according to the present invention includes a plurality of shift registers that input and hold reference data;
A data selector circuit for selecting one of the plurality of shift registers is provided.

[Effect]

In this invention, reference data input and held in a shift register is instantaneously switched by a data selector circuit.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a digital correlator according to one embodiment of the invention. This embodiment is an example of a digital correlator in which the length of correlation calculation is 64 bits and there are two types of reference data. 1 is an input terminal for correlated data, and 2 is an input terminal for serial input of correlated data. Clock input terminal, 3 is an input terminal for selecting reference data, 4a, 4
b is an input terminal for two types of reference data, 5a and 5b are clock input terminals for serial input of two types of reference data, 6a is a shift register for inputting and holding correlated data, 6b and 6c
is a shift register for inputting and holding two types of reference data, 7 is a data selector for selecting two types of reference data, and 8 is a data selector for selecting correlation data and data register or fanless data. 9 is an adder for calculating the number of matches of the exclusive OR 8, and 10 is the calculation result of the adder 9, that is, the correlation result. This is the output terminal of

Next, the operation will be explained.

Reference data is input to the two shift registers 6b and 6c from the clock input terminal 5 from the input terminals 4a and 4b, respectively.
It is input and held by the shift clock given to a and 5b. The held reference data is output in parallel to the Q1 to Qba terminals of the respective shift registers 6b and 6c,
Data selector 7 At~A&4. It is given to the Bl to B&4 terminals. Either the reference data given to A, ~A64 by the data selector 7 or the reference data given to Bl""Bi2 is selected by the reference data selection terminal 3, for example, when A is "0",
When 1 to A 64, '1n, select B to Bh4 and output to Y, xY, .

The correlated data is serially input to the shift register 6a from the input terminal 1, and the match/mismatch for each bit is obtained by exclusive OR 8.Then, the number of matches is calculated by the adder 9, and as a result, That is, a correlation value is obtained from the output terminal 10.

Note that in the above embodiment, two reference data are held in two shift registers, but as shown in the second embodiment of FIG. It may be held in a shift register and one N-bit length data register.

That is, in FIG. 2, 5b is a clock input terminal for taking in the data of the shift register into the register, and 11 is an N-bit length data register for edge operation or level operation. In such a configuration, first N-bit long reference data is input from the reference data input terminal 4b to the shift register 6C in synchronization with the clock 5b of the reference data input terminal. Next, a signal for loading the reference data into the N-bit length data register 11 is inputted from the terminal 12, and the reference data is held in the data register 11. Then the second
The N-bit length reference data is held in the shift register 6C in the same way as the first reference data. After the setting of the two reference data is completed, the selector 7 switches which reference data is to be used, the data register 11 or the shift register 6C. The operation of calculating the correlation with data is similar to the embodiment shown in FIG.

〔Effect of the invention〕

As described above, according to the present invention, a shift register for inputting and holding reference data is provided as necessary,
Since the configuration is such that selection is made using a data selector, it is possible to obtain a digital correlator that can instantly switch reference data without requiring re-input of the reference data even when switching the reference data.

[Brief explanation of drawings]

FIG. 1 shows a digital correlator according to one embodiment of the present invention, FIG. 2 shows a digital correlator according to another embodiment of the invention, and FIG. 3 shows a conventional digital correlator. be. 1 is a correlated data input terminal, 2 is a clock input terminal for serial input of correlated data, 3 is a reference data selection signal input terminal, 4 is an input terminal for reference data, 5 is a clock input terminal for reference data, and 6 is a clock input terminal for serial input of correlated data. It is a shift register. Note that the same reference numerals in the figures indicate the same or equivalent parts. Figure 2

Claims (1)

[Claims] (1) A digital correlator that performs correlation calculations on binary data includes a plurality of shift registers that input and hold reference data that serves as standard data for correlation calculations, and a data selector that selects the reference data held in the plurality of shift registers. A digital correlator characterized by comprising a circuit.