JPH03106015A - Charged particle beam lithography method - Google Patents

Charged particle beam lithography method

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Publication number
JPH03106015A
JPH03106015A JP24393789A JP24393789A JPH03106015A JP H03106015 A JPH03106015 A JP H03106015A JP 24393789 A JP24393789 A JP 24393789A JP 24393789 A JP24393789 A JP 24393789A JP H03106015 A JPH03106015 A JP H03106015A
Authority
JP
Japan
Prior art keywords
substrate
pattern
thin film
charged particle
particle beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24393789A
Other languages
Japanese (ja)
Other versions
JP2758940B2 (en
Inventor
Tadashi Komagata
正 駒形
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeol Ltd
Original Assignee
Jeol Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeol Ltd filed Critical Jeol Ltd
Priority to JP1243937A priority Critical patent/JP2758940B2/en
Publication of JPH03106015A publication Critical patent/JPH03106015A/en
Priority to US07/807,800 priority patent/US5141830A/en
Application granted granted Critical
Publication of JP2758940B2 publication Critical patent/JP2758940B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To make it possible to form a necessary pattern in a highly precise manner even when a substrate is deformed and recovered to the original state by a method wherein the amount of deformation of the substrate corresponding to the pattern formed prior to patterning is computed and the irradiation position of a charged particle beam is corrected in accordance with the amount of the above-mentioned deformation. CONSTITUTION:Before performance of patterning, the coefficient of elasticity of material substrate 3 is computed, patterning data is changed in accordance with the above-mentioned elasticity coefficient, a pattern is drawn in accordance with the expansion and contraction of the substrate 3, most of thin film 2 is removed finally from the substrate 3 by etching, and when the deformation of the substrate 3 is returned to the original state, a pattern is formed in the prescribed accuracy. Accordingly, the effect of adhesion of the thin film on the substrate 3 can be eliminated. As a result, a necessary pattern can be formed in a highly precise manner even when the substrate is deformed, or it returns to its original state.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、電子ビームやイオンビーム描画を利用して半
導体製造用に用いられるマスクを作戊する場合などに使
用して好適な荷電粒子ビーム描画方法に関する。
Detailed Description of the Invention (Field of Industrial Application) The present invention provides a charged particle beam that is suitable for use when creating masks used in semiconductor manufacturing using electron beam or ion beam lithography. Concerning drawing methods.

(従来の技術) 第2図は、電子ビーム描画によって半導体製造用のマス
クを作成する方法を説明する図であり、第2図(a)は
、ガラス基板1を示している。このガラス基板1には、
光を遮蔽する、例えば、クロミウム(C r)などの物
質の薄膜2か真空蒸着法などによって付着させられる(
第2図(b))。
(Prior Art) FIG. 2 is a diagram illustrating a method of creating a mask for semiconductor manufacturing by electron beam lithography, and FIG. 2(a) shows a glass substrate 1. As shown in FIG. This glass substrate 1 has
A thin film 2 of a material that blocks light, such as chromium (Cr), is deposited by vacuum evaporation or the like (
Figure 2(b)).

この後、第2図(c)に示すごとく、薄膜2の上にレジ
スト3が塗布される。なお、第2図(b)に示した薄膜
2の付着により、薄膜の内部応力熱応力によって、ガラ
ス基板1が変形する。
Thereafter, a resist 3 is applied onto the thin film 2, as shown in FIG. 2(c). Note that due to the attachment of the thin film 2 shown in FIG. 2(b), the glass substrate 1 is deformed due to the internal stress and thermal stress of the thin film.

レジストの塗布の後、第2図(d)に示すごとく、所望
部分に電子ビームEBが照射される。この例では、電子
ビームは、aの間隔で帯状に照射されている。レジスト
3がポジ型のレジストの場合、第2図(e)に示すよう
に、レジストの現像を行うと、電子ビームの照射部分の
みレジストが取り除かれる。レジストの現像が終了した
のち、エッチングを行うと、第2図(f)のように、電
子ビーム照射部分のみの薄膜が除去される。薄膜が取り
除かれた帯状部分の間隔は、bてあるが、第2図(f)
の状態では、基板1の大部分には、依然として薄膜2が
付着されており、ガラス基板1の変形は、第2図(b)
の状態とそれ程変わりがなく、電子ビームの照射間隔a
と帯状部分の間隔bとはほぼ等しい。
After applying the resist, a desired portion is irradiated with an electron beam EB, as shown in FIG. 2(d). In this example, the electron beam is irradiated in a band shape at intervals of a. If the resist 3 is a positive type resist, as shown in FIG. 2(e), when the resist is developed, only the portion irradiated with the electron beam is removed. When etching is performed after the development of the resist is completed, only the thin film irradiated with the electron beam is removed, as shown in FIG. 2(f). The distance between the strips from which the thin film has been removed is shown in Fig. 2(f).
In this state, the thin film 2 is still attached to most of the substrate 1, and the deformation of the glass substrate 1 is as shown in FIG. 2(b).
The condition is not much different from that of , and the electron beam irradiation interval a
and the interval b between the band-shaped portions are approximately equal.

(発明が解決しようとする課題) 一方、ネガ型のレジストを用いた場合、電子ビーム描画
までのステップは、第2図(a)〜(d)までのボジ型
レジストの描画と同様であるが、レジストの現像を行う
と、第3図(a)に示すように、電子ビームの照射され
た部分のみのレジストを残し、他の部分のレジストは除
去される。第3図(a)のようにレジストの現像を行っ
た後、エッチングを行うと、第3図(b)に示すように
、レジストが残っていた部分の薄膜を除き、薄膜は除去
される。
(Problem to be Solved by the Invention) On the other hand, when a negative resist is used, the steps up to electron beam lithography are the same as those for positive resist lithography shown in FIGS. 2(a) to 2(d). When the resist is developed, as shown in FIG. 3(a), only the resist in the part irradiated with the electron beam remains, and the resist in other parts is removed. When etching is performed after developing the resist as shown in FIG. 3(a), the thin film is removed except for the portion where the resist remains, as shown in FIG. 3(b).

このようにネガ型レジストを用いた場合には、電子ビー
ムの照射された部分にのみ薄膜が残される。このような
場合、基板1のほとんどの部分から薄膜が除かれるため
に、薄膜の内部応力などによって変形していた基板は、
第3図(b)に示すように、変形状態から、もとの状態
に戻ってしまう。その結果、残された薄膜の間隔Cは、
電子ビムの照射間隔aとずれてしまい、描画によって形
成されたパターンの精度が劣化してしまう。
When a negative resist is used in this way, a thin film is left only in the areas irradiated with the electron beam. In such a case, since the thin film is removed from most parts of the substrate 1, the substrate that has been deformed due to the internal stress of the thin film, etc.
As shown in FIG. 3(b), the deformed state returns to the original state. As a result, the distance C between the remaining thin films is
This deviates from the irradiation interval a of the electron beam, and the precision of the pattern formed by drawing deteriorates.

本発明は、このような点に鑑みてなされたもので、その
目的は、基板が変形し、又元に戻っても、精度良く必要
なパターンを形或することができる荷電粒子ビーム描画
方法を実現するにある。
The present invention has been made in view of these points, and its purpose is to provide a charged particle beam drawing method that can form a required pattern with high accuracy even if the substrate is deformed and then returned to its original shape. It is in the realization.

(課題を解決するための手段) 本発明に基づく荷電粒子ビーム描画方法は、被描画基板
上に薄膜を付着させ、その上に荷電粒子ビームに対する
レジストを塗布し、レジスト上に、荷電粒子ビームによ
り所望パターンの描画を行うようにした荷電粒子ビーム
描画方法において、描画に先立ち、形成されるパターン
に応した基板の変形量を求め、この変形量に応じて荷電
粒子ビームの照射位置の補正を行うようにしたことを特
徴としている。
(Means for Solving the Problems) In the charged particle beam writing method based on the present invention, a thin film is deposited on a substrate to be drawn, a resist for the charged particle beam is applied thereon, and the charged particle beam is applied onto the resist. In a charged particle beam writing method that draws a desired pattern, the amount of deformation of the substrate corresponding to the pattern to be formed is determined prior to writing, and the irradiation position of the charged particle beam is corrected according to this amount of deformation. It is characterized by the fact that

(作用) 予め、描画パターンに応じて、基板の変形の程度を求め
ておき、実際の描画に際しては、基板の変形量を考慮し
て補正した間隔で必要パターンの描画を行う。
(Function) The degree of deformation of the substrate is determined in advance according to the pattern to be drawn, and during actual drawing, the required pattern is drawn at intervals corrected in consideration of the amount of deformation of the substrate.

(実施例) 以下、図面を参照して本発明の実施例を詳細に説明する
。第1図は、本発明に基づく描画方法を実施するための
電子ビーム描画装置の一例を示している。電子銃1から
発生した電子ビームEBは、集束レンズ2によって被描
画材料3上に集束されるが、材料3は、移動ステージ4
上に載せられている。ステージ4は、駆動機構5によっ
て移動させられるが、駆動機構5は、コンピュータ6に
よって制御されている。材料3上の電子ビームの照射位
置は、偏向コイル7への偏向信号によって変えられるが
、偏向信号は、コンピュータ6によって制御される偏向
回路8から供給される。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 shows an example of an electron beam lithography apparatus for carrying out the lithography method based on the present invention. The electron beam EB generated from the electron gun 1 is focused onto the material 3 to be drawn by the focusing lens 2.
It is placed above. The stage 4 is moved by a drive mechanism 5, which is controlled by a computer 6. The irradiation position of the electron beam on the material 3 is changed by a deflection signal to a deflection coil 7, which is supplied from a deflection circuit 8 controlled by a computer 6.

被描画材料3の描画パターンデータは、パターンデータ
用メモリ9に格納されており、また、材料上に何チップ
描画するかの情報を含むスケジュールデータは、スケジ
ュールデータ用メモリ10に格納されている。更に、後
述する材料基板3の変形量を記憶するメモリ11がコン
ピュータ6に接続されている。なお、この実施例では、
各メモリは独立して設けられているが、単一のメモリを
用い、その領域を分けて異なったデータを格納するよう
にしても良い。
Drawing pattern data for the drawing material 3 is stored in a pattern data memory 9, and schedule data including information on how many chips to draw on the material is stored in a schedule data memory 10. Furthermore, a memory 11 that stores the amount of deformation of the material substrate 3, which will be described later, is connected to the computer 6. In addition, in this example,
Although each memory is provided independently, a single memory may be used and its areas may be divided to store different data.

上述した構成で、実際の描画に先立って、描画する材料
基板3の変形量、すなわち、最終的な変形による各パタ
ーン或いは、パターンの間の間隔の伸縮係数Gが求めら
れる。今、描画されるチップの全面積に対する描画によ
って残された薄膜部分の面積の比、すなわち面積率をA
1レジストのタイプをS(ネガレジストはS−−1、ポ
ジレジストは、S−1) 、使用される薄膜の伸縮係数
をK1一〇とすると、材料基板の伸縮係数Gは、次のよ
うに表すことができる。
With the above-described configuration, prior to actual drawing, the amount of deformation of the material substrate 3 to be drawn, that is, the expansion/contraction coefficient G of each pattern or the interval between patterns due to the final deformation is determined. Now, the ratio of the area of the thin film portion left by drawing to the total area of the chip to be drawn, that is, the area ratio, is A.
1. If the resist type is S (negative resist is S--1, positive resist is S-1) and the expansion/contraction coefficient of the thin film used is K110, then the expansion/contraction coefficient G of the material substrate is as follows. can be expressed.

G−SXAX (K,+K2+・・・十K,l)なお、
面積率Aは、メモリ9とメモリ10に記憶されたパター
ンデータとスケジュールデータとこよって求められる。
G-SXAX (K, +K2+...10K, l)
The area ratio A is determined from the pattern data and schedule data stored in the memory 9 and the memory 10.

コンピュータ6は、上記伸縮係数Gを演算によって求め
、メモリ11に格納する。その後、コンピュータ6は、
パターンデータ、スケジュールデータによってステージ
駆動機構5と偏向回路8を制御し、所望のパターンの描
画を行う。このとき、例えば、X方向の長さがX1、Y
方向の長さがY1のパターンデータが供給されると、コ
ンピュータ6は、次の演算を行う。
The computer 6 calculates the expansion/contraction coefficient G and stores it in the memory 11. After that, the computer 6
The stage drive mechanism 5 and deflection circuit 8 are controlled based on the pattern data and schedule data to draw a desired pattern. At this time, for example, the length in the X direction is X1, Y
When supplied with pattern data having a length in the direction Y1, the computer 6 performs the following calculation.

X’ −XxG Y  −YxG このように、実際の描画時には、描画パターンデータは
、材料基板3の収縮に応じてデータが変換され、この変
換されたデータによって偏向回路8およびステージ駆動
機構5が制御される。その結果、描画時のパターンの長
さは、短くされるが、最終的にエッチングにより不必要
な部分の薄膜が取り除かれた後においては、材料基板の
収縮が角♀除されるために正確な長さとなる。例えば、
第2図と第3図に示した例では、第2図(d)に示す電
子ビームの描画時には、描画の間隔は、aXGとされる
が、第3[ffl (b)の状態となったときには、基
板の収縮がなくなるために、間隔bはほぼaに等しくな
る。
X' -XxG Y -YxG In this way, during actual drawing, the drawing pattern data is converted according to the contraction of the material substrate 3, and the deflection circuit 8 and the stage drive mechanism 5 are controlled by this converted data. be done. As a result, the length of the pattern at the time of drawing is shortened, but after the unnecessary portions of the thin film are finally removed by etching, the shrinkage of the material substrate is halved, so the exact length is shortened. It becomes Satoshi. for example,
In the example shown in FIGS. 2 and 3, when writing with the electron beam shown in FIG. 2(d), the writing interval is a Sometimes the spacing b will be approximately equal to a due to no shrinkage of the substrate.

以上本発明の一実施例を説明したが、本発明は、この実
施例に限定されない。例えば、ネガ型レジストを例にし
て説明したが、ボジ型レジストを用いた場合でも、基板
の大部分に電子ビームを照射し、薄膜の残る部分が少な
くなるような場合には、基板の変形が無視できなくなり
、本発明を適用する必要が生じる。また、電子ビーム描
画を例に説明したが、イオンビーム描画にも本発明を適
用することができる。更に、基板の収縮係数の求め方は
上記に限らない。例えば、次のようにして求めることが
できる。
Although one embodiment of the present invention has been described above, the present invention is not limited to this embodiment. For example, although we have explained using a negative resist as an example, even when using a positive resist, if a large part of the substrate is irradiated with the electron beam and only a small portion of the thin film remains, the substrate may be deformed. This can no longer be ignored, and it becomes necessary to apply the present invention. Furthermore, although the explanation has been given using electron beam lithography as an example, the present invention can also be applied to ion beam lithography. Furthermore, the method of determining the shrinkage coefficient of the substrate is not limited to the above method. For example, it can be determined as follows.

今、基板のヤング率をEm、基板の厚みをd.、薄膜の
厚みをd I 、基板の半径をγ、基板のポアソン比を
ν、堆積薄膜の応力をσとすると、基板のたわみδは、
次のように表すことができる。
Now, the Young's modulus of the substrate is Em, and the thickness of the substrate is d. , the thickness of the thin film is d I , the radius of the substrate is γ, the Poisson's ratio of the substrate is ν, and the stress of the deposited thin film is σ, then the deflection of the substrate δ is:
It can be expressed as follows.

基板の伸びΔgは、基板の直径をg (−27)とする
と、次のようになる。
The elongation Δg of the substrate is as follows, assuming that the diameter of the substrate is g (-27).

従って、収縮係数Gは、次のようになる。Therefore, the contraction coefficient G is as follows.

(発明の効果) 以上説明したように、本発明では描画に先立つて、材料
基板の伸縮係数を求め、この伸縮係数に応じて描画デー
タを変換し、基板の伸縮に応じて描画を行い、最終的に
エッチングによって基板から大部分の薄膜が取り除かれ
、基板の変形が元に戻った場合に、所定の精度で正確な
パターンが形威されるようにしたので、基板への薄膜付
着の影響を無くすことができる。
(Effects of the Invention) As explained above, in the present invention, prior to drawing, the expansion/contraction coefficient of the material substrate is determined, the drawing data is converted according to this expansion/contraction coefficient, the drawing is performed according to the expansion/contraction of the substrate, and the final When most of the thin film is removed from the substrate by etching and the substrate deforms back to its original shape, an accurate pattern is formed with a predetermined precision, so the effect of thin film adhesion to the substrate is reduced. It can be eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明に基づく方法を実施するための電子ビ
ーム描画装置を示す図、第2図および第3図は、電子ビ
ーム描画によるマスク作成のステップを示す図である。 1・・・電子銃     2・・・集束レンズ3・・・
被描画材料基板 4・・・ステージ5・・・駆動機構 
   6・・・コンピュータ7・・偏向コイル   8
・・・偏向回路9,10.11・・・メモリ
FIG. 1 is a diagram showing an electron beam lithography apparatus for implementing the method based on the present invention, and FIGS. 2 and 3 are diagrams illustrating the steps of creating a mask by electron beam lithography. 1... Electron gun 2... Focusing lens 3...
Drawing material substrate 4...Stage 5...Drive mechanism
6... Computer 7... Deflection coil 8
...Deflection circuit 9, 10.11...Memory

Claims (1)

【特許請求の範囲】[Claims] 被描画基板上に薄膜を付着させ、その上に荷電粒子ビー
ムに対するレジストを塗布し、レジスト上に、荷電粒子
ビームにより所望パターンの描画を行うようにした荷電
粒子ビーム描画方法において、描画に先立ち、形成され
るパターンに応じた基板の変形量を求め、この変形量に
応じて荷電粒子ビームの照射位置の補正を行うようにし
た荷電粒子ビーム描画方法。
In a charged particle beam drawing method in which a thin film is deposited on a substrate to be drawn, a resist for a charged particle beam is applied thereon, and a desired pattern is drawn on the resist by a charged particle beam, prior to drawing, A charged particle beam drawing method that calculates the amount of deformation of a substrate according to the pattern to be formed, and corrects the irradiation position of the charged particle beam according to this amount of deformation.
JP1243937A 1989-09-20 1989-09-20 Charged particle beam drawing method Expired - Fee Related JP2758940B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1243937A JP2758940B2 (en) 1989-09-20 1989-09-20 Charged particle beam drawing method
US07/807,800 US5141830A (en) 1989-09-20 1991-12-13 Charged-particle beam lithography method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1243937A JP2758940B2 (en) 1989-09-20 1989-09-20 Charged particle beam drawing method

Publications (2)

Publication Number Publication Date
JPH03106015A true JPH03106015A (en) 1991-05-02
JP2758940B2 JP2758940B2 (en) 1998-05-28

Family

ID=17111254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1243937A Expired - Fee Related JP2758940B2 (en) 1989-09-20 1989-09-20 Charged particle beam drawing method

Country Status (1)

Country Link
JP (1) JP2758940B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9846357B2 (en) 2014-03-14 2017-12-19 Toshiba Memory Corporation Photomask manufacturing method and photomask

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5591826A (en) * 1978-12-29 1980-07-11 Fujitsu Ltd Method of exposing electronic beam
JPS5764934A (en) * 1980-10-08 1982-04-20 Toshiba Corp Manufacture of semiconductor device
JPS6134936A (en) * 1984-07-26 1986-02-19 Hitachi Ltd Specimen surface height correcting process of electron beam image drawing device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5591826A (en) * 1978-12-29 1980-07-11 Fujitsu Ltd Method of exposing electronic beam
JPS5764934A (en) * 1980-10-08 1982-04-20 Toshiba Corp Manufacture of semiconductor device
JPS6134936A (en) * 1984-07-26 1986-02-19 Hitachi Ltd Specimen surface height correcting process of electron beam image drawing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9846357B2 (en) 2014-03-14 2017-12-19 Toshiba Memory Corporation Photomask manufacturing method and photomask

Also Published As

Publication number Publication date
JP2758940B2 (en) 1998-05-28

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