JPH03104186A - Electronic circuit board structure - Google Patents
Electronic circuit board structureInfo
- Publication number
- JPH03104186A JPH03104186A JP24116689A JP24116689A JPH03104186A JP H03104186 A JPH03104186 A JP H03104186A JP 24116689 A JP24116689 A JP 24116689A JP 24116689 A JP24116689 A JP 24116689A JP H03104186 A JPH03104186 A JP H03104186A
- Authority
- JP
- Japan
- Prior art keywords
- reflow
- circuit board
- board
- temperature
- radiation heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims description 7
- 238000005476 soldering Methods 0.000 claims description 5
- 239000002184 metal Substances 0.000 abstract description 12
- 229910000679 solder Inorganic materials 0.000 abstract description 10
- 239000006071 cream Substances 0.000 abstract description 5
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract description 5
- 238000002310 reflectometry Methods 0.000 abstract description 2
- 230000005855 radiation Effects 0.000 abstract 4
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 239000011810 insulating material Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野コ
本発明は、半導体集積回路をリフロー半田付け工程によ
って基板に取り付ける電子回路基板の構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of an electronic circuit board in which a semiconductor integrated circuit is attached to the board by a reflow soldering process.
［従来の技術］
従来、半導体集積回路（ＩＣ）を有する回路基板をリフ
ローする場合、第４図に示す通り、回路基板１の上方か
ら輻射されるリフローの輻射熱７１に対して、ＩＣ２を
保護するための手段は無かった。従って、ＩＣ２のモー
ルドされた部分である、ＩＣ２の本体２１の温度は、第
５図において実線で表わした温度カーブ８１を描いてい
た。この温度カーブが表わすように、ＩＣ２の本体２１
の温度は最高温度ＴＭＡＸまで上昇していた。[Prior Art] Conventionally, when reflowing a circuit board having a semiconductor integrated circuit (IC), the IC 2 is protected from reflow radiant heat 71 radiated from above the circuit board 1, as shown in FIG. There was no way to do so. Therefore, the temperature of the main body 21 of the IC2, which is the molded part of the IC2, was drawn as a temperature curve 81 shown by a solid line in FIG. As this temperature curve shows, the main body 21 of IC2
The temperature had risen to the maximum temperature TMAX.
但し、第５図の８１は従来技術でリフローを行なったと
きの、ＩＣ２の本体２１の温度の変化であり、さらに、
従来技術並びに本発明における、リード線３の部分の温
度変化を表わした図であり、８２は本発明を実施したと
きの、ＩＣ２の本体２１の温度変化を表わした図である
。However, 81 in FIG. 5 is the change in temperature of the main body 21 of the IC 2 when reflow is performed using the conventional technique, and furthermore,
8 is a diagram showing the temperature change of the lead wire 3 portion in the prior art and the present invention, and 82 is a diagram showing the temperature change in the main body 21 of the IC 2 when the present invention is implemented.
この最高温度ＴＭＡＸが、ＩＣ２がその機能を保持する
のに必要な最高温度、すなわち耐熱温度ＴＡＳを超えて
いる場合、このＩＣはりフローが不可能であり、後工程
において作業員が長い時間をかけて、手作業でＩＣを回
路基板に半田付けしていた。If this maximum temperature TMAX exceeds the maximum temperature required for IC2 to maintain its function, that is, the heat-resistant temperature TAS, this IC beaming flow is impossible, and workers spend a long time in the subsequent process. ICs were manually soldered onto circuit boards.
［発明が解決しようとする課題コ
しかし、上記のような従来技術において、リフローが出
来ない場合に、後工程において作業員が手作業でＩＣを
回路基板に半田付けする場合、コストが高い、時間がか
かる、品質にばらつきがでる等の問題点があった。そこ
で、かかる問題点を解決するために、本発明はＩＣの耐
熱温度ＴＡＳが、リフローの最高温度ＴＭＡＸを超えて
しまう場合においてもリフローができるようにし、安い
コストで、速く、ばらつきなく安定して製造することが
できる電子回路基板構造を提供することを目的とする。[Problems to be Solved by the Invention] However, in the conventional technology as described above, when reflow is not possible, when workers manually solder the IC to the circuit board in the subsequent process, it is costly and time consuming. There were problems such as high costs and variations in quality. Therefore, in order to solve this problem, the present invention enables reflow even when the heat-resistant temperature TAS of the IC exceeds the maximum reflow temperature TMAX, and enables the reflow to be performed at low cost, quickly, and stably without variation. The object is to provide an electronic circuit board structure that can be manufactured.
［課題を解決するための手段］
本発明は、半導体集積回路をリフロー半田付け工程によ
って基板に取り付ける回路基板において、前記リフロー
熱から前記半導体集積回路を保護するための輻射熱の遮
蔽物体を用いて製造されることを特徴とする。[Means for Solving the Problems] The present invention provides a circuit board in which a semiconductor integrated circuit is attached to the board by a reflow soldering process, which is manufactured using a radiant heat shielding object for protecting the semiconductor integrated circuit from the reflow heat. It is characterized by being
［実施例］
第１図は、本発明の実施例の１つである。回路基板をリ
フローするときに、半導体集積回路（エＣ）２の本体２
１の上に、輻射熱に対する反射率が高い金属板６３を置
く。このとき回路基板１の上方から輻射される輻射熱７
１は、金属板６３にあたり、そのエネルギーの大部分は
、金属板６３の表面で反射され、ＩＣ２の本体２１まで
達しない。この時、ＩＣ２の本体２１の温度は第５図の
点線で表わした温度カーブ８２を示す。この温度カーブ
８２の最高温度ＴＬＯＷは、ＩＣ２の品質を保つ事の出
来る最高温度ＴＡＳより低い温度である。また、この時
に、ＩＣ２のリード線３と、その下に印刷されたクリー
ム半田４、及び、回路基板上に配線されたパターン５は
、金属板６３に覆われていないため、輻射熱７が直接あ
たり、クリーム半田４はリフローの最高温度ＴＭＡＸに
達し、前記クリーム半田４はリフローの目的通り溶融し
、前記リード線３と前記パターン５をばらつきなく確実
に接続することができる。[Example] FIG. 1 shows one example of the present invention. When reflowing the circuit board, the main body 2 of the semiconductor integrated circuit (EC) 2
A metal plate 63 having a high reflectance against radiant heat is placed on top of the metal plate 63. At this time, radiant heat 7 radiated from above the circuit board 1
1 hits the metal plate 63, and most of the energy is reflected on the surface of the metal plate 63 and does not reach the main body 21 of the IC2. At this time, the temperature of the main body 21 of the IC 2 shows a temperature curve 82 indicated by a dotted line in FIG. The maximum temperature TLOW of this temperature curve 82 is lower than the maximum temperature TAS at which the quality of the IC 2 can be maintained. Also, at this time, the lead wires 3 of the IC 2, the cream solder 4 printed below them, and the pattern 5 wired on the circuit board are not covered by the metal plate 63, so the radiant heat 7 is directly exposed to them. , the cream solder 4 reaches the maximum reflow temperature TMAX, the cream solder 4 melts as intended for reflow, and the lead wire 3 and the pattern 5 can be reliably connected without variation.
第２図は、本発明の他の実施例である。本実施例は、前
記実施例に対して、さらに断熱材を追加し、輻射熱に対
する遮蔽効果を得たものである。FIG. 2 shows another embodiment of the invention. In this embodiment, a heat insulating material is further added to the above embodiment to obtain a shielding effect against radiant heat.
第２図に於て、６４２はＩＣ２の本体２１の上に置いた
断熱材である。６４１は、断熱材６４２の上に重ねた、
輻射熱に対する反射率の高い金属板である。第２図に於
て回路基板１の上方から輻射される輻射熱７１は金属板
６４１にあたり、そのエネルギーの大部分は金属板６４
１の表面で反射され、金属板６４１の下に位置する断熱
材６４２まで達しない。さらに、断熱材６４１まで達し
た一部のエネルギーは、前記断熱材６４１により遮蔽さ
れ、ＩＣ２の本体２１まで達し得ない。従って、ＩＣ２
の本体２１の温度は、第５図の点線で表わされた温度カ
ーブ８２よりもさらに低い温度でカーブを描く為、ＩＣ
２の本体２１の最高温度もＴＬＯＷ以下に抑えられ、Ｉ
Ｃ２の品質を保つことが出来る。In FIG. 2, 642 is a heat insulating material placed on the main body 21 of the IC2. 641 is stacked on the insulation material 642,
It is a metal plate with high reflectivity against radiant heat. In FIG. 2, the radiant heat 71 radiated from above the circuit board 1 hits the metal plate 641, and most of the energy is absorbed by the metal plate 641.
1 and does not reach the heat insulating material 642 located below the metal plate 641. Further, a part of the energy that reaches the heat insulating material 641 is blocked by the heat insulating material 641 and cannot reach the main body 21 of the IC2. Therefore, IC2
Since the temperature of the main body 21 of the IC draws a curve at a lower temperature than the temperature curve 82 shown by the dotted line in FIG.
The maximum temperature of the main body 21 of 2 is also suppressed to below TLOW, and the I
The quality of C2 can be maintained.
第３図は、本発明の他の実施例である。ＩＣ２の本体２
１は断熱材６５で覆われている。この為回路基板１の上
方から輻射される輻射熱７１のエネルギーの大部分と、
横方向からの輻射熱７３のエネルギーの大部分は、断熱
材６５に遮られてエＣ２の本体２１まで達することが出
来ない。従って、工Ｃ２の本体２１の温度は、第５図の
点線で表わされた温度カーブ８２を描く為、ＩＣ２の本
体２１の最高温度もＴＬＯＷに抑えられ、工Ｃ２の品質
を保つことが出来る。FIG. 3 is another embodiment of the invention. IC2 main body 2
1 is covered with a heat insulating material 65. For this reason, most of the energy of the radiant heat 71 radiated from above the circuit board 1,
Most of the energy of the radiant heat 73 from the lateral direction is blocked by the heat insulating material 65 and cannot reach the main body 21 of the E C2. Therefore, the temperature of the main body 21 of the IC2 draws the temperature curve 82 shown by the dotted line in FIG. .
［発明の効果１
以上述べたように、本発明によれば、従来技術では、Ｉ
Ｃの耐熱温度ＴＡＳがリフローの最高温度ＴＭＡＸを超
えてしまって、リフローができなかったＩＣも、簡単に
リフローが出来るようになる。従って、従来はりフロー
出来ないＩＣは、リフローの後工程において、作業員が
手作業でＩＣを回路基板に半田付けしていたが、本発明
のりフロ一方法を使うことにより、従来技術ではりフロ
ー出来なかったＩＣがリフロー出来るようになるため、
リフローの後工程において、作業員が手作業でＩＣを回
路基板に半田付けする必要がなくなる。その結果、コス
トが安く、速く、しかも、ばらつきなくリフロー半田付
けすることが出来るようになる為、その効果は絶大なも
のである。[Effect of the invention 1 As described above, according to the present invention, in the prior art, I
Even ICs that cannot be reflowed because the heat-resistant temperature TAS of C exceeds the maximum reflow temperature TMAX can now be easily reflowed. Therefore, in the past, ICs that could not be soldered to a circuit board were manually soldered to a circuit board by a worker in the post-reflow process, but by using the soldering method of the present invention, it is possible to solder ICs that cannot be soldered using conventional technology. Since ICs that could not be reflowed can now be reflowed,
In the post-reflow process, there is no need for workers to manually solder the IC to the circuit board. As a result, it becomes possible to perform reflow soldering at low cost, quickly, and without variation, which is extremely effective.
第１図は、本発明の一実施例を示す概念図。第２図は、
本発明の他の実施例を示す概念図。 第３図は、本発
明のもう１つ他の実施例を示す概念図。
第４図は、従来技術を示す概念図。
第５図は、回路基板をリフローした時の、温度カーブを
描いた図。
１ ・・・・・・ 回路基板
２ ・・・・・・ ＩＣ
２１ ・・・・・・ ＩＣ２の本体
３ ・・・・・・ ＩＣ２のリード線
４ ・・・・・・ クリーム半田
５ ・・・・・・ 回路基板上の配線パターン６３ ・
・・・・・ 金属板
６４１ ・・・・・・ 金属板
６４２ ・・・・・・ 断熱材
６５ ・・・・・・ 断熱材
７１ ・・・・・・ 輻射熱
第２図
７ ２
８ ２
輻射熱
従来技術の温度カーブ
本発明の温度カーブ
以 上FIG. 1 is a conceptual diagram showing one embodiment of the present invention. Figure 2 shows
FIG. 4 is a conceptual diagram showing another embodiment of the present invention. FIG. 3 is a conceptual diagram showing another embodiment of the present invention. FIG. 4 is a conceptual diagram showing the prior art. Figure 5 is a diagram depicting the temperature curve when the circuit board is reflowed. 1... Circuit board 2... IC 21... IC2 main body 3... IC2 lead wire 4... Cream solder 5... ... Wiring pattern 63 on the circuit board
..... Metal plate 641 ..... Metal plate 642 ..... Insulating material 65 ..... Insulating material 71 ..... Radiant heat Fig. 2 7 2 8 2 Radiant heat Temperature curve of the prior art Temperature curve of the present invention
Claims (1)
に取り付ける回路基板において、前記リフロー熱から前
記半導体集積回路を保護するための輻射熱の遮蔽物体を
用いて製造されることを特徴とする電子回路基板構造。An electronic circuit board structure in which a semiconductor integrated circuit is attached to a board by a reflow soldering process, characterized in that it is manufactured using a radiant heat shielding object for protecting the semiconductor integrated circuit from the reflow heat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24116689A JPH03104186A (en) | 1989-09-18 | 1989-09-18 | Electronic circuit board structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24116689A JPH03104186A (en) | 1989-09-18 | 1989-09-18 | Electronic circuit board structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03104186A true JPH03104186A (en) | 1991-05-01 |
Family
ID=17070236
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24116689A Pending JPH03104186A (en) | 1989-09-18 | 1989-09-18 | Electronic circuit board structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03104186A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0569928U (en) * | 1992-02-24 | 1993-09-21 | 東光株式会社 | Imposition type transformer |
| JP2009117576A (en) * | 2007-11-06 | 2009-05-28 | Rohm Co Ltd | Organic light-emitting device and its manufacturing method |
-
1989
- 1989-09-18 JP JP24116689A patent/JPH03104186A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0569928U (en) * | 1992-02-24 | 1993-09-21 | 東光株式会社 | Imposition type transformer |
| JP2009117576A (en) * | 2007-11-06 | 2009-05-28 | Rohm Co Ltd | Organic light-emitting device and its manufacturing method |
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