JPH0298245A - Route identification system - Google Patents

Route identification system

Info

Publication number
JPH0298245A
JPH0298245A JP63251337A JP25133788A JPH0298245A JP H0298245 A JPH0298245 A JP H0298245A JP 63251337 A JP63251337 A JP 63251337A JP 25133788 A JP25133788 A JP 25133788A JP H0298245 A JPH0298245 A JP H0298245A
Authority
JP
Japan
Prior art keywords
bit
route
error correction
data signal
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63251337A
Other languages
Japanese (ja)
Other versions
JPH0761059B2 (en
Inventor
Naoto Kubo
直人 久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63251337A priority Critical patent/JPH0761059B2/en
Publication of JPH0298245A publication Critical patent/JPH0298245A/en
Publication of JPH0761059B2 publication Critical patent/JPH0761059B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To improve line transmission efficiency by providing a coder applying error correction coding to a data signal to be transmitted and a specific bit inverter inverting the bit of a predetermined position of the error correction code word to a sender side and differentiating the bit location to be inverted for word synchronization at every route. CONSTITUTION:A forward error correction(FEC) coder 1 applies error correction coding to a data signal to be transmitted into a block code and a specific bit inverter 2 inverts the bit of a specific position of each code word inputted from the FEC coder 4 and outputs the result to a modulator 3. The specific location of bit inversion is set different from each route corresponding to the route identification code representing each route in the digital radio communication system. The modulator 3 sends a modulation signal modulated by an inputted data signal to a radio circuit. Thus, the route identification is attained without sending a special bit such as a route identification code and the transmission efficiency of the line is improved.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はルート識別方式に関し、特にディジタル無線通
信システムにおけるルート識別方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a route identification method, and more particularly to a route identification method in a digital wireless communication system.

〔従来の技術〕[Conventional technology]

無線通信システムでは、フェージングにより受信電界が
低下し、併設ルート、分岐ルート等他ルートからの干渉
信号を正規のルートの受信信号と誤って受信してしまう
可能性がある。ディジタル無線通信システムでは、通常
、無線区間の監視制御用の副データ信号を主データ信号
に多重化して伝送しているので、副データ信号中にルー
ト識別コードを含ませ、回線の受端でこのルート識別コ
ードを検出することにより受信したデータ信号が正規の
ルートで伝送されたデータ信号であることを確認するル
ート識別方式が用いられてきた。
In a wireless communication system, the received electric field decreases due to fading, and there is a possibility that interference signals from other routes, such as an attached route or a branch route, may be mistakenly received as a received signal from a regular route. In digital wireless communication systems, sub data signals for monitoring and controlling the radio section are usually multiplexed with the main data signal and transmitted. Therefore, a route identification code is included in the sub data signal, and this code is transmitted at the receiving end of the line. A route identification method has been used in which a route identification code is detected to confirm that a received data signal is a data signal transmitted through a regular route.

ところで、伝送すべきデータ信号を誤り訂正符号化して
送出し受信側で誤り訂正復号するフォロワードeエラー
−)レクション(forward errorcorr
ection : FE C)が行われており、誤り訂
正符号にブロック符号を用いる場合、各符号語中の特定
位置のビットを反転して送出し、反転したビットの位置
に基づいて受信側でワード同期するワード同期方式が知
られている。このワード同期方式は、各符号語中の特定
位置のビットが反転して送出されている前提のもとで誤
り訂正復号が行われ、ワード同期が外れていれば(伝送
符号誤りを筆硯すれば)各符号語ごとに必ずビット誤り
が発生するので、誤同期防止性能が高い。
By the way, there is a forward error correction method in which a data signal to be transmitted is error-corrected encoded, sent, and then error-corrected and decoded on the receiving side.
When a block code is used as an error correction code, the bit at a specific position in each code word is inverted and sent, and word synchronization is performed on the receiving side based on the position of the inverted bit. A word synchronization method is known. In this word synchronization method, error correction decoding is performed on the premise that bits at specific positions in each code word are inverted and transmitted. ) Since a bit error always occurs in each code word, the performance of preventing false synchronization is high.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のルート識別方式は、主データ信号にルー
ト識別コードを多重化して伝送する必要があるので、回
線の伝送効率が低下する欠点がある。
The conventional route identification method described above has the disadvantage that the transmission efficiency of the line decreases because it is necessary to multiplex the route identification code with the main data signal and transmit it.

本発明の目的は、上述したワード同期方式をとるFFC
を行うディジタル無線通信システムにおいてルート識別
コードのような特別なビットを伝送することなしにルー
ト識別ができるルート識別方式を提供することにある。
An object of the present invention is to provide an FFC that uses the above-mentioned word synchronization method.
An object of the present invention is to provide a route identification method that can identify a route without transmitting special bits such as a route identification code in a digital wireless communication system.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のルート識別方式は、伝送すべきデータ信号を誤
り訂正符号化する符号器及びこの符号器から入力した誤
り訂正符号語のあらかじめ定めた位置のビットを反転す
る特定ビット反転器を送信側に備え、反転した前記ビッ
トの前記あらかじめ定めた位置に基づきワード同期して
誤り訂正復号する復号手段を受信側に備えたディジタル
無線通信システムにおいて、前記あらかじめ定めた位置
をそれぞれのルートで異らせることによりルート識別を
行うように構成される。
The route identification method of the present invention includes an encoder that encodes a data signal to be transmitted into an error correction code, and a specific bit inverter that inverts bits at a predetermined position of an error correction code word input from the encoder on the transmitting side. In a digital wireless communication system, the receiving side is equipped with decoding means for error correction decoding in word synchronization based on the predetermined position of the inverted bit, in which the predetermined position is different for each route. is configured to perform route identification.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

第1図に示す実施例は、FEC符号器l、特定ビット反
転器2及び変調器3を送信側に備え、復調器42割算回
路5.ビットパターン修正回路6、同期検出回路7.F
EC復号器8及び排他的論理和回路9を受信側に備えて
構成されている。
The embodiment shown in FIG. 1 includes an FEC encoder 1, a specific bit inverter 2, and a modulator 3 on the transmitting side, a demodulator 42, a divider circuit 5. Bit pattern correction circuit 6, synchronization detection circuit 7. F
It is configured to include an EC decoder 8 and an exclusive OR circuit 9 on the receiving side.

FEC符号器1は伝送すべきデータ信号をブロック符号
に誤り訂正符号化する。特定ビット反転器2は、FEC
符号器4から入力した各符号語の特定の位置のビットを
反転して変調器3へ出力する。ビットを反転する特定の
位置は、ディジタル無線通信システムにおけるそれぞれ
のルートを示すルート識別コードに対応して、ルートご
とに異らせて設定される。変調器3は入力したデータ信
号で変調した変調信号を無線回路(図示せず)へ送出す
る。
The FEC encoder 1 encodes a data signal to be transmitted into a block code using error correction coding. The specific bit inverter 2 is FEC
Bits at specific positions of each code word input from the encoder 4 are inverted and output to the modulator 3. The specific position at which the bits are inverted is set differently for each route, corresponding to the route identification code indicating each route in the digital wireless communication system. The modulator 3 modulates the input data signal and sends the modulated signal to a wireless circuit (not shown).

復調器4は無線回線で伝送されてきた変調信号を復調し
てデータ信号を出力する。このデータ信号は、伝送符号
誤りを無視すれば、変調器3に入力したデータ信号と同
じデータ信号である0割算回路5は、復調器4から入力
したデータ信号を同期検出回路7から指定されたタイミ
ングで符号語の長さにブロック化し、各ブロックを生成
多項式で割算して余りを出力する。ブロック化のタイミ
ングが正しくワード同期していて各ブロックが符号語に
一致し、しかも、特定ビット反転器2による特定ビット
の反転もなければ、割算回路5の出力はシンドロームで
あり、伝送符号誤りがないとき“0”になる。しかし、
特定ビット反転器2による特定ビットの反転のため、ワ
ード同期が正しくとれていて伝送符号誤りがないとき、
割算回路5の出力は“0”にならない。
The demodulator 4 demodulates the modulated signal transmitted via the wireless line and outputs a data signal. This data signal is the same data signal as the data signal input to the modulator 3, if transmission code errors are ignored. It divides each block by the generator polynomial and outputs the remainder. If the timing of blocking is correctly word-synchronized and each block matches the code word, and there is no inversion of specific bits by the specific bit inverter 2, the output of the division circuit 5 is a syndrome, and a transmission code error is detected. When there is no one, it becomes “0”. but,
Because the specific bit is inverted by the specific bit inverter 2, when the word synchronization is correct and there is no transmission code error,
The output of the division circuit 5 does not become "0".

ビットパターン修正回路6は、特定ビット反転器2での
特定ビットの反転によってシンドロームが受ける変化を
元に戻すように割算回路5の出力したビットパターンを
修正して出力する。この修正のための論理操作はビット
パターン修正回路6に入力するルート識別コード、いい
かえれば、特定ビット反転器2においてビットを反転す
る特定の位置によって一義的に定まる。割算回路5のワ
ード同期が正しければ、ビットパターン修正回路6の出
力はシンドロームである。
The bit pattern correction circuit 6 corrects and outputs the bit pattern output from the division circuit 5 so as to restore the change that the syndrome undergoes due to the inversion of a specific bit by the specific bit inverter 2. The logical operation for this modification is uniquely determined by the route identification code input to the bit pattern modification circuit 6, or in other words, the specific position in the specific bit inverter 2 at which the bit is to be inverted. If the word synchronization of the divider circuit 5 is correct, the output of the bit pattern correction circuit 6 is a syndrome.

同期検出回路7は、ビットパターン修正回路6からの“
0”以外の発生確率があるしきい値以上のときワード同
期が正しくないとして割算回路5のブロック化のタイミ
ングを修正し、ワード同期がとれたと判断すると、ビッ
トパターン修正回路6からの入力をシンドロームとして
FEC復号器8へ出力し、又、符号語中の反転されてい
るビツトに対応する復号されたビットのタイムスロット
でのみ“1”となりその他のビットに対応する復号され
たビットのタイムスロットでは“0″となる信号を排他
的論理和回路9へ出力する。
The synchronization detection circuit 7 receives “
When the probability of occurrence of a value other than 0'' is greater than a certain threshold, it is determined that word synchronization is incorrect and the blocking timing of the divider circuit 5 is corrected. When it is determined that word synchronization is achieved, the input from the bit pattern correction circuit 6 is corrected. It is output as a syndrome to the FEC decoder 8, and becomes "1" only in the time slot of the decoded bit corresponding to the inverted bit in the code word, and becomes "1" only in the time slot of the decoded bit corresponding to the other bits. Then, a signal of "0" is output to the exclusive OR circuit 9.

FEC復号器8は、同期検出回路7から入力したシンド
ロームを用いて復調器4からのデータ信号を復号するこ
とにより伝送符号誤りを訂正する。
The FEC decoder 8 corrects transmission code errors by decoding the data signal from the demodulator 4 using the syndrome input from the synchronization detection circuit 7.

FEC復号器8が出力したデータ信号中の反転されてい
るビットのタイムスロットでは排他的論理和回路9の一
方の入力が“1”になっているので、反転されているビ
ットは排他的論理和回路9で再び反転され、排他的論理
和回路9が出力するデータ信号は、伝送符号誤りが訂正
された特定ビットの反転が元に戻された、伝送されたデ
ータ信号となっている。
In the time slot of the inverted bit in the data signal output by the FEC decoder 8, one input of the exclusive OR circuit 9 is "1", so the inverted bit is exclusive ORed. The data signal which is inverted again by the circuit 9 and outputted by the exclusive OR circuit 9 is a transmitted data signal in which the inversion of the specific bit in which the transmission code error has been corrected has been undone.

復調器4が他ルートからのデータ信号を誤って出力した
場合、このデータ信号はビットパターン修正回路6に入
力するルート識別コードに対応する特定ビットの反転が
送信側でなされていないので、ビットパターン修正回路
6の出力が正しいシンドロームになることはなく、従っ
て、ワード同期がとれたと同期検出回路7が判断するこ
とがないので、他ルートからのデータ信号を正規のルー
トで伝送されたデータ信号であると誤認することはない
If the demodulator 4 erroneously outputs a data signal from another route, the bit pattern of this data signal will change because the specific bits corresponding to the route identification code input to the bit pattern correction circuit 6 have not been inverted on the transmitting side. The output of the correction circuit 6 will never be the correct syndrome, and therefore the synchronization detection circuit 7 will never judge that word synchronization has been achieved, so the data signal from another route cannot be replaced with the data signal transmitted through the regular route. There is no mistaking that there is.

データ信号がN1列並列に伝送され、1符号語中各列の
最大N、ビットを反転するものとし、ワード同期のため
1符号語中最小1ビットは反転N  ・h するものとすれば2  −1通りのルート識別が可能で
ある。
Assume that data signals are transmitted in N1 columns in parallel, and a maximum of N bits in each column in one code word are inverted, and a minimum of 1 bit in one code word is inverted N h for word synchronization, then 2 - One route identification is possible.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ワード同期のために反転
するビットの位置をルートごとに異らせることにより、
ルート識別コードのような特別なビットを伝送すること
なくルート識別ができ、回線の伝送効率を向上できる効
果がある。
As explained above, the present invention differs for each route by changing the position of the bit to be inverted for word synchronization.
Route identification can be performed without transmitting special bits such as a route identification code, which has the effect of improving line transmission efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図である。 1・・・・・・FEC符号器、2・・・・・・特定ビッ
ト反転器、3・・・・・・変調器、4・・・・・・復調
器、5・・・・・・割算回路、6・・・・・・ビットパ
ターン修正回路、7・・・・・・同期検出回路、8・・
・・・・FEC復号器、9・・・・・・排他的論理和回
路。 代理人 弁理士  内 原   晋
FIG. 1 is a block diagram showing one embodiment of the present invention. 1... FEC encoder, 2... Specific bit inverter, 3... Modulator, 4... Demodulator, 5... Division circuit, 6...Bit pattern correction circuit, 7...Synchronization detection circuit, 8...
...FEC decoder, 9...Exclusive OR circuit. Agent Patent Attorney Susumu Uchihara

Claims (1)

【特許請求の範囲】[Claims]  伝送すべきデータ信号を誤り訂正符号化する符号器及
びこの符号器から入力した誤り訂正符号語のあらかじめ
定めた位置のビットを反転する特定ビット反転器を送信
側に備え、反転した前記ビットの前記あらかじめ定めた
位置に基づきワード同期して誤り訂正復号する復号手段
を受信側に備えたディジタル通信システムにおいて、前
記あらかじめ定めた位置をそれぞれのルートで異らせる
ことによりルート識別を行うことを特徴とするルート識
別方式。
The transmission side is equipped with an encoder that encodes the data signal to be transmitted with error correction coding, and a specific bit inverter that inverts the bits at predetermined positions of the error correction code word inputted from the encoder. A digital communication system in which a receiving side is equipped with decoding means for performing error correction decoding in word synchronization based on a predetermined position, characterized in that route identification is performed by making the predetermined position different for each route. route identification method.
JP63251337A 1988-10-04 1988-10-04 Route identification method Expired - Lifetime JPH0761059B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63251337A JPH0761059B2 (en) 1988-10-04 1988-10-04 Route identification method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63251337A JPH0761059B2 (en) 1988-10-04 1988-10-04 Route identification method

Publications (2)

Publication Number Publication Date
JPH0298245A true JPH0298245A (en) 1990-04-10
JPH0761059B2 JPH0761059B2 (en) 1995-06-28

Family

ID=17221325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63251337A Expired - Lifetime JPH0761059B2 (en) 1988-10-04 1988-10-04 Route identification method

Country Status (1)

Country Link
JP (1) JPH0761059B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05122109A (en) * 1991-10-29 1993-05-18 Nec Corp Route discriminating system
JPH08195736A (en) * 1995-01-13 1996-07-30 Nec Corp Communication system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287345A (en) * 1985-06-13 1986-12-17 Fujitsu Ltd Different route signal stop system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61287345A (en) * 1985-06-13 1986-12-17 Fujitsu Ltd Different route signal stop system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05122109A (en) * 1991-10-29 1993-05-18 Nec Corp Route discriminating system
JPH08195736A (en) * 1995-01-13 1996-07-30 Nec Corp Communication system

Also Published As

Publication number Publication date
JPH0761059B2 (en) 1995-06-28

Similar Documents

Publication Publication Date Title
US4271520A (en) Synchronizing technique for an error correcting digital transmission system
CA2229453C (en) Data transmitting method, data transmitting system transmitter, and receiver
US4701923A (en) Adaptively coded data communication system with half duplex and/or full duplex function
RU2144736C1 (en) Method and device for information exchange
US4821270A (en) Method for decoding data transmitted along a data channel and an apparatus for executing the method
US5497382A (en) Extended error correction of a transmitted data message
EP0777354B1 (en) Digital transmission apparatus using differential coding and forward error correction
US5949822A (en) Encoding/decoding scheme for communication of low latency data for the subcarrier traffic information channel
JPH0298245A (en) Route identification system
JPH0666777B2 (en) Method and device for synchronizing digital information signal
US5815099A (en) Method and apparatus for differentially decoding signals
EP0292966B1 (en) Digital communication apparatus
EP0604567B1 (en) Method for coding and decoding a digital message
JPS62190932A (en) Interleaving system
JP2600581B2 (en) Code synchronization circuit
JPH08204768A (en) Digital signal transmitter and receiver
JPH05130081A (en) Communication system and error correction system in communication system
JP2652398B2 (en) Data transmission method
JP2591330B2 (en) Error correction method
JPH09130368A (en) Data communication equipment
JPS61270935A (en) Wireless transmission system
JPH024036A (en) Optical beam communication system
JPH10262034A (en) Coding and decoding device
JPS5977737A (en) Error correcting system
JP2676860B2 (en) Signal transmission method

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080628

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090628

Year of fee payment: 14

EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090628

Year of fee payment: 14