JP2676860B2 - Signal transmission method - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a signal transmission system, and more particularly to a signal transmission system in a digital communication system that performs error correction using a block code.

[Conventional technology]

In digital communication systems, especially digital wireless communication systems, block codes are often used to correct transmission errors.

FIG. 2 is a block diagram of an example of such a digital communication system.

The data signal to be transmitted is divided into blocks at the terminal station 11, redundant bits are added to the blocked information bits to form a code word, which is then sent to the transmission line. Intermediate relay station 12-15
Then, if there is an error in the received word that has been transmitted, the error is corrected, and the correct code word is retransmitted. The terminal station 16 corrects any error in the received word, removes redundant bits, and obtains a data signal.

If the block code used is, for example, a code capable of correcting up to a double error, the single error and the double error in the received word are corrected and a correct code word is obtained. When three or more errors occur, the error is corrected when the syndrome matches the single error or double error syndrome, but the result of the error correction is correct (although the error is included). It becomes a code word. If the syndrome does not match any of the single error and double error syndromes, error correction cannot be performed. At this time, the conventional signal transmission method has been designed to directly output a received word that is not a correct code word.

[Problems to be solved by the invention]

By the way, the occurrence of an uncorrectable error in a certain relay section is particularly useful information for the failure determination in that relay section. However, in the above-mentioned conventional signal transmission method, since the received word that cannot be error-corrected is transmitted as it is,
For example, if the line quality is deteriorated in the relay section between the relay stations 12 and 13 and an error that cannot be corrected is generated in the received word of the relay station 13, the intermediate relay station 13 and each of its subordinate stations receive the received word. Since it is determined that an error-uncorrectable error is included, the information of the detection station of the received word that cannot be error-corrected cannot be used for determining in which relay section the failure has occurred.

An object of the present invention is to provide a signal transmission system that enables detection information of a received word whose error cannot be corrected to be used for transmission line monitoring by sending a correct code word even for a received word whose error cannot be corrected. To do.

[Means for solving the problem]

A signal transmission system of the present invention, a division circuit for obtaining a syndrome from a block-coded and transmitted received word, and a narrative correction pulse generation means for generating an error correction pulse based on the syndrome input from the division circuit, An error bit correction circuit for error correcting the received word based on the error correction pulse input from the error correction pulse generation means, and a detection circuit for detecting whether or not the error correction pulse is generated by the error correction pulse generation means, A switch that allows the syndrome input from the division circuit to pass when the detection result of the detection circuit is not generated and prevents the syndrome when the detection result is generated, and a pass output of the switch to be the error bit. And an adder circuit for adding to the redundant bits of the output of the correction circuit.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

 FIG. 1 is a block diagram showing one embodiment of the present invention.

The embodiment shown in FIG. 1 includes a division circuit 1, a ROM 2 and a pulse generator 3 which are error correction pulse generation means, an error bit correction circuit 4, a detection circuit 5, a switch 6, and an addition circuit 7. It is configured with.

A is a received word which is a code word that is encoded into a block code capable of correcting single error and double error. A polynomial in which each bit of the received word A is each coefficient (hereinafter referred to as a received word polynomial) is represented as A (x), and a generator polynomial is represented as G (x).

The division circuit 1 generates a received word polynomial A (x) and a generator polynomial G
By performing a calculation to obtain a remainder polynomial R (x) by division by (x), for example, a 16-bit syndrome R (which is a coefficient bit pattern of the remainder polynomial R (x)) is obtained from the received word A. This calculation is expressed as follows.

A (x) = Q (x) .G (x) + R (x) (1) If the received word A has no error and is a correct code word, the syndrome R is all “0”. If the received word A is not a correct code word, the syndrome R will not be all "0".

When the syndrome R is a syndrome corresponding to either a single error or a double error capable of error correction, the ROM 2 calls the address of the syndrome R to
Output bit error location data. If the syndrome R does not match the error correctable syndrome (including the case where the syndrome R is all "0"), RO
M2 does not output error location data. The pulse generator 3 is
The error correction pulse P is generated at the timing of the bit to be corrected of the received word A based on the error location data input from the ROM2. The error bit correction circuit 4 corrects an error by correcting the bit of the received word A at the timing when the error correction pulse 2P is input from the pulse generator 3. As a result, when the syndrome R matches the error correctable error syndrome, and when the syndrome R is all “0”, the output of the error bit correction circuit 4 is a correct code word, and other In the case of, the code word is not correct.

The detection circuit 5 detects whether or not the error correction pulse P is generated by detecting whether or not the error location data is output by the ROM 2. When this detection result is not generated, the switch 6 is closed and the syndrome R output from the division circuit 1 is supplied to the addition circuit 7. Further, when the detection result is generated, the switch 6 is opened to prevent the syndrome R from being supplied to the adder circuit 7.

The adder circuit 7 adds the syndrome R supplied from the switch 6 to the redundant bit portion of the input from the error bit correction circuit 4 and sends it. When the syndrome R is not supplied from the switch 6, the adder circuit 7 outputs the input from the error bit correction circuit 4 as it is.

When the error correction pulse 2P is generated, the output of the error bit correction circuit 4 is a correct code word. At this time, the adder circuit 7 sends the output of the error bit correction circuit 4 as it is, and thus the output signal is sent. Is the correct codeword.

When the syndrome R does not match the error correctable error syndrome, the error correction pulse P is not generated, and as a result, the switch 6 is closed and the received word A output from the error bit correction circuit 4 is not corrected. Syndrome R is added. If the polynomial of the addition result is expressed as B (x), from the equation (1), B (x) = A (x) + R (x) = Q (x) · G (x)
(2), and the signal sent from the adder circuit 7 is also a code word at this time.

Even when the received word A has no error and is a correct code word, the error correction pulse P is not generated, the received word A passes through the error correction circuit 4 as it is, and the syndrome R is added by the adder circuit 7. Since the syndrome R is all "0" at this time, the addition result is the received word A itself, and the signal transmitted at this time is also a correct code word.

As described above, the signal sent from the adder circuit 7 in the embodiment shown in FIG. 1 is a correct code word in any case.

Note that in the present invention, when an error cannot be corrected, the received word is operated only on the redundant bit portion, and at this time, no operation is added to the information bit portion. No error will occur.

〔The invention's effect〕

As described above, according to the present invention, when a received word cannot be error-corrected, the syndrome is added to the redundant bits of the received word and the result is output, so that a correct code word can be transmitted even to the error-uncorrectable received word. There is an effect that the information of the detection station of the received word whose error cannot be corrected can be used for the determination of the faulty relay section in the transmission path monitoring.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram of an example of a digital communication system. 1 ... Division circuit, 2 ... ROM, 3 ... Pulse generator, 4
... error bit correction circuit, 5 ... detection circuit, 6 ... switch, 7 ... addition circuit.

Claims (1)

(57) [Claims] 1. A division circuit for obtaining a syndrome from a block-coded and transmitted received word, an error correction pulse generation means for generating an error correction pulse based on the syndrome input from the division circuit, and this error correction. An error bit correction circuit for error correcting the received word based on the error correction pulse input from the pulse generation means, a detection circuit for detecting whether or not the error correction pulse is generated by the error correction pulse generation means, and this detection circuit When the detection result is not generated, the syndrome that is input from the division circuit is passed, and when the detection result is generated, a switch that blocks the syndrome, and the passing output of this switch is used as the output of the error bit correction circuit. A signal transmission method, comprising: an adder circuit that adds to an output redundant bit.