JPH0298201A - Microwave high output amplifier - Google Patents

Microwave high output amplifier

Info

Publication number
JPH0298201A
JPH0298201A JP25111188A JP25111188A JPH0298201A JP H0298201 A JPH0298201 A JP H0298201A JP 25111188 A JP25111188 A JP 25111188A JP 25111188 A JP25111188 A JP 25111188A JP H0298201 A JPH0298201 A JP H0298201A
Authority
JP
Japan
Prior art keywords
distribution
output
line
input
way
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP25111188A
Other languages
Japanese (ja)
Other versions
JP2726447B2 (en
Inventor
Yukio Ikeda
幸夫 池田
Sunao Takagi
直 高木
Kiyoharu Kiyono
清春 清野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63251111A priority Critical patent/JP2726447B2/en
Publication of JPH0298201A publication Critical patent/JPH0298201A/en
Application granted granted Critical
Publication of JP2726447B2 publication Critical patent/JP2726447B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Microwave Amplifiers (AREA)

Abstract

PURPOSE:To improve the input/output reflecting characteristic over a wide band by forming a four-distribution synthesis circuit with a two-stage impedance transformer using a 1/4 wavelength distribution line. CONSTITUTION:A 1st distribution constant line 14, a 2nd distribution constant line 15, a 3rd distribution constant line 17 and a 4th distribution constant line 18 have a line length of nearly 1/4 wavelength at the signal frequency. The 1st distribution line 14 and the 2nd distribution line 15 constituting the 1st and 2nd distributers 8, 9 constitute a two-stage impedance transformer. The 3rd distribution constant line 17 and the 4th distribution constant line 18 forming the 1st two-synthesizers 10 and 11 constitute similarly in the output circuit to the case with the input circuit the two-stage impedance transformer. That is, the four-distribution synthesizer is formed by connected two-stage of the two-distribution synthesis circuits in cascade and the 1st and 2nd stages of the two-distribution synthesis circuits form the two-stage impedance transformer using 1/4 wavelength distribution lines. Thus, the excellent input/output reflecting characteristic is obtained over a wide band.

Description

【発明の詳細な説明】 一ダ等に用いるマイクロ波高出力増幅器に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microwave high output amplifier used in a power generator or the like.

〔従来の技術〕[Conventional technology]

第3図は例えば[″旧gh−Power And Hi
gh−Effieieney  Ion−Implan
ted  Power  GaAs  FET5  F
or  Cand X Bands″、 IEEE M
TT−S Digest 1985. pp8B2〜3
35」、に記載された従来のマイクロ波高出力増幅器の
概略図であり、(1)は入力リード、(2)は出力リー
ド、(3)はパッケージ、(13)は金リボン、(21
)は入力誘電体基板、(22)は入力高誘電率基板、(
23)は出力誘電体基板、(24)はFETチップ、(
25)はパッケージ(3)に構成された2分配器、(2
6)は入力誘電体基板(21)上に構成された2分配冊
、(27)は出力誘電体基板(23)上に構成された2
合成器、(28)はパッケージ(3)に構成されr−2
分配器である。
Figure 3 shows, for example, [''old gh-Power And Hi
gh-Effieieney Ion-Implan
ted Power GaAs FET5F
or Cand X Bands'', IEEE M
TT-S Digest 1985. pp8B2-3
35'', in which (1) is an input lead, (2) is an output lead, (3) is a package, (13) is a gold ribbon, (21) is a schematic diagram of a conventional microwave high power amplifier described in
) is the input dielectric substrate, (22) is the input high dielectric constant substrate, (
23) is the output dielectric substrate, (24) is the FET chip, (
25) is a two-way distributor configured in package (3), (2
6) is a two-distribution book configured on the input dielectric substrate (21), and (27) is a two-distribution book configured on the output dielectric substrate (23).
The synthesizer, (28) is configured in package (3) and r-2
It is a distributor.

次に動作について説明する。入力リード(1)への入力
は、パッケージ(3)に構成された2分配器(25)及
び入力誘電体基板(21)上に構成された2つの2分配
器(2B)により4分配され、4つのFETチップ(2
4)に供給される。4つのFETチップ(24)の出力
は出力誘電体基板り23)上に構成された2つの2合成
!(27)及びパッケージ(3)に構成された2合成器
(28)により合成され、出力リード(2)に出力され
る。
Next, the operation will be explained. The input to the input lead (1) is divided into four by a two-way divider (25) configured on the package (3) and two two-way dividers (2B) configured on the input dielectric substrate (21), 4 FET chips (2
4). The outputs of the four FET chips (24) are two composites of two configured on the output dielectric substrate 23)! (27) and a two-synthesizer (28) configured in the package (3), and output to the output lead (2).

4分配・合成回路は単に入力電力を4分配あるいは4つ
のFETの出力を4合成するだけでなく入出力整合回路
を構成している。入力側のインピーダンス整合は金ワイ
ヤによるインダクタンスと高誘電率基板(22)上に金
属膜を設けることによりしかし、従来のマイクロ波高出
力増幅器では、入出力インピーダンス整合回路を一波長
分布定数線路を用いた2段インピーダンス変成晋とはし
ておらず、入出力反射特性が狭帯域となる問題があたも
ので、入出力反射特性が広帯域にわたり良好なマイクロ
波高出力増幅器を得ることを目的とする。
The 4-way distribution/synthesizing circuit not only simply divides the input power into 4 parts or combines the outputs of 4 FETs into 4 parts, but also constitutes an input/output matching circuit. Impedance matching on the input side is achieved by providing an inductance using gold wire and a metal film on a high dielectric constant substrate (22).However, in conventional microwave high power amplifiers, the input/output impedance matching circuit uses a single wavelength distributed constant line. The purpose of this invention is to obtain a microwave high-output amplifier with good input/output reflection characteristics over a wide band, since the two-stage impedance transformation is not used, and the problem of narrow band input/output reflection characteristics has been solved.

分配・合成回路を理想的な一波長分布線路を用いた2段
インピーダンス変成蕃で構成したものである。
The distribution/synthesizing circuit is constructed with a two-stage impedance transformer using an ideal single-wavelength distribution line.

分配・合成回路が理想的な一波長分布線路を用いた2段
インピーダンス変成蕃で構成されているため、入出力反
射特性が広帯域にわたり良好となる。
Since the distribution/synthesizing circuit is composed of a two-stage impedance transformer using an ideal single-wavelength distribution line, the input/output reflection characteristics are excellent over a wide band.

〔実施例〕〔Example〕

る。第1図において(1)は入力リード、(2)は出力
リード、(3)はパッケージ、(4)は第1の入力誘電
体基板、(5)は第2の入力誘電体基板、(6)は第1
の出力誘電体基板、(7)は第2の出力誘電体基板、(
8)は第1の2分配器、(9)は第2の2分配器、(1
0)は第1の2合成器、(11)は第2の2合成器、 
(12)はFET、(13)は金リボンである。
Ru. In FIG. 1, (1) is an input lead, (2) is an output lead, (3) is a package, (4) is a first input dielectric substrate, (5) is a second input dielectric substrate, and (6) is a first input dielectric substrate. ) is the first
(7) is the second output dielectric substrate, (7) is the output dielectric substrate of
8) is the first two-way divider, (9) is the second two-way divider, (1
0) is the first 2-synthesizer, (11) is the second 2-synthesizer,
(12) is an FET, and (13) is a gold ribbon.

第2図は第1図の等価回路図である。図中(14)は第
1の分布定数線路、(15)は第2の分布定数線路、(
16)はFET、(17)は第3の分布定数1s路、(
18)は第4の分布定数線路、(19)は入力端子、(
20)は出力端子である。
FIG. 2 is an equivalent circuit diagram of FIG. 1. In the figure, (14) is the first distributed constant line, (15) is the second distributed constant line, (
16) is FET, (17) is the third distributed constant 1s path, (
18) is the fourth distributed constant line, (19) is the input terminal, (
20) is an output terminal.

第1の分布定数$1111(14)は第1の2分配器(
8)を構成する線路、第2の分布定数線路(15)は第
2の2分配IJa(9)を構成する線路、第3の分布定
数線路(17)は第1の2合成器(10)を構成するS
路、第4の分布定数S路(18)は第2の2合成器(1
1)を構成する線路である。
The first distributed constant $1111 (14) is the first two-way divider (
8), the second distributed constant line (15) is the line that constitutes the second two-way distribution IJa (9), and the third distributed constant line (17) is the line that constitutes the first two-way combiner (10). S that constitutes
The fourth distributed constant S path (18) is the second two-synthesizer (1
1).

第1の分布定数線路(14)、第2の分布定数線路(I
s) 、第3の分布定数線路(17) 、第4の分布定
数線路(18)はそれぞれ信号周波数において約一波長
の線路長とする。それぞれの特性インピーダンスはフィ
ルタ理論を用いて広帯域にわた9、FET(16)を見
込むインピーダンスZinを入力端子(16)において
50Ωにインピーダンス整合するために次のように定め
る。
The first distributed constant line (14), the second distributed constant line (I
s), the third distributed constant line (17), and the fourth distributed constant line (18) each have a line length of approximately one wavelength at the signal frequency. Each characteristic impedance is determined as follows in order to impedance-match the impedance Zin looking into the FET (16) to 50Ω at the input terminal (16) over a wide band using filter theory.

第1の分布定数線路(14)の特性インピーダンス第2
の分布定数線路(15)の特性インピーダンス又、第3
の分布定数線路(17) 、第4の分布定数線路(18
)の特性インピーダンスについても、入力側と同様にF
ET(16)を見込む出力インピーダンスZ outを
出力端子(20)において50Ωに変換するために次式
のように定める。
The second characteristic impedance of the first distributed constant line (14)
The characteristic impedance of the distributed constant line (15) and the third
distributed constant line (17), fourth distributed constant line (18)
), the characteristic impedance of F
In order to convert the output impedance Z out looking into ET (16) to 50Ω at the output terminal (20), the following equation is determined.

第3の分布定数線路(17)の特性インピーダンス第4
の分布定数線路(18)の特性インピーダンス以上のよ
うに構成したマイクロ波高出力増幅器では、入力リード
(1)から入力した電波は第1の2分配器(8)及び2
つの第2の2分配置(9)により4分配され、4つのF
ETに均等に供給される。第1の2分配器(8)と第2
の2分配器(9)を構成する第1の分布定数lil!l
8(14)と第2の分布定数線m(15)は2段インピ
ーダンス変成器を構成しているので、入力反射特性は広
帯域にわたり良好である。
The fourth characteristic impedance of the third distributed constant line (17)
In a microwave high output amplifier configured in such a manner that the characteristic impedance of the distributed constant line (18) is higher than or equal to
divided into four by the second bipartite arrangement (9), resulting in four F
Evenly distributed to ET. The first two-way divider (8) and the second
The first distributed constant lil! that constitutes the two-way divider (9) of l
8(14) and the second distributed constant line m(15) constitute a two-stage impedance transformer, so the input reflection characteristics are good over a wide band.

4つの半導体素子(12)の出力は2つの第1の2合成
器(lO)及び第2の2合成!(11)により合成され
、出力リード(2)に出力される。出力回路でも入力回
路の場合と同様に第1の2合成器(10)と第2の2合
成器(11)を構成する第3の分布定数線、If (1
7) ト第4の分布定数!111Ii(1g)は2段イ
ンピーダンス変成器を構成しているので、出力反射特性
は広帯域にわたり良好となる。
The outputs of the four semiconductor elements (12) are the two first 2 combiners (lO) and the second 2 combiners! (11) and output to the output lead (2). In the output circuit, as in the case of the input circuit, the third distributed constant line, If (1
7) Fourth distribution constant! Since the 111Ii (1g) constitutes a two-stage impedance transformer, the output reflection characteristics are good over a wide band.

なお、上記実施例では第2の入力誘電体基板として2枚
の基板を用いているが、1枚の誘電体基板上に2つの2
分配器を構成する構造としてもよ成器を2分配・合成回
路を2段縦続接続することにより構成し、1段目及び2
段目の2分配合成回路で一波長分布線路を用いた2段イ
ンピーダンス変成器を構成する構造としたので広帯域に
わたり良好な入出力反射特性が得られる効果がある。
In the above embodiment, two substrates are used as the second input dielectric substrate, but two input dielectric substrates are used on one dielectric substrate.
The structure of the distributor is constructed by cascading two distribution/synthesizing circuits in two stages.
Since the second-stage two-distribution/synthesis circuit constitutes a two-stage impedance transformer using a one-wavelength distribution line, there is an effect that good input/output reflection characteristics can be obtained over a wide band.

器の一実施例を示す概略図、第2図は第1図の等価回路
図、第3図は従来のマイクロ波高出力増幅器の概略図で
ある。
2 is an equivalent circuit diagram of FIG. 1, and FIG. 3 is a schematic diagram of a conventional microwave high output amplifier.

各図中、(1)は入力リード、(2)は出力リード、(
3)はパッケージ、(4)は第1の入力誘電体基板、(
5)は第2の入力誘電体基板、(6)は第1の出力g電
体基板、(7)は第2の出力誘電体基板、(8)は第1
の2分配器、(9)は第2の2分配器、(10)は第1
の2合成器、(11)は第2の2合成器、(12)はF
ET、(13)は金リボン、(14)は第1の分布定数
線路、(15)は第2の分布定数線路、(16)はF 
E T 、  (17)は第3の分布定数線路、(18
)は第4の分布定数III。
In each figure, (1) is the input lead, (2) is the output lead, (
3) is a package, (4) is a first input dielectric substrate, (
5) is the second input dielectric substrate, (6) is the first output g-electric substrate, (7) is the second output dielectric substrate, and (8) is the first
(9) is the second two-divider, (10) is the first two-divider,
2 combiners, (11) is the second 2 combiner, (12) is F
ET, (13) is the gold ribbon, (14) is the first distributed constant line, (15) is the second distributed constant line, (16) is F
E T , (17) is the third distributed constant line, (18
) is the fourth distribution constant III.

(19)は入力端子、(20)は出力端子、(21)は
入力誘電体基板、(22)は入力高誘電率基板、(23
)は出力誘電体基板、(24)はFETチップ、(25
)はパッケージに構成された2分配器、(26)は入力
誘電体基板上に構成された2分配器、(27)は出力誘
電体基板上に構成された2合成器、(28)はパッケー
ジに構成された2合成器である。
(19) is an input terminal, (20) is an output terminal, (21) is an input dielectric substrate, (22) is an input high dielectric constant substrate, (23)
) is the output dielectric substrate, (24) is the FET chip, (25
) is a two-way divider configured on a package, (26) is a two-way divider configured on an input dielectric substrate, (27) is a two-way combiner configured on an output dielectric substrate, and (28) is a package. This is a two-synthesizer configured as follows.

なお、各図中同一符号は同−又は相当部分を示す。Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims]  4個の半導体素子及び4分配・合成回路をパッケージ
内に収納するマイクロ波高出力増幅器において、4分配
器を入力電力を第1の2分配器により2分配し、さらに
その出力を2つの第2の2分配器により2分配する構成
とし、4合成器を4つの半導体素子の出力を2つの第1
の2合成器により合成し、さらにその出力を第2の2合
成器により合成する構成とし、4分配器を構成する第1
の2分配器及び第2の2分配器はそれぞれ別個の誘電体
基板上にマイクロストリップ線路で構成し、第1及び第
2の2分配器を構成するマイクロストリップ線路の長さ
をそれぞれ信号周波数において約一波長とし、一波長分
布線路を用いた2段インピーダンス変成器を構成し、4
合成器を構成する第1の2合成器及び第2の2合成器は
それぞれ別個の誘電体基板上にマイクロストリップ線路
で構成し、第1及び第2の2合成器を構成するマイクロ
ストリップ線路の長さをそれぞれ信号周波数において約
一波長とし、一波長分布線路を用いた2段インピーダン
ス変成器を構成したことを特徴とするマイクロ波高出力
増幅器。
In a microwave high-power amplifier that houses four semiconductor elements and a four-way distribution/synthesizing circuit in a package, the input power of the four-way divider is divided into two parts by a first two-way divider, and the output is then divided into two parts by a first two-way divider. The configuration is such that a 2-divider divides the output into 2 parts, and a 4-synthesizer divides the outputs of the four semiconductor elements into two first
The first two combiners constituting the four-way divider combine the two combiners, and the output is further combined by the second two combiner.
The two-way divider and the second two-way divider are each constructed of microstrip lines on separate dielectric substrates, and the lengths of the microstrip lines constituting the first and second two-way dividers are set at the signal frequency. A two-stage impedance transformer using a one-wavelength distribution line is configured, and the four
The first 2-synthesizer and the second 2-synthesizer that make up the synthesizer are each constructed of microstrip lines on separate dielectric substrates, and the microstrip lines that make up the first and second 2-synthesizers are 1. A microwave high-output amplifier characterized in that the length is approximately one wavelength at a signal frequency, and a two-stage impedance transformer is configured using a single-wavelength distribution line.
JP63251111A 1988-10-05 1988-10-05 Microwave high power amplifier Expired - Lifetime JP2726447B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63251111A JP2726447B2 (en) 1988-10-05 1988-10-05 Microwave high power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63251111A JP2726447B2 (en) 1988-10-05 1988-10-05 Microwave high power amplifier

Publications (2)

Publication Number Publication Date
JPH0298201A true JPH0298201A (en) 1990-04-10
JP2726447B2 JP2726447B2 (en) 1998-03-11

Family

ID=17217815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63251111A Expired - Lifetime JP2726447B2 (en) 1988-10-05 1988-10-05 Microwave high power amplifier

Country Status (1)

Country Link
JP (1) JP2726447B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331297A (en) * 1991-12-26 1994-07-19 Kyocera Corporation Josephson device a.c. power supply circuit and circuit substrate for mounting same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5930327A (en) * 1982-08-13 1984-02-17 Hitachi Ltd Semiconductor integrated circuit
JPS6259490A (en) * 1985-09-09 1987-03-16 Victor Co Of Japan Ltd Carrier chrominance signal processing circuit
JPS63133701A (en) * 1986-11-25 1988-06-06 Nec Corp Microwave semiconductor device
JPS63232502A (en) * 1987-03-19 1988-09-28 Nec Corp Electric power synthesizing device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5930327A (en) * 1982-08-13 1984-02-17 Hitachi Ltd Semiconductor integrated circuit
JPS6259490A (en) * 1985-09-09 1987-03-16 Victor Co Of Japan Ltd Carrier chrominance signal processing circuit
JPS63133701A (en) * 1986-11-25 1988-06-06 Nec Corp Microwave semiconductor device
JPS63232502A (en) * 1987-03-19 1988-09-28 Nec Corp Electric power synthesizing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331297A (en) * 1991-12-26 1994-07-19 Kyocera Corporation Josephson device a.c. power supply circuit and circuit substrate for mounting same

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JP2726447B2 (en) 1998-03-11

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