JPH029509B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a focus control area setting circuit that freely selects a focus control area on an imaging screen.

As an autofocus mechanism employed in a video camera, there is a method in which a distance to a subject is measured using a separately provided optical device, and a focus lens is moved to a position corresponding to the measured distance. However, with this method, an optical device must be provided for distance measurement, which not only increases costs, but also makes it impossible to arbitrarily select a target object. Therefore, in view of the fact that the brightness signal changes significantly in the in-focus state, a method has been proposed in which focus control is performed by detecting changes in the level of the brightness signal.
Similar to the method described above, this method is not configured so that the focus control area can be selected.

Therefore, in view of the above-mentioned points, the present invention performs autofocus control using changes in the luminance signal level, and is configured so that the sampling section of the luminance signal can be freely selected. The purpose of this paper is to propose a new and effective focus control area setting circuit that enables focusing on the subject.

Hereinafter, the present invention will be explained according to an illustrative embodiment. In this embodiment, a total of nine push buttons, three in the vertical direction and three in the horizontal direction, are provided on the cabinet of the video camera, and nine sections on the monitor screen shown in FIG. 1 are selectively selected to define the focus control area. . Figure 2 shows
A block diagram of a focus area setting circuit according to the present embodiment is shown. As is clear from this figure, in this embodiment, three rows and three columns of normally open switches _S1 to _S9 are arranged corresponding to the nine push buttons described above. These switches S ₁ to _{S 9} each transmit a positive voltage of 2 when closed.
The data is input to the row storage means and the column storage means through two OR circuits. Therefore, the first, second,
The output of the third switch S ₁ , S ₂ , S ₃ is the first OR circuit
It is the set input of the first flip-flop _F1 via _O1 , and the fourth, fifth, and sixth switches _S4 , _S5 , _S6
The output of is the set input of the second flip-flop _F2 via the second OR circuit _O2 , and the outputs of the seventh, eighth, and ninth switches _S7 , _S8 , and _S9 are connected to the third OR circuit O3 _.
It is used as the set input of the third flip-flop _F3 via the input terminal. On the other hand, the first, fourth and seventh switches S ₁ ,
The outputs of S ₄ and S ₇ are connected to the fourth OR circuit O ₄ through the fourth OR circuit O 4 .
The outputs of the second, _fifth , and eighth switches S ₁ , S ₄ , and S ₇ are input to the flip-flop F ₄ through the fifth OR circuit O _{5 .}
This is the set input for the 3rd, 6th, and 9th switches.
The outputs of S ₃ , S ₆ , and S ₉ are input to the sixth flip-flop F ₆ via the sixth OR circuit O ₆ . Note that the first, second and third flip-flops F ₁ , F ₂ , F ₃
and the fourth, fifth, and sixth flip-flops F ₄ , F ₅ ,
_F6 functions as row storage means and column storage means, respectively, and the other two flip-flops are configured to be reset when each flip-flop cassette is inserted. The flip-flop output of the row storage means is input to the first ROM1, which receives the output of the first flip-flop _F1 to store a stored value of 100, receives the output of the second flip-flop _F2 to store a stored value of 400, and then receives the stored value of 400 from the third flip-flop F2. In response to the output of ₃ , the stored value 700 is inputted to the first comparator circuit 2, respectively. On the other hand, the first counter 3, which uses the horizontal synchronizing signal as a reset input and _900fH ( _fH is the horizontal synchronizing frequency) as a counting input, inputs its counting output to the first comparator circuit 2. Therefore, a coincidence output is derived from the first comparator circuit 2 at a position of 1/9, 4/9, or 7/9 of the horizontal synchronization period. This coincidence output sets the seventh flip-flop _F7 and resets the third counter 4. The third counter 4 counts the clocks of _900fH , and when it reaches 100, it issues a count-up output and resets the seventh flip-flop _F7 . Therefore, the seventh flip-flop _F7 has a period of 1/9 of the horizontal synchronization period.
It emits an output that allows only 100 clocks to pass in the range of ~2/9 or 4/9 to 5/9 or 7/9 to 8/9.

On the other hand, the fourth, fifth, and
The outputs of the sixth flip-flop F ₄ , F ₅ , F ₆ are
It is input to the second ROM5. This second ROM5 is
The stored value is received from the output of the fourth flip-flop _F4 .
60, and the stored value 140 upon receiving the output of the fifth flip-flop _F5 , and then the sixth flip-flop _F6.
The stored value 220 is inputted to the second comparator circuit 6 upon receiving the output. Further, the second counter 7 receives the vertical synchronization signal (V) as a reset input, and receives the horizontal synchronization signal (H) as a reset input.
is input to the second comparison circuit 6 as a count input. Therefore, from the second comparison circuit 6, the 40th H
Or a coincidence output is issued in synchronization with 140H or 220H. The AND of the output of the second comparator circuit 6, the output of the seventh flip-flop _F7 , and the clock derives 100 sampling clocks, once per field. This sampling clock is input to an address counter 8 and an AD conversion circuit 9. The address counter 8, which receives the vertical synchronization signal as a reset input, changes the write address of the RAM 10 by counting the sampling clock. On the other hand, the AD conversion circuit 9 which receives the luminance signal as input performs AD conversion on the luminance signal at a frequency of _900fH ,
The converted output is input to the RAM 10.

The conversion output stored in the RAM 10 is read out and processed by the microcomputer at the same time as the writing is completed. The microcomputer is
The rotation of the focus control motor that moves the focus lens is controlled based on the calculation results. In order to calculate the level change of the first 100 samples of the luminance signal, the microcomputer converts the fluctuations in the luminance signal level into absolute values and adds them, and considers this added value as the level change of the luminance signal. Second, the previous added value and the current added value are compared to determine whether the level change is increasing or decreasing. The microcomputer repeatedly executes the above-mentioned operations, and when the comparison result changes from an increasing trend to a decreasing trend, the microcomputer stops the rotation of the focus control motor and sets the focus lens to the in-focus position.

Therefore, according to the present invention, focus control can be performed by selecting an arbitrary section in the imaging screen,
The effect is great.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the division of an imaging screen and divided areas in an embodiment of the present invention, and FIG. 2 is a block diagram of a main circuit of the embodiment. Explanation of main drawing numbers, S ₁ ~ S ₉ ... switch, F ₁ ~
F ₅ ...Flip-flop, 1, 5...1st/1st
2ROM, 3, 7...1st and 2nd counter, 2,
6...First and second comparison circuits.

Claims (1)

[Claims] 1. In a focus control mechanism for a video camera that samples a video signal within a sampling range and displaces a focus lens based on a change in the sampling data, A plurality of switches and horizontal and vertical position data of each of a plurality of sampling ranges placed at different positions on the screen are stored in advance, and one of the plurality of ranges is selected by operating the switch. a sampling range specifying means for outputting position data of the selected sampling range; a vertical counter that receives a horizontal synchronization signal of the video signal as a counting input; and a horizontal counter that receives a multiplied frequency signal of the horizontal synchronization signal as a counting input. and a comparison means for comparing the position data of the sampling range designated by the sampling range designation means with the outputs of the vertical and horizontal counters and generating a sampling output, respectively.