JPH0293842U

JPH0293842U -

Info

Publication number: JPH0293842U
Application number: JP1989002982U
Authority: JP
Priority date: 1989-01-13
Filing date: 1989-01-13
Publication date: 1990-07-25

Description

[Brief explanation of drawings]

第１図は本考案の一実施例のブロツク図である
。１……音声合成終了信号出力端子、２……単位
音声指定コード入力端子、３……単位音声指定コ
ードライト・パルス入力端子、４……アナログ出
力端子、５……復号制御回路、６……復号器、７
……Ｄ−Ａ変換器、８……復号化モード設定信号
、９……複合器入力バス、１０……復号器ライト
・パルス、１１……メモリデータ出力バス、１２
……メモリ・リード・パルス、１３……メモリ、
１４……メモリ・アドレス信号、１５……アドレ
ス・レジスタ。 FIG. 1 is a block diagram of one embodiment of the present invention. 1...Speech synthesis end signal output terminal, 2...Unit voice specification code input terminal, 3...Unit voice specification code write/pulse input terminal, 4...Analog output terminal, 5...Decoding control circuit, 6... decoder, 7
...D-A converter, 8...Decoding mode setting signal, 9...Combiner input bus, 10...Decoder write pulse, 11...Memory data output bus, 12
...Memory read pulse, 13...Memory,
14...Memory address signal, 15...Address register.

Claims

[Claims for Utility Model Registration] A unit audio designation code including a coding rule code indicating a PCM or ADPCM coding rule is input together with each unit audio encoded data, the transfer of the encoded data is controlled, and the coding rule code is a decoding control circuit that detects a decoding mode from and transfers decoded data; an address register that specifies an address from the encoded data; and PCM or ADPCM encoded data stored in advance according to the address instruction of this address register. A decoder that decodes the encoded data from this memory according to the instruction of the decoding mode, and a current output type that converts the input data into a current, and the current is discharged from the device. 1. A speech synthesis LSI device, comprising: a D-A converter, which is of the type D-A converter, and converts decoded data from the decoder into an analog signal.