JPH02897A - Character display controller - Google Patents

Abstract

PURPOSE:To reduce the capacity of a character generator by storing character patterns consisting of different bytes together in the character generator. CONSTITUTION:When the code, e.g. two bytes of a character to be displayed are set in a refresh memory 11 for display, an address output circuit 13 outputs an address to the character generator 12 according to the code. Then the character generator 12 outputs character patterns of a 1st character group and a 2nd character group properly to a screen display control circuit 14, so that they are displayed together on the display. When a common pattern is stored in the character generator, the common pattern and a noncommon pattern are combined properly and characters, etc., of the 2nd character group are displayed similarly. Consequently, the capacity of the character generator 12 is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a character display control device used in an information processing device, and particularly to a character contest generator thereof.

[Prior Art] In a conventional character display control device,
When displaying a first character group expressed by a 1-byte code and a second character group expressed by a 2-byte code in a mixed manner, as in the technique disclosed in Japanese Patent Application Laid-open No. 140785/1985, This was achieved by switching between two types of character generators with different control signals.

[Problem 8 to be solved by the invention] For this reason, even if the number of types of characters used for display as shown in FIG. 20 is large enough to be stored in one character generator, the number of characters shown in FIG. In this way, a plurality of character generators 501 and 502 must be prepared, and a circuit for switching character generators must be added, making the device complicated.

This invention was made in order to solve the problems of the prior art described above, and it is possible to store a group of characters expressed by different numbers of bytes in one type of character generator and display them together on a display. The purpose is to obtain a character fist display control device.

[Means for Solving the Problems] A character display control device according to the present invention includes a first character group expressed by a first predetermined number, for example, a 1-byte code, and a second predetermined number, for example, a 2-byte code. A second character group to be expressed is determined, and a 2-byte code to which 1-byte data is added so as to be a code that does not overlap with the code of the second character group is determined as a code specifying the first character group.

As shown in FIG. 1, the character display control device according to the present invention includes a display refresh memory 11 having a storage capacity of 2 bytes per unit character display area, a first character group and a second character group. One type of character generator 12 that stores character turns of the group, and character generator 1
2, it has an address output circuit 13 which outputs an address suitable for the configuration of the character generator 12 based on the display refresh memory 11 data, and a screen display control circuit 14.

Furthermore, the character generator is provided with two areas, a left area and a right area. The left area stores the left character pattern of the second character group and the first character group, respectively, and the right area stores the second character pattern. The character pattern on the right side of the character group and the first character group are respectively stored. (See Figures 3, 5, 8, 9, and 10) Furthermore, the screen display control device includes a character clock generation circuit that generates a reference clock, and a character clock generation circuit that reduces the frequency of this reference clock by 1/1. A frequency divider circuit that divides the frequency by 2, and the output of this frequency divider circuit,
It has a left and right designation signal generation circuit which receives a mode designation signal and a detection signal of a 1-byte code, and sequentially sends left and right designation signals to the character generator to designate the left and right areas of the character generator.

(See Figure 4) Also, if the first predetermined number is 1 and the second predetermined number is 4, the character generator
Four areas are provided, and each area stores a pattern corresponding to 1/4 of the character pattern of the second character group and a pattern of the first character group. (
(See FIG. 13) In that case, the screen display control device includes a character clock generation circuit that generates a reference clock and 1.
A frequency dividing circuit that divides the frequency of this reference clock by 1/4, the output of this frequency dividing circuit, a mode designation signal, and a detection signal of a 1-byte system code are inputted, and the character generator's first area 4th and an area designation signal generation circuit that sequentially sends area designation signals to the character generator. (See FIG. 11) Furthermore, in the character display control device according to the present invention, a character generator in which a predetermined address is given in advance to a common pattern among the second character group, and a code from a refresh memory. a decoder that detects a code having a common pattern of the second character group; a common pattern address register that stores an address signal corresponding to the common pattern and accesses a character generator based on the output of the decoder; and an address output circuit that accesses the character generator according to the code of the refresh memory and becomes inactive when the common pattern address register is operated.

Furthermore, the character pattern of the first character group of the character generator is selected and read based on the access of the address output circuit, and when reading the second character group, the character pattern of the first character group of the character generator is selected and read based on the access of the common pattern address register and the address output circuit. The screen display control device reads out the common pattern and the non-common pattern based on the display and sends them to the display to display the first character group and the second character group in a mixed manner. (See FIG. 15) [Function] In this invention, the display refresh memory 11
When you set the code of the character you want to display, for example 2 bytes, the address output circuit 13
The address is outputted from the character generator 12 to the character generator 12, and the character patterns of the first character group and the second character group are outputted from the character generator 12 as appropriate to the screen display control circuit 14, and are mixedly displayed on the display. .

Further, when a common pattern is stored in the character generator, the common pattern and the non-common pattern are appropriately combined to display the characters of the second character group in the same way.

[Examples] Examples of the present invention will be described below based on the drawings. Second
The figure is a block diagram of a character display control device according to the first embodiment of the present invention, and FIG. 3 is an explanatory diagram of the character generator of FIG. 2.

The display refresh memory 21 has a unit character storage area 27 corresponding to the unit character display area of the display 26, and each unit character storage area 27
has a storage capacity of 2 bytes. The register 22 is a type of address output circuit. Character patterns of a first character group and a second character group are mixed and stored in the character generator 23 as shown in FIG. Output the character pattern to .

The second character group of the character generator 23 is
The pattern on the left side and the pattern on the right side of the character are each located in separate areas 30.3 within the character generator 23.
1, and the pattern on the side necessary for display is output in response to the left and right designation signals from the screen display control circuit 24. The first character group is divided into pattern A and pattern B, which are different characters, and pattern A is stored in the left area and pattern B is stored in the left area.

When displaying the first character group, the details will be described later, but by setting the left and right designation signals to the level of either one, the area corresponding to that signal is selected, and the different first characters stored in that area are Character pattern A or B of the character group.

The screen display control circuit 24 controls the display of a first character group, which uses one unit character display area to display one character, and the second character group, which uses two unit character display areas to display one character. This is a circuit that controls the display. The decode circuit 25 is a display refresh memory 2
This circuit determines whether the character group is the first character group or the second character group based on the character code output from 1.

In this embodiment, JIS 1st and 2nd level kanji characters are used as the second character group, and characters expressed by 1-byte codes such as alphanumeric characters are used as the first character group.

For example, the code for "A" is 3021 in hexadecimal, and the code for "Oshi" is the same <3.
It is expressed as a 2-byte code such as 221, and the lower two fingers are assigned 21 or higher in hexadecimal.

On the other hand, for the first character group, set a 2-byte code with the upper two fingers representing the 1-byte code and 00 for the lower two fingers, and the character corresponding to that code.
Store the character pattern of the first character group in the generator area. For example, the rAJ code is set to 4100 in hexadecimal, and the rBJ code is set to the same <4200.

Characters and characters you want to display using this code system
By storing the code in the display refresh memory 21, it is possible to specify a desired character pattern without duplication of codes between the first character group and the second character group.

FIG. 4 is a detailed circuit diagram of the screen display control circuit 24.

Here, the reference clock 250 output from the character clock generation circuit 240 is transmitted to the 1/2 frequency divider circuit 24.
The character clock 251 is divided by l/2 by 1.
and is input to the left and right designation signal generation circuit 243.

In addition, the mode register 242 is set to a mode of "0" or "1" by the CPU (not shown), and which of the 1-byte code systems stored in the left and right areas of the character generator 23 is set. Specifies whether to select a pattern area. Output signal (mode designation signal) 25 from this mode register 242
2 is also input to the left/right designation signal generation circuit 243.

The decoding circuit 25 determines the lower 1 byte of the code set in the register 22 (for example, the lower r00J of code 4100 of rAJ) and determines whether the code is a 1-byte type. The 1-byte code detection signal 253 is also input to the left/right designation signal generation circuit 243.

Then, the left and right designation signal generation circuit 243 generates each signal 2.
Based on signals 51, 252, and 253, a left/right designation signal 254 is output to the character generator 23. The left/right designation signal signal 254 indicates which side of one character, left or right, should be displayed when displaying a 2-byte code pattern.Based on this signal, the character generator 23 selects the left area or the right area. is accessed.

FIG. 5 is an explanatory diagram showing the structure of the character generator 23 in further detail. Here, the character generator 23 is first divided into an area 51 with a smaller address (left area) and an area 52 with a larger address (right area). The areas 51 and 52 are divided by 0.1 of the most significant bit of the address data.

The area 51 further includes an area 510 for storing the left half of the 2-byte code pattern, and an area 511 for storing the 1-byte code pattern. Similarly, the area 52 includes an area 520 that stores the right half of a 2-byte code pattern, and an area 521 that stores a 1-byte code pattern. The 1-byte code patterns stored in areas 511 and 521 are different from each other, such as A, B, C, . . . and α, β, γ, . . . .

FIGS. 6(a) and 6(b) are time charts showing the display operation of the first embodiment. Here, FIG. 4A shows a case where "1" is set in the mode register 242. Based on this setting value, area 511 is selected for a 1-byte code pattern. Also, the same figure (b
) is the case when "0" is set in the mode register 242, and contrary to the above case, the area 521 is selected for a 1-byte code pattern. Below, the 6th
The display operation will be explained based on the figure. In the figure, reference numeral 600 indicates a 1-unit character display area.

Regarding FIG. 6(a) (mode designation signal "1"), in the case of a 2-byte code pattern, the area of the character generator 23 is selected by the signal 254, and the character pattern is displayed based on the timing of the character clock 251. are doing. For example, when displaying the kanji ``月'', the left half character of ``月'' is read out from the area 510 in synchronization with the left, right, etc. signals of the left/right designation signal 254, and then from the area 520, The characters on the left half of the word ``月'' are read out and sequentially sent to the display 26 to display the kanji character ``月''.

The same process is applied to the 2-byte code patterns fire and water.

Here, when the code signal corresponding to rAJ is read from the refresh memory 21 and the decoder 25 detects a 1-byte code and outputs the signal 253, the mode designation signal "1" value from the mode register 242 is output. Accordingly, pattern A in area 511 is read out and displayed on display 26.

Regarding FIG. 6(b) (mode designation signal rOJ); The 2-byte code pattern is the same as FIG. 6(a), but when a 1-byte code is detected and signal 253 is output, this In this case, the value of the mode register 242 is different from the case (a) above, so the corresponding pattern, for example, α
is read out and the characters are displayed on the display 26.

Note that the decoding circuit 25 detects a 1-byte code, but this is because, for example, a 1-byte code is assigned to the lower 1 byte with a code that is not used in 2 bytes, such as "00", so it is easy to detect a 1-byte code. Bytecode detection can be performed.

FIG. 7 is a detailed circuit diagram of the left/right designation signal generation circuit 243. In the figure, 70.71 is a flip-flop (hereinafter referred to as FF), 72 is an AND gate, 73.75 is an exclusive OR circuit, and 74 is an inverter.

Hereinafter, the cases will be divided into cases where "1" is set in the mode register 242 in FIG. 4 (mode designation signal 252-1) and cases where "0" is set (mode designation signal 252-0). Explain the operation.

(a) Mode designation signal 252-1; First, before starting display, send the horizontal blank signal 290 to the FF 70 via the inverter 74 to set the FF 70, and set the Q output of the FF 70 to a high level (hereinafter referred to as H). I'll keep it. Then, until the detection signal 253 detects a 1-byte code and becomes H, the output from the AND gate 72 is fixed at a low level (hereinafter referred to as "low level"), so it is inverted every time the character clock 251 rises. The Q output signal of FF 70 is the left and right designated signal 254.
is output as

Now, when the detection signal 253 becomes H (to
), at the next timing 11, the AND gate 72 opens,
Signal 254 goes high. Then, at the next timing t2, the AND gate 72 closes again, but at this time, the FF7
Since the Q output of 0 is H, the signal 254 becomes H. Then, at tl, the signal 254 becomes H, so the fifth
The pattern in area 511 in the figure is selected.

(b) Mode designation signal 252-0; In this case, AND gate 72 is always closed.

Then, at the next timing tI when the detection signal 253 detects the 1-byte code, the Q output of the FF 7o is L, so the signal 254 is set. Furthermore, at the next timing t2, the signal 253 returns to L, so the D input of FF70 becomes L.
becomes. As a result, the Q output of the FF 70 becomes H, and the signal 254 becomes H. And in this case, timing t
Since the signal 254 is L at 1, area 5 in FIG.
21 patterns are selected.

FIG. 8 is an explanatory diagram of the configuration of a character generator of a character display control device according to a second embodiment of the present invention. In this example, character generator 2
Turn A of the same first character group is stored in both the left area 30 and the right area 31 corresponding to the left and right designation signals in 3.

FIG. 9 is an explanatory diagram showing more specifically the structure of the character generator 23 shown in FIG. 8. Here, the difference from the embodiment shown in FIG. 5 is that the 1-byte code patterns stored in areas 511 and 521 are exactly the same.

In this case, the value set in the mode register 242 (
Regardless of the mode designation signal 252), the same pattern will always be displayed for the 1-byte code system. In other words, when displaying a 1-byte code system by adopting the configuration shown in Figure 349, the mode designation signal 252
There is no need to take this into account.

FIG. 10 shows a character according to a third embodiment of the present invention.
FIG. 2 is an explanatory diagram of the configuration of a character generator of the display device. In this embodiment, the separation into a left area 51 and a right area 52 is the same as in each of the above embodiments, but within each area 51 and 52, a 2-byte pattern and a 1-byte pattern are separated. They are not separated as shown in FIGS. 5 and 9, but are mixed together. For example, as shown in the diagram, within area 51, the left part of the moon, the left part of A1, B...
・It is stored as follows. On the other hand, in area 52, the right part of the moon, α, β, the right part of the tree, etc. are stored.

The method of calling each character in this embodiment is basically the same as in the first embodiment, only the address of the 1-byte pattern is different.

FIG. 11 shows a character according to a fourth embodiment of the invention.
This is a circuit diagram showing details of the screen display control circuit 24A in the display control device, and the circuit configuration of the entire character display control device is the same as the configuration shown in FIG. 2. This embodiment is characterized in that a 4-byte pattern and a 1-byte pattern are mixed and stored in the character generator. Therefore, the frequency dividing circuit 241A in FIG. 11 is a 1/4 frequency dividing circuit, and the area specifying signal generating circuit 243A converts signals 254 and 255 for specifying a first area and a fourth area, which will be described later, into characters. It is sent to the generator 23.

FIG. 12 is a block diagram showing details of the area designation signal generation circuit 243A. In contrast to the left and right designation signal generation circuit 243 in FIG.
and FF122 are added.

FIG. 13 is an explanatory diagram of the character generator of the fourth embodiment. This character generator is separated into a first area 51 to a fourth area 54,
The 4-byte pattern is for each area 51 to 5 as shown in the diagram.
The pattern information is stored in 4 bytes each.

FIG. 14 is a time chart showing the operation. For example, by a combination of the left and right signals 254 and their auxiliary signals 255, each of the areas 51 to 54 is sequentially designated and a predetermined character, for example, 5 of 1 byte in FIG.
13.523.533.543 are read out sequentially,
One pattern is displayed by four characters.

Also in this embodiment, when a 1-byte pattern is detected by the decoding circuit 25, the detection signal 253
As in the previous embodiment, the character is read out and displayed on the display 26.

FIG. 15 shows a character according to a fifth embodiment of the present invention.
FIG. 2 is a block diagram of a display control device. In this embodiment, the character slant and ``tsu'' are stored in separate areas, and when necessary, they are read out and combined to form the displayed character.

A specific code group is assigned to the character generator 150 for characters to be synthesized and displayed. For example, for the 256 characters of codes 7600H to 76FFH, as shown in FIG. 16, the left-hand patterns are each unique patterns, and the right-hand patterns display a common pattern "month". Therefore, this common pattern "Moon"
For example, a code corresponding to 7700H is assigned, and the character pattern is stored in an area of the character generator 151 corresponding to the above code.

For example, as shown in FIG. 17, the partial part is stored in the area 514 of the 2-byte pattern in the area 51 corresponding to the left pattern, and the 2-byte pattern in the area 52 corresponding to the right pattern of the second character group is stored. area 524
The ``construction'' part is stored in . Here, this "
The "structure" part is treated as a common pattern.

Common pattern address register 151 and address output circuit 22 are circuits for accessing character generator 150. In this embodiment, the output of the refresh memory 21 is decoded by a decoding circuit 152, and the signal thereof is sent to the common pattern address register 151 via an AND gate 154, so that the above-mentioned common character characters are read out. This AND gate 154 is opened and closed by an inverted signal from the inverter 153 of the left/right designation signal.

FIG. 18 is a time chart showing the operation of the control device shown in FIG. 15, and the case where the characters "morning" are displayed will be described below.

Based on the character clock 251 in the screen display control circuit 24, left and right designation signals 254 are sent out from the screen display control circuit 24 in the order of left, right, left, right, etc., for example. On the other hand, when the decoding circuit 152 detects the signal 76H in response to the output from the refresh memory 21, it outputs it, and at that time, the left/right designation signal is inverted by the inverter 153 and input to the AND gate 154, so its output becomes L, and the signal 76H is output. The resultant address output circuit 22 becomes operational,
Common pattern address register 150 becomes inactive. Then, the address signal 7600H from the refresh memory 21 is sent to the character generator 151, and the left side portion in the morning is read out and sent out.
displayed on the display 26. Next, when the left and right designation signal 254 becomes the right side signal, its unique designation signal (L)
is inverted by the inverter 153 and input to the AND gate 104, so its output becomes H, and as a result, the address output circuit 22 becomes inactive and the common pattern address register 100 becomes active.

Then, the code 7700H corresponding to the "Tsukuri" part on the right side of the morning is sent from the common pattern address register 150 to the character generator 151 as address data, and the "Tsukuri" part on the right side of the morning is sent to the screen display device 24. , is displayed on the display 26. In this way, the characters "morning" will be displayed on the display 26.

Patterns such as "Hu", "Ming", and "Lang" shown in FIG. 16 are also displayed in the same manner. Also in this embodiment, in the case of a 1-byte pattern, the decoding circuit 15
2, the screen display control circuit 24 can be controlled based on the detection signal 253, and the display can be performed in the same manner as in the previous embodiment.

In addition, in this fifth embodiment, an example was shown in which "Tsukuri" was treated as a common pattern, but it is also possible to treat bias as a common pattern, or further treat both bias and "Tsukuri" as a common pattern, The two may be combined as appropriate.

FIG. 19 shows a character according to a sixth embodiment of the invention.
FIG. 2 is a configuration explanatory diagram of a character generator of the display control device. In this embodiment, when one 2-byte pattern is separated into two, for example, each pattern of "water" and "tree" has almost the same right side part, so it is divided into two parts. Store the left part of each pattern of "Water" and "Tree" in areas 527 and 528.
Store each in

Therefore, in this embodiment, when the pattern "Water" is called up and displayed, the contents of areas 516 and 527 are sequentially read and displayed, and when the pattern "Tree" is called up and displayed, the contents of areas 516 and 528 are read out and displayed in sequence. Read and display sequentially. In other words, in this embodiment, the kanji that cannot be separated into ``bias'' and ``tsukuri'' are separated from their central parts, their common patterns are obtained, and the combination is displayed.The hardware configuration itself is the same as that of the fifth embodiment. Same as example.

Note that although the above embodiments have shown examples of mixed display of 1-byte patterns and 2-byte patterns, and mixed display of 1-byte patterns and 4-byte patterns, the present invention is not limited thereto. No, 1, 2, 3.4.8
The same can be applied to a suitable combination of byte patterns.

Also, by mixing characters of different bytes as described above, you can free up storage area, so the extra area can be used to store programs, data for each type of character, etc. There are ways to use it, such as storing capacity data of free areas.

Furthermore, although the above embodiment shows an example in which 8 bits are read out at a time, if a 16-bit data bus is used, 2 bytes can be read out at the same time.

[Effects of the Invention] As described above, according to the present invention, character patterns composed of different bytes can be stored in a mixed state in the character generator. In order to perform the display, one type of character generator can perform the function, and the capacity of the character generator can be reduced.

Furthermore, by extracting a common pattern from each character pattern, each pattern can be displayed by combining the common pattern and non-common parts, so the storage capacity per character pattern is reduced. Therefore, the capacity of the character generator can be reduced.

As described above, the capacity of the character generator can be reduced, reducing component costs by reducing the number of semiconductor components used in the character generator.
This has the effect of reducing the mounting area of the device, and makes it possible to effectively utilize the free space of the character generator, which conventionally did not store data.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of a character display control device according to the present invention. FIG. 2 is a block diagram of a character display device according to the first embodiment of the present invention, FIG. 3 is an explanatory diagram of the structure of a character generator, and FIG. 4 is a block diagram showing details of a screen display control device. FIG. 5 is a configuration explanatory diagram showing a specific example of a character generator, FIGS. 6(a) and 6(b) are time charts showing the display operation of the first embodiment, and FIG.
The figure is a circuit diagram showing details of the left/right designation signal generation circuit. FIG. 8 shows the character in the embodiment of the rod 2 of this invention.
FIG. 9 is an explanatory diagram of the construction of a generator, FIG. 9 is an explanatory diagram of the construction showing a specific example thereof, and FIG. 10 is an explanatory diagram of the construction of a character generator according to a third embodiment of the present invention. FIG. 11 is a block diagram of a display screen control device of a character display control device according to a fourth embodiment of the present invention;
Figure 12 is a circuit diagram of the area designation signal generation circuit.
Figure 3 is an explanatory diagram of the configuration of the character generator, No. 14.
The figure is a time chart showing the display operation. FIG. 15 shows a character according to the fifth embodiment of the present invention.
A configuration diagram of the display control device, FIG. 16 is an explanatory diagram of common patterns, FIG. 17 is a configuration explanatory diagram showing a specific example of a character generator, FIG. 18 is a time chart showing its display operation, and FIG. 19 is an explanatory diagram of a common pattern. FIG. 7 is a configuration explanatory diagram showing a specific example of a character generator according to a sixth embodiment of the present invention. FIG. 20 is a block diagram of a conventional character display control device. Figure 1

Claims (6)

[Claims] (1) data for displaying characters on a display device, a first character group expressed by a code of a first predetermined number of bytes, and a second predetermined number of bytes larger than the first predetermined number; Each of the second character groups expressed by the code includes a refresh memory specifically stored with a second predetermined number of bytes of data, and a character pattern to be displayed by the data in the refresh memory; a character generator in which the character pattern includes a first group of characters represented by a code of a first predetermined number of bytes and a second group of characters represented by a code of a second predetermined number of bytes; an address output circuit that accesses a character generator according to a code in a refresh memory; and a character pattern of a first character group and a character pattern of a second character group of the character generator are selected based on output data of the address output circuit. A character display control device comprising: a screen display control device for reading a character pattern of a first character group and a character pattern of a second character group by sending it to a display to display a mixture of character patterns of a first character group and a second character group. (2) The first predetermined number is “1” and the second predetermined number is “2”
The character generator is provided with two areas, a left area and a right area, where the left area stores the left character pattern of the second character group and the first character group, and the right area stores the second character pattern. 2. The character display control device according to claim 1, wherein the character pattern on the right side of the character group and the first character group are respectively stored. (3) A character clock generation circuit that generates a reference clock, a frequency divider circuit that divides the frequency of this reference clock by 1/2, the output of this frequency divider circuit, a mode designation signal, and 1/2.
A second screen display control device having a left and right designation signal generation circuit that receives a detection signal of a byte code and sends a left and right designation signal to the character generator to sequentially designate a left area and a right area of the character generator. Character display control device as described in Section. (4) The first predetermined number is “1” and the second predetermined number is “4”
The character generator is provided with four areas, a first area to a fourth area, and each area has a pattern corresponding to 1/4 of the character pattern of the second character group and a pattern of the first character group. The character display control device according to item 1, each stored therein. (5) A character clock generation circuit that generates a reference clock, a frequency divider circuit that divides the frequency of this reference clock by 1/4, the output of this frequency divider circuit, a mode designation signal, and a 1-byte code detection signal is input and the character
4. The character display control device according to claim 4, comprising a screen display control device comprising an area designation signal generation circuit that sends out an area designation signal for sequentially designating the first area to the fourth area of the generator to the character generator. . (6) data for displaying characters on a display device, a first character group expressed by a code of a first predetermined number of bytes, and a second predetermined number of bytes larger than the first predetermined number; Each of the second character groups expressed by the code includes a refresh memory specifically stored with a second predetermined number of bytes of data, and a character pattern to be displayed by the data in the refresh memory; The character pattern includes a first character group represented by a code of a first predetermined number of bytes and a second character group represented by a code of a second predetermined number of bytes; a character generator to which a predetermined address is given in advance to a common pattern in the second character group; a decoder for detecting a code having a common pattern in the second character group among the codes in the refresh memory; address signals are stored,
a common pattern address register that accesses a character generator based on the output of the decoder; and an address output circuit that accesses the character generator according to a code in a refresh memory and becomes inactive when the common pattern address register is activated. and selecting and reading the character pattern of the first character group of the character generator based on the output of the address output circuit, and when reading the second character group, accessing the common pattern address register and the address output circuit. , a screen display control device reads out the common pattern and the non-common pattern and sends them to the display based on the character pattern, and displays the character pattern of the first character group and the character pattern of the second character group in a mixed manner. Display control device.