JPH0287672A - Insulating gate type field effect transistor - Google Patents

Abstract

PURPOSE:To obtain a large gate length per exclusive area on a semiconductor substrate by disposing gate electrodes through a gate insulating film on the surface of a trench having an inclined face. CONSTITUTION:As gate electrodes 13-1 and 13-2 are disposed on the inclined face of a section inverse-trapezoid like trench 15 through a gate oxide film 14, a large gate width per exclusive area of a semiconductor substrate 11 can be obtained and making of a MOS transistor having a powerful drive capacity is realized. Since the gate electrodes are disposed on the inclined face, no disconnection of the gate electrodes takes place and it is easy to form source and drain regions 16-1,... by ion implantation. Although they have angles of inclination of 30-60 deg., it is preferable to have an angle of inclination of 45 deg.. If the gate width is compared with conventional one in terms of the same exclusive area on condition that the lengths of an inclined face and a base are (a) and (b), it increases by a factor of (1+b/2a)/(costheta+b/2a) in comparison with conventional gate widths.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an insulated gate field effect transistor, and more particularly to a MOS transistor used in an integrated circuit.

[Conventional technology]

Conventionally, this type of MOS transistor has been constructed by arranging a gate electrode in a rectangular shape on the surface of a semiconductor substrate 1 with a gate oxide film interposed therebetween, as shown in FIG.

[Problem to be solved by the invention]

The above-described conventional MOS transistor has a gate electrode disposed planarly on a semiconductor substrate, so that if the gate width is made wide, the area occupied by the transistor becomes large, which becomes an obstacle to improving the degree of integration.

An object of the present invention is to provide an insulated gate field effect transistor that can efficiently increase the gate width in terms of the occupied area.

[Means to solve the problem]

The insulated gate field effect transistor of the present invention has a groove dug in the surface of a semiconductor substrate and having an inclined surface, and a gate electrode provided on the inclined surface with a gate insulating film interposed therebetween.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1(a) is a plan view of a semiconductor chip showing a first embodiment of the present invention, and FIGS. 1(b) and (c) are sectional views taken along line xx' in FIG. 1(a), and FIG. It is a sectional view taken along the YY' line.

Is it an inverted trapezoidal cross section? ! Gate oxide film 1 is placed on the slope of l15.
Since the gate electrodes 1B-1 and 13-2 are arranged through the gate electrodes 1B-1 and 13-2, the gate width per occupied area of the semiconductor substrate 11 (silicon substrate) can be increased, making it possible to create a MOS with large drive capability.
A transistor can be realized. Since the gate electrode is arranged on the inclined surface, disconnection of the gate electrode does not occur, and the source/drain regions 16-1. ...is easy to form. The angle of inclination θ is 30° to 60°, preferably 45°.

Assuming that the length of the slope is a and the length of the bottom is b, comparing the same occupied area, the conventional example has (1+ b/2a)/(CO
Sθ+b/2a) times the gate width.

FIG. 2(a) is a plan view of a semiconductor chip showing a second embodiment of the present invention, and FIG. 2(b) is a sectional view taken along the line xx' in FIG. 2(a).

The gate electrode 23 is arranged to cross the slope of a groove 25 having a V-shaped cross section dug in the semiconductor substrate 24 by reciprocating several times with the gate oxide film 24 interposed therebetween.

In this embodiment, the gate width can be increased more efficiently because the groove is in the shape of a 7-shape and the gate electrode is arranged in a reciprocating manner several times.

〔Effect of the invention〕

As explained above, the present invention can increase the gate length per occupied area on the semiconductor substrate by arranging the gate electrode on the surface of the groove having an inclined surface via the gate insulating film. This has the effect of improving the degree of integration.

[Brief explanation of drawings]

FIG. 1(a) is a plan view of a semiconductor chip showing a first embodiment of the present invention, and FIGS. 1(b) and (C) are a plan view of a semiconductor chip showing a first embodiment of the invention.
A cross-sectional view along the line xx' and a cross-sectional view along the Y-Y' line in figure (a) 5,
FIG. 2(a) is a plan view of a semiconductor chip showing a second embodiment, FIG. 2(b) is a sectional view taken along line xx' in FIG. 2(a),
FIG. 3 is a plan view of a semiconductor chip showing a conventional example. 1.11.21...Semiconductor substrate, 2,12.22...
・Source/drain formation region, 3.13-1.13-2
．． 23... Gate electrode 4, 14.24... Gate oxide film, 15.25... Groove, 16-1 to 16-3...
Source train area.

Claims (1)

[Claims] 1. An insulated gate field effect transistor comprising: a groove dug in the surface of a semiconductor substrate and having an inclined surface; and a gate electrode provided on the inclined surface with a gate insulating film interposed therebetween.