JPH0287619A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPH0287619A
JPH0287619A JP24148188A JP24148188A JPH0287619A JP H0287619 A JPH0287619 A JP H0287619A JP 24148188 A JP24148188 A JP 24148188A JP 24148188 A JP24148188 A JP 24148188A JP H0287619 A JPH0287619 A JP H0287619A
Authority
JP
Japan
Prior art keywords
substrate
bath
layer
standby position
inp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24148188A
Other languages
Japanese (ja)
Inventor
Yasuo Shinohara
篠原 庸雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24148188A priority Critical patent/JPH0287619A/en
Publication of JPH0287619A publication Critical patent/JPH0287619A/en
Pending legal-status Critical Current

Links

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)
  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

PURPOSE:To stably obtain a thin epitaxial layer by a liquid epitaxial growth operation by a method wherein the lower part of a bath is formed to be a slit shape which is sufficiently narrower than a width of a substrate. CONSTITUTION:After an InP layer has been grown in a first bath 13, a substrate 12 is placed in a first standby position 14 under an InP substrate used to prevent a thermal deterioration of the surface. Then, a slider 11 is pulled again; the substrate 12 is passed under a second bath and a third bath 15, 16, and is shifted to a second standby position 17 under the InP substrate. While the substrate is passed under the baths 15, 16 whose lower part has been made narrow to be a slit shape, thin films of InGaAs and InGaAsP are grown individually. Then, the substrate 12 is shifted reversely to the first standby position 14 from the second standby position 17. While the substrate is passed under the baths 15, 16, thin films of InGaAs and InGaAsP are grown individually. When this operation is repeated a plurality of times, a multiple-quantum-well structure of InGaAs and InGaAsP can be formed by a liquid growth operation.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体素子の製造方法に関し、特に液相エピ
タキシャル成長において極めて薄い層を形成する方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming extremely thin layers in liquid phase epitaxial growth.

〔従来の技術〕[Conventional technology]

従来、半導体素子の液相エピタキシャル成長膜長いて極
めて薄い層を形成する方法としては、成長時間を限りな
く短時間とするか、溶液の過飽和度を小さくし制御速度
を小さくする方法が用いられている。
Conventionally, methods for forming long and extremely thin liquid-phase epitaxially grown films for semiconductor devices have been carried out by either minimizing the growth time or reducing the control speed by reducing the degree of supersaturation of the solution. .

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の液相エピタキシャル成長方法は、成長時
間をできるだけ短かくするとしても成長基板の保持され
たスライド板を機械的に安全確実に移動させ短時間にし
ても浴槽の真下に停止させる方法となっているので、数
百A以下の層を形成するのは困難であった。又この時に
成長基板を浴槽の真下に停止させずに通過させるだけの
方法であっても百〜数百へ程度の層が成長してしまうと
いう欠点がある。一方、溶液の過飽和度を非常に小さな
値にした場合は確かに薄い成長層を得る−ことも可能で
あるが、同時にメルトバックが起り易く、基板と成長層
との界面の平坦性が悪化するという欠点がある。
In the conventional liquid phase epitaxial growth method described above, even if the growth time is to be kept as short as possible, the slide plate holding the growth substrate is mechanically moved safely and securely and stopped directly under the bathtub even if the growth time is short. Therefore, it was difficult to form a layer with a current of several hundred amperes or less. Furthermore, even if the growth substrate is simply passed through the bath without being stopped directly under the bath, there is a drawback that hundreds to several hundreds of layers will grow. On the other hand, if the supersaturation degree of the solution is set to a very small value, it is certainly possible to obtain a thin growth layer, but at the same time, meltback is likely to occur and the flatness of the interface between the substrate and the growth layer deteriorates. There is a drawback.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の半導体素子の製造方法は、浴槽の幅を基板の幅
と比較して充分狭くしこの幅の狭いスリット状の浴槽の
下を基板を高速で移動させながら極めて薄いエピタキシ
ャル成長層を形成することを特徴とする。
The method for manufacturing a semiconductor device of the present invention involves forming an extremely thin epitaxial growth layer by making the width of the bathtub sufficiently narrow compared to the width of the substrate and moving the substrate at high speed under the narrow slit-shaped bathtub. It is characterized by

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。第1図
及び第2図は本発明の第1の実施例を説明するための断
面図である。ここではカーボンボートを用いたI nG
aAs活性層 nP系の液相エピタキシャル成長法によ
り1.55μmの発光波長を有する活性層を含むダブル
へテロエピタキシャル層を形成する方法について述べる
。スライダー1に基板2をセットし浴槽3,4,5.6
にInとそれぞれ所要量のInP、GaAs、InAs
を入れる。スライダー1を第1図の位置にした状態でこ
れらを630℃で1時間保持し、それぞれの浴槽でIn
中にP、Ga、Asを充分に溶かし込む。次に系全体を
毎分0.5℃で降温する。所定の温度まで下った所でス
ライダー1を引き基板2を第1の浴槽3の下部に移動さ
せ所定時間InP層をエピタキシャル成長させる。その
後再びスライダー1を引き基板2を第2の浴槽4の下部
に移動させ、所定時間InGaAsP活性層をエピタキ
シャル成長させる。さらにスライダー1を引き基板2を
第4の浴槽6の下部に移動させInP層を成長させる。
Next, the present invention will be explained with reference to the drawings. 1 and 2 are cross-sectional views for explaining a first embodiment of the present invention. Here, I nG using a carbon boat
aAs Active Layer A method for forming a double heteroepitaxial layer including an active layer having an emission wavelength of 1.55 μm using an nP-based liquid phase epitaxial growth method will be described. Set the board 2 on the slider 1 and bathtubs 3, 4, 5.6
In and the required amounts of InP, GaAs, and InAs, respectively.
Put in. With the slider 1 in the position shown in Figure 1, these were held at 630°C for 1 hour, and incubated in each bath.
Sufficiently dissolve P, Ga, and As inside. Next, the temperature of the entire system is lowered at a rate of 0.5°C per minute. When the temperature has dropped to a predetermined temperature, the slider 1 is pulled to move the substrate 2 to the lower part of the first bath 3, and an InP layer is epitaxially grown for a predetermined period of time. Thereafter, the slider 1 is pulled again to move the substrate 2 to the lower part of the second bath 4, and the InGaAsP active layer is epitaxially grown for a predetermined period of time. Further, the slider 1 is pulled and the substrate 2 is moved to the lower part of the fourth bath 6 to grow an InP layer.

このようにして1,55μmの発光波長を有する活性層
上にInPを成長する場合活性層が溶液で溶解してしま
うメルトバック現象が起る。そこで活性層を成長した後
I nGaAs活性層とInPとの中間の組成を有する
層を薄く活性層上に成長させ活性層のメルトバックを防
止する。この層をアンチメルトバック層と称し、1.5
5μmの活性層を有するD Hエピタキシャル成長にお
いては不可欠の層である。
When InP is grown on an active layer having an emission wavelength of 1.55 μm in this manner, a melt-back phenomenon occurs in which the active layer is dissolved in a solution. Therefore, after growing the active layer, a thin layer having a composition intermediate between that of the InGaAs active layer and InP is grown on the active layer to prevent the active layer from melting back. This layer is called the anti-meltback layer and is 1.5
It is an essential layer in D H epitaxial growth with a 5 μm active layer.

このアンチメルトバック層は活性層のメルトバックを防
止するものであるから成長溶液は過飽和度の高いもので
なければならず、又活性層とクラッド層との間に挟まれ
ている層としてできるだけ薄い方が特性上望ましい。こ
のアンチメルトバック層を成長するための溶液が浴槽5
に入っている。
Since this anti-meltback layer prevents meltback of the active layer, the growth solution must be highly supersaturated, and the layer sandwiched between the active layer and the cladding layer must be as thin as possible. is more desirable in terms of characteristics. The solution for growing this anti-meltback layer is in the bath 5.
It's in.

この浴槽の下部は狭くスリット状になっており、基板2
がこの浴M5の下部を通過する時に基板2が溶液に触れ
ている時間は極めて短いものとなる。この結果溶液の過
飽和度を活性層をメルトバックしない程度に大きく保っ
たままでも実効的成長時間が極めて短いなめ50〜10
0人のアンチメルトバック層が得られ、その上のInP
層の成長も容易にでき質の良いHDエピタキシャル層が
得られる。
The bottom of this bathtub has a narrow slit shape, and the substrate 2
The time during which the substrate 2 is in contact with the solution when it passes through the lower part of the bath M5 is extremely short. As a result, even if the supersaturation degree of the solution is kept high enough to prevent the active layer from melting back, the effective growth time is extremely short.
0 anti-meltback layer was obtained, and InP on top of it was obtained.
The layer can be easily grown and a high quality HD epitaxial layer can be obtained.

第3図は本発明の第2の実施例を説明するための断面図
である。初めにスライダー11上に置かれた基板12は
第1の浴槽13でInP層を成長した後に表面の熱劣化
防止用のInP基板下の第1の待機位置14に置かれる
。次に再びスライダー11を引き基板12を第2.第3
の浴槽15゜16下を通過させInP基板下の第2の待
機位置17まで移動させる。この時下部がスリット状に
狭くなっている浴槽15.16の下を通過する際にそれ
ぞれI nGaAs及びInGaAsPの薄膜が成長す
る。次に今度は第2の待機位置17から逆に第1の待機
位置14へ基板12を移動させる。この時浴槽16.1
5の下を通過する際にそれぞれInGaAsP及びI 
nGaAsの薄膜が成長する。これらの行為を複数回繰
り返すことによりI nGaAsとI nGaAsPの
多重量子井戸構造を液相成長により形成できる。さらに
スライダー11を引き次の浴槽18によりこの上にIn
Pクラッド層を成長せしめることにより多重量子井戸構
造のDHエピタキシャル層を得ることができる。
FIG. 3 is a sectional view for explaining a second embodiment of the present invention. The substrate 12 initially placed on the slider 11 is placed in a first standby position 14 under the InP substrate for preventing thermal deterioration of the surface after an InP layer is grown in a first bath 13. Next, pull the slider 11 again to move the substrate 12 to the second position. Third
The substrate is moved to the second standby position 17 under the InP substrate. At this time, thin films of InGaAs and InGaAsP grow as they pass under the bathtubs 15 and 16, each of which has a narrow slit-like bottom. Next, the substrate 12 is moved reversely from the second standby position 17 to the first standby position 14. At this time bathtub 16.1
InGaAsP and I, respectively, when passing under 5
A thin film of nGaAs is grown. By repeating these actions multiple times, a multiple quantum well structure of InGaAs and InGaAsP can be formed by liquid phase growth. Furthermore, the slider 11 is pulled out and placed on top of this by the next bathtub 18.
By growing a P cladding layer, a DH epitaxial layer having a multiple quantum well structure can be obtained.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、浴槽の下部を基板の巾よ
り充分狭いスリット状にすることにより液相エピタキシ
ャル成長により薄いエピタキシャル層が安定して得られ
るという効果がある。
As explained above, the present invention has the effect that a thin epitaxial layer can be stably obtained by liquid phase epitaxial growth by forming the lower part of the bath into a slit shape that is sufficiently narrower than the width of the substrate.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図は本発明の第1の実施例を説明するため
の断面図、第3図は本発明の第2の実施例を説明するた
めの断面図である。 1.11・・・スライダー、2,12・・・基板、3゜
13・・・第1の浴槽、4.15・・・第2の浴槽、5
゜6・・・第3の浴槽、 6 。 8・・・第4の浴槽、 ・・・第1の待機位置、 7・・・第2の待機位置。
1 and 2 are cross-sectional views for explaining a first embodiment of the present invention, and FIG. 3 is a cross-sectional view for explaining a second embodiment of the present invention. 1.11...Slider, 2,12...Substrate, 3゜13...First bathtub, 4.15...Second bathtub, 5
゜6...Third bathtub, 6. 8... Fourth bathtub,... First standby position, 7... Second standby position.

Claims (1)

【特許請求の範囲】[Claims] 基板の幅と比較して充分に狭いスリット状にした浴槽の
下を基板を高速で通過させることにより極めて薄いエピ
タキシャル成長膜を形成することを特徴とする半導体素
子の製造方法。
1. A method for manufacturing a semiconductor device, which comprises forming an extremely thin epitaxially grown film by passing a substrate at high speed under a slit-shaped bathtub that is sufficiently narrow compared to the width of the substrate.
JP24148188A 1988-09-26 1988-09-26 Manufacture of semiconductor element Pending JPH0287619A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24148188A JPH0287619A (en) 1988-09-26 1988-09-26 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24148188A JPH0287619A (en) 1988-09-26 1988-09-26 Manufacture of semiconductor element

Publications (1)

Publication Number Publication Date
JPH0287619A true JPH0287619A (en) 1990-03-28

Family

ID=17074955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24148188A Pending JPH0287619A (en) 1988-09-26 1988-09-26 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPH0287619A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102660290A (en) * 2012-04-27 2012-09-12 东北林业大学 Acorn shell pigment with antioxidant activity and preparation method and application thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102660290A (en) * 2012-04-27 2012-09-12 东北林业大学 Acorn shell pigment with antioxidant activity and preparation method and application thereof

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