JPH0286737U - - Google Patents
Info
- Publication number
- JPH0286737U JPH0286737U JP16628288U JP16628288U JPH0286737U JP H0286737 U JPH0286737 U JP H0286737U JP 16628288 U JP16628288 U JP 16628288U JP 16628288 U JP16628288 U JP 16628288U JP H0286737 U JPH0286737 U JP H0286737U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- print head
- controlling
- pulse width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003079 width control Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Dot-Matrix Printers And Others (AREA)
Description
第1図は本考案の第1の実施例の回路図、第2
図は第1図の第1の実施例の動作を説明するため
の各部の波形図、第3図は本考案の第2の実施例
の回路図、第4図は第3図の第2の実施例の動作
を説明するための各部の波形図、第5図は従来の
印字ヘツド回路の一例に用いる1ピン当りの印字
ヘツド駆動回路の回路図、第6図は第5図の印字
ヘツド駆動回路の動作を説明するためのヘツド電
圧と印字出力パルス幅との相関を示す波形図であ
る。
1……印字タイミングパルス、2……インバー
タ、3……節点Aの波形、4……ツエナーダイオ
ード、5,7……OR回路、6……節点Bの波形
、8……印字出力パルス、9……コンパレータ、
10,11……インバータ、12……印字ヘツド
のコイル、14……印字データ、Q1〜Q4……
トランジスタ、R1〜R8……抵抗、+VHEA
D……ヘツド電圧。
Figure 1 is a circuit diagram of the first embodiment of the present invention;
The figure is a waveform diagram of each part to explain the operation of the first embodiment shown in FIG. 1, FIG. 3 is a circuit diagram of the second embodiment of the present invention, and FIG. A waveform diagram of each part to explain the operation of the embodiment, FIG. 5 is a circuit diagram of a print head drive circuit per pin used as an example of a conventional print head circuit, and FIG. 6 is a circuit diagram of the print head drive circuit of FIG. 5. FIG. 2 is a waveform diagram showing the correlation between head voltage and print output pulse width for explaining the operation of the circuit. 1... Print timing pulse, 2... Inverter, 3... Waveform of node A, 4... Zener diode, 5, 7... OR circuit, 6... Waveform of node B, 8... Print output pulse, 9 ……comparator,
10, 11...Inverter, 12...Print head coil, 14...Print data, Q1 to Q4 ...
Transistor, R 1 to R 8 ... Resistor, +VHEA
D...Head voltage.
Claims (1)
間を設定する印字ヘツド回路において、遅延回路
で構成され前記印字出力パルスのパルス幅を制御
して前記印字期間の制御を行うパルス幅制御回路
を有することを特徴とする印字ヘツド回路。 A print head circuit for setting a print period corresponding to a print output pulse in a print head includes a pulse width control circuit configured with a delay circuit and controlling the print period by controlling the pulse width of the print output pulse. Characteristic print head circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16628288U JPH0286737U (en) | 1988-12-21 | 1988-12-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16628288U JPH0286737U (en) | 1988-12-21 | 1988-12-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0286737U true JPH0286737U (en) | 1990-07-10 |
Family
ID=31453529
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16628288U Pending JPH0286737U (en) | 1988-12-21 | 1988-12-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0286737U (en) |
-
1988
- 1988-12-21 JP JP16628288U patent/JPH0286737U/ja active Pending
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