JPH0286228U - - Google Patents

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Publication number
JPH0286228U
JPH0286228U JP16577988U JP16577988U JPH0286228U JP H0286228 U JPH0286228 U JP H0286228U JP 16577988 U JP16577988 U JP 16577988U JP 16577988 U JP16577988 U JP 16577988U JP H0286228 U JPH0286228 U JP H0286228U
Authority
JP
Japan
Prior art keywords
terminal
electrical signal
power supply
conversion circuit
supply system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16577988U
Other languages
Japanese (ja)
Other versions
JPH0724815Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16577988U priority Critical patent/JPH0724815Y2/en
Publication of JPH0286228U publication Critical patent/JPH0286228U/ja
Application granted granted Critical
Publication of JPH0724815Y2 publication Critical patent/JPH0724815Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す回路図、第2図
、第3図は従来のパルス信号基準レベル変換回路
を示す回路図である。 1:信号入力端子、2:信号出力端子、3:H
IGHレベル設定用端子、5:LOWレベル設定
用端子、9:負荷抵抗A、10:負荷抵抗B、1
1:電源系選択端子A、12:バイパス用トラン
ジスタ、13:電源系選択端子B。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are circuit diagrams showing conventional pulse signal reference level conversion circuits. 1: Signal input terminal, 2: Signal output terminal, 3: H
IGH level setting terminal, 5: LOW level setting terminal, 9: Load resistance A, 10: Load resistance B, 1
1: Power supply system selection terminal A, 12: Bypass transistor, 13: Power supply system selection terminal B.

Claims (1)

【実用新案登録請求の範囲】 1 単一の電源系の電気信号を他の電源系の電気
信号に変換する電気信号基準レベル変換回路にお
いて、入力端子と出力端子の間が複数経路となつ
ており、その経路が、外部からの印加電圧により
選択可能となつていることを特徴とする電気信号
の基準レベル変換回路。 2 単一の電源系の電気信号を他の電源系の電気
信号に変換する電気信号基準レベル変換回路にお
いて、入力端子と出力端子の間が複数経路となつ
ており、その経路の一方が、エミツタを信号入力
端子に接続し、コレクタを出力端子と接続し、ベ
ースに印加する電圧によりオンオフするトランジ
スタで構成されることを特徴とする電気信号の基
準レベル変換回路。 3 ベースを入力端子、コレクタをハイレベル設
定用電圧供給端子に接続するとともに、後記出力
トランジスタのベースに接続し、エミツタを一方
の電源選択端子と接続した入力トランジスタと、
エミツタを前記ハイレベル設定用電圧供給端子に
接続し、コレクタを直列接続された2つの抵抗を
介して、ローレベル設定用電圧供給端子に接続し
た前記出力トランジスタと、接続点を出力端子と
した前記直列接続した抵抗と、ベースを他方の電
源系選択端子とし、エミツタを信号入力端子に接
続し、コレクタを前記直列接続抵抗の中点に接続
してなることを特徴とする電気信号基準レベル変
換回路。
[Claims for Utility Model Registration] 1. In an electrical signal reference level conversion circuit that converts an electrical signal from a single power supply system to an electrical signal from another power supply system, there are multiple paths between the input terminal and the output terminal. , a reference level conversion circuit for electrical signals, the path of which is selectable by an externally applied voltage. 2. In an electrical signal reference level conversion circuit that converts an electrical signal from a single power supply system to an electrical signal from another power supply system, there are multiple paths between the input terminal and the output terminal, and one of the paths is connected to the emitter. What is claimed is: 1. A reference level conversion circuit for electrical signals, comprising a transistor connected to a signal input terminal, a collector connected to an output terminal, and turned on and off by a voltage applied to the base. 3. An input transistor whose base is connected to an input terminal, whose collector is connected to a high-level setting voltage supply terminal, and which is also connected to the base of an output transistor described later, and whose emitter is connected to one power supply selection terminal;
The output transistor has an emitter connected to the high level setting voltage supply terminal and a collector connected to the low level setting voltage supply terminal via two resistors connected in series, and the output transistor whose connection point is the output terminal. An electrical signal reference level conversion circuit comprising resistors connected in series, a base serving as the other power supply system selection terminal, an emitter connected to a signal input terminal, and a collector connected to the midpoint of the series connected resistors. .
JP16577988U 1988-12-23 1988-12-23 Reference level conversion circuit Expired - Lifetime JPH0724815Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16577988U JPH0724815Y2 (en) 1988-12-23 1988-12-23 Reference level conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16577988U JPH0724815Y2 (en) 1988-12-23 1988-12-23 Reference level conversion circuit

Publications (2)

Publication Number Publication Date
JPH0286228U true JPH0286228U (en) 1990-07-09
JPH0724815Y2 JPH0724815Y2 (en) 1995-06-05

Family

ID=31452576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16577988U Expired - Lifetime JPH0724815Y2 (en) 1988-12-23 1988-12-23 Reference level conversion circuit

Country Status (1)

Country Link
JP (1) JPH0724815Y2 (en)

Also Published As

Publication number Publication date
JPH0724815Y2 (en) 1995-06-05

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