JPH028126U - - Google Patents

Info

Publication number
JPH028126U
JPH028126U JP8520588U JP8520588U JPH028126U JP H028126 U JPH028126 U JP H028126U JP 8520588 U JP8520588 U JP 8520588U JP 8520588 U JP8520588 U JP 8520588U JP H028126 U JPH028126 U JP H028126U
Authority
JP
Japan
Prior art keywords
piezoelectric material
laminate
variable capacitance
dielectric
capacitance element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8520588U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8520588U priority Critical patent/JPH028126U/ja
Publication of JPH028126U publication Critical patent/JPH028126U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例(最小単位構成)と
しての可変容量素子を示す構成図、第2図はその
等価回路図、第3図は第1図の可変容量素子複数
個を積層構造として示す斜視図、第4図は第3図
の断面図、第5図はその場合における1組の可変
容量素子の電極形成を示す図、第6図はその分解
斜視図、第7図は本考案の他の実施例を示す断面
図、第8図はその場合の1組の等価回路図、第9
図は従来の可変容量素子を示す断面図である。 1……圧電体セラミツク(圧電体)、21……
第1の誘電体、22……第2の誘電体、31,3
2,33,34……第1,2,3,4の電極。
Figure 1 is a configuration diagram showing a variable capacitance element as an embodiment (minimum unit configuration) of the present invention, Figure 2 is its equivalent circuit diagram, and Figure 3 is a stacked structure of multiple variable capacitance elements of Figure 1. 4 is a sectional view of FIG. 3, FIG. 5 is a diagram showing the electrode formation of a set of variable capacitance elements in that case, FIG. 6 is an exploded perspective view thereof, and FIG. 7 is a cross-sectional view of FIG. A sectional view showing another embodiment of the invention, FIG. 8 is a set of equivalent circuit diagrams in that case, and FIG. 9 is a sectional view showing another embodiment of the invention.
The figure is a sectional view showing a conventional variable capacitance element. 1...Piezoelectric ceramic (piezoelectric material), 21...
First dielectric, 22...Second dielectric, 31,3
2, 33, 34...first, second, third, fourth electrodes.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 1つの圧電体と弾力性の異なる2種以上の誘電
体を1組として少なくとも1組以上が積層された
積層体の積層方向両側表面及び各圧電体、誘電体
の境界面には電極が形成されると共に、該積層体
全体が収納ケース内に収納されて、両端面間が一
定間隔に拘束されていることを特徴とする可変容
量素子。
Electrodes are formed on both surfaces in the stacking direction of a laminate in which at least one set of one piezoelectric material and two or more types of dielectric materials having different elasticities are laminated, and on the interface between each piezoelectric material and the dielectric material. A variable capacitance element characterized in that the entire laminate is housed in a storage case, and both end faces are constrained at a constant interval.
JP8520588U 1988-06-28 1988-06-28 Pending JPH028126U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8520588U JPH028126U (en) 1988-06-28 1988-06-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8520588U JPH028126U (en) 1988-06-28 1988-06-28

Publications (1)

Publication Number Publication Date
JPH028126U true JPH028126U (en) 1990-01-19

Family

ID=31309878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8520588U Pending JPH028126U (en) 1988-06-28 1988-06-28

Country Status (1)

Country Link
JP (1) JPH028126U (en)

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