JPH0279635A - Data transmission system - Google Patents

Abstract

PURPOSE:To suppress the extension of a transmission path and that of a circuit scale on a reception side by utilizing a synchronizing signal included in a video signal as a timing signal for fetching data. CONSTITUTION:The video signal 8 is inputted to a data reception parts 2, and the synchronizing signal is separated from the video signal 8 by a synchronizing and separator circuit 6, and the timing signal (c) for outputting data is outputted. Meanwhile, to a transmission part 1, a signal including the output period of the timing signal (c), for example, a video blanking signal (d) is inputted, and a data signal (a) and a clock signal (b) are transmitted so as to transmit a series of data signal sequence in one cycle of the video blanking signal (d). In such a manner it is possible to perform data transmission without extending a circuit to generate the timing signal for fetching the data as leaving two transmission paths occupied for serial data transmission as in video equipment.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transmission system between a control unit and a controlled unit that control signal processing in video equipment.

C. Prior Art] Data transmission requires five types of signals: a serial data signal, a clock signal for input timing of one bit of data, and a timing signal for capturing a series of data. A data transmission method is used.

The first method is to use three transmission lines, and each transmission line is made to correspond to the above-mentioned 3'Mi type signals. This method requires an increase in the number of transmission line circuits and transmission terminals.

The wE2 is a method of using two transmission lines, and there is, for example, a data transmission system as disclosed in Japanese Patent Application Laid-Open No. 55-161447. This method has a data signal on one side of the transmission line, and a data signal on the other side.
The device transmits a clock signal including a timing signal for data acquisition, and requires a circuit on the receiving side to separate the clock signal and the timing signal for acquisition.

The sixth method is to use a single transmission path, in which the three types of signals mentioned above are sent through one transmission path, and on the receiving side, the clock synchronization circuit and the timing synchronization circuit for capture are distributed unevenly, and each signal is completely separated and reproduced. It is something.

This method requires the highest signal processing capability on the transmitting side and the receiving side among the three methods described above, and increases the circuit size.

[Problems to be Solved by the Invention] The first prior art described above requires three transmission lines, and for example, if the receiving side is an IC, at least three receiving terminals are required, so the total number of terminals is reduced. There was a problem of causing an increase.

Further, although the above-mentioned WC2 and the third conventional technology can suppress the increase in the number of terminals described above, there is a problem in that a particularly high signal processing capability is required on the receiving side, causing an increase in the circuit scale on the receiving side.

The purpose of the present invention is to solve the above problems in video equipment,
It is an object of the present invention to provide a data transmission method that suppresses an increase in the number of transmission paths and also suppresses an increase in circuit scale on the receiving side.

[Means to solve the problem]

The above purpose is to send a data signal and a clock signal as input timing for one bit of data through two transmission lines, and to handle it between video devices or within the video device as a timing signal for taking in a series of data. This is achieved by using a synchronization signal included in a common video signal.

Note that in this specification, the term "video equipment" refers not only to the entire television set, etc. (but also to the I/O used therein).
It also includes C and circuits.

[Effect]

The serial data signal and clock signal are transmitted through two transmission lines as before, and the receiving side stores the serial data signal in a temporary storage register, and after determining that the reception of a series of serial data has been completed, the receiving side transmits the signal. The contents of the output register controlling the process t- are changed. Here, on the receiving side, in order to determine the end or beginning of a series of serial data, the determination is made based on the timing signal described above. In equipment that processes video signals, for example, a pedestal clamp pulse is used to perform DC reproduction of video signals, a burst gate signal is used to extract a burst signal that serves as a reference for color signal reproduction, or the timing for displaying video on the screen is determined. It uses a timing signal such as a deflection drive pulse that is based on a synchronization signal included in the video signal being processed. Devices and circuits that process video signals, that is, the receiving side of data transmission, use this timing signal as a timing signal for capturing the above-mentioned series of serial data, and the data transmitting side uses the timing signal used by each receiving side, This does not necessarily mean that the phase and time match, but if serial data is sent at a point that includes these, the receiving side can receive the data accurately without any circuit burden, and it is useful as a data transmission path. It can be composed of two pieces.

〔Example〕

Hereinafter, one embodiment of the present invention t-i! This will be explained with reference to FIGS. 1, 2, and 3.

In FIG. 1, consider data transmission between a data transmitter 1 that controls a peripheral device and a data receiver 2 that is a controlled side. First, the clock generation circuit 4 in the data transmitter 1
A clock signal b'6 is sent out, and in synchronization with this, a data signal af is sent out from a data generation circuit 3 that generates data. In the data receiving section 2, the data reproduction path 5 discriminates the data based on the received data signal a and the clock signal.
- time is stored, and data output t- is obtained in synchronization with the timing signal C. Here, the video signal 8 is inputted to the controlled device, that is, the data receiving section 2, which is the purpose of video signal processing, and the synchronization separation circuit 6 separates the synchronization signal from the video signal 8. Outputs timing signal cf. On the other hand, the transmitter 1 receives a signal that includes the output period of the timing signal C, for example, a video blanking signal d, and transmits a series of data signal sequences within one cycle of the video blanking signal d. The data signal a and the clock signal bt- are transmitted as follows.

Next, a more detailed explanation will be given using the timing chart of FIG. 2 of the various signals mentioned above.

The video blanking signal d input to the transmitter 1 is a signal that includes a change point of the timing signal C during the period from its rise to its fall. Therefore, the transmitter 1 starts transmitting the data signal a and the clock signal L after the falling edge of the video blanking signal d, and transmits a series of data signal strings (L) before the next rising edge of the video blanking signal d. (In FIG. 2, there is only one data signal sequence.) It is sufficient to send the signal so that t-transmission is completed. As a result, in the receiving section 2, the first bit of the received data received after the change point of the timing signal C generated internally is the beginning of a series of data signals, and Since reception of the data signal train has been completed, if the data reproducing circuit 5 receives the data signal train and outputs the temporarily stored data at this point, data output without error can be obtained. I can do it. Furthermore, by resetting the data reproducing circuit 5 immediately after data output, it is also possible to receive the data signal train transmitted in the next cycle.

Next, an embodiment of data transmission in a color television receiver will be explained with reference to FIG.

As a data transmitting section, a control microcomputer 19 having a channel selection function and a screen display function of characters and figures, etc., and as a data receiving section,
Consider a video processing IC 20i that processes signals such as image contrast, black level, and color saturation. The control microcomputer 19 receives a deflection pulse 15 for scanning the screen, and the blanking generation circuit 9 generates a blanking signal di indicating a non-video period. From this screen display generation circuit 10
generates a screen display function 16 to measure the time from the blanking signal d and output characters and graphics such as a channel number to a predetermined location on the screen, and displays the characters and graphics on the screen 18. Regarding data transmission, the clock generation circuit 4 sends out the clock signal bt- from the end of the blanking signal d, and the data generation circuit 3 which generates data in synchronization with this sends out the clock signal bt-, for example, to control the image contrast, that is, to control the video signal amplitude. A series of data signals a are sent out to control the amplification degree of.

On the other hand, in the video processing IC 20, the input video g
I! The signal 8 is DC-clamped in a clamp circuit 12 for DC reproduction, and further the video signal is amplified in a contrast circuit 13 to have a contrast specified by the contents of the data output cuff, and a video output 17 is outputted to the screen 1B. Display an image.

Here, the clamp pulse 14 for direct current reproduction of the video signal 8 is output after separating and phase-adjusting the synchronization signal from the video signal 8 in the synchronization separation circuit 6. Regarding data transmission, data signal a and clock signal are temporarily stored in register 1.
1 and is temporarily stored as a series of data. Furthermore, at the time of change of the clamp pulse 14, the data content of the temporary storage register 11 is input and held in the data reproducing circuit 5, the data content is discriminated, and the data output cuff for the image contrast control is output. Due to the above,
Amplitude control of the video signal in the video processing IC 20 is realized.

Here, the blanking signal d and the clamp pulse 14
It is clear from the nature of the video signal that a clamp pulse exists in the blanking signal indicating a non-video period, as shown in FIG. 2 (idl and ld).

Therefore, if the channel selection microcomputer 19 sends out a series of data signals at the end of the blanking signal d, that is, within the video period, the video processing IC 20 captures the data into the data reproducing circuit 5 at the time the clamp pulse 14 changes. This makes it possible to reliably reproduce data as described above.

As mentioned above, there are only two transmission paths occupied for data transmission between the transmitting section and the receiving section: the data signal and the clock signal, and the circuit that creates the timing signal for data acquisition is used within the video signal processing circuit. By sharing the circuit with the same circuit, error-free data transmission can be performed without increasing the circuit scale.

Although the present embodiment has been described assuming that there is one receiving side, it will be easily understood that data transmission is possible even when there is a plurality of receiving sides.

Also, in the embodiment, only one series of data is sent within one period of the timing signal, but a code that specifies the receiving side is inserted into the data, and the data reproducing circuit of the receiving section identifies this. If a code that is not specified by the function is identified, data output is prohibited and re-reception is performed, or the order of the data strings and the receiving side are changed among the multiple data strings. A plurality of series of data may be transmitted within one cycle of the timing signal, as long as the receiving side is provided with a function to receive only the data in the specified order.

〔Effect of the invention〕

According to the present invention, the number of transmission lines occupied for serial data transmission in video equipment remains two, and there is no need to increase the circuit for creating a timing signal for data acquisition (data transmission can be performed). , has economic effects.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing data transmission in an embodiment of the present invention. FIG. 2 is a timing chart of signals of each part in the block diagram of FIG. 1, and FIG. 3 is a block diagram including peripheral parts.

Claims (1)

[Claims] 1. In a data transmission system for video equipment that transmits a data signal and a clock signal for data synchronization using separate transmission paths, timing based on a video synchronization signal included in the video signal A timing signal generation circuit that generates a signal is provided in the reception section, a second timing signal generation circuit that generates a second timing signal that temporally encompasses the timing signal is provided in the transmission section, and a series of data signal sequences are provided. A data transmission system for video equipment, characterized in that a transmitting section transmits in synchronization with a second timing signal, and a receiving section receives in synchronization with a first timing signal. 2. The data transmission system according to claim 1, wherein the second timing signal is a blanking signal. 3. In a data transmission system for video equipment in which a data signal and a clock signal for data synchronization are transmitted using separate transmission paths, the data transmitting and receiving unit transmits a predetermined period of time using the vertical and horizontal synchronization signals of the incoming video signal. 1. A data transmission system for video equipment, characterized in that a circuit for determining is provided, a transmitter transmits a series of data signal sequences during the predetermined period, and a receiver receives data.