JPH0278322A - Loop switching circuit for phase locked loop oscillator - Google Patents

Loop switching circuit for phase locked loop oscillator

Info

Publication number
JPH0278322A
JPH0278322A JP63228505A JP22850588A JPH0278322A JP H0278322 A JPH0278322 A JP H0278322A JP 63228505 A JP63228505 A JP 63228505A JP 22850588 A JP22850588 A JP 22850588A JP H0278322 A JPH0278322 A JP H0278322A
Authority
JP
Japan
Prior art keywords
loop
capacitor
resistor
circuit
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63228505A
Other languages
Japanese (ja)
Inventor
Toru Matsuki
徹 松木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63228505A priority Critical patent/JPH0278322A/en
Publication of JPH0278322A publication Critical patent/JPH0278322A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To shorten loop locking time regardless of the limit of the power supply of a charge pump and of the supply capability by providing a switching circuit to a position where a capacitor and a resistor being components of a lag lead filter is short-circuited or opened. CONSTITUTION:The circuit consists of a digital phase comparator 2 detecting a phase difference of outputs between a reference oscillator 1 and a voltage controlled oscillator 4, a charge pump 3 converting the output into an analog voltage, resistors 7, 8 and a capacitor 9. Then an abnormal detection circuit 5 detecting the unlocked state of a loop is provided on a PLL circuit having the lag lead loop filter receiving an output of the charge pump 3 and outputting an APC voltage controlling the oscillated frequency of the oscillator 4. A switch 10 is arranged between the resistor 8 and the capacitor 9, disconnects the resistor 8 and the capacitor 9 in the case of the loop unlock by an output signal from the circuit 5 and short-circuits the resistor 8 and the capacitor 9 in the case of loop lock to switch the loop gain.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、位相同期発振回路に関し、特にループ切替回
路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a phase-locked oscillation circuit, and particularly to a loop switching circuit.

[従来の技術] 従来のこの種のループ切替回路は、第2図に示すように
、基準発振器lの出力及び電圧制御発振器4の出力の位
相差を検出するデジタル位相比較器2と、デジタル位相
比較器2のデジタルIB力をアナログ電圧に変換して出
力するチャーシボ〉・プ3と、抵抗7.抵抗8.コンデ
ンサ9で構成されかつ、チャージポンプ3から出力され
るアナログ電圧を入力とするとともに、電圧制御発振器
4の発振周波数を制御するためのAPC電圧を出力する
ラグリード型ループフィルタを有するPLL回路におい
て用いていた。そして、デジタル位相比較器2の出力を
使用してループのアンロック状態を検出する異常検出回
路5と、この異常検出回路5からの出力制御信号により
、ループアンロック時には抵抗8の両端がショートとな
り、ループロック時には抵抗8の両端がオープンとなる
ようアナログスイッチ6を抵抗8に並列に接続してルー
プゲインの切替を行っていた。
[Prior Art] As shown in FIG. 2, a conventional loop switching circuit of this type includes a digital phase comparator 2 that detects the phase difference between the output of a reference oscillator l and the output of a voltage controlled oscillator 4, and a digital phase A charger voltage output 3 that converts the digital IB power of the comparator 2 into an analog voltage and outputs it, and a resistor 7. Resistance 8. It is used in a PLL circuit comprising a capacitor 9 and having a lag-lead loop filter that inputs an analog voltage output from a charge pump 3 and outputs an APC voltage for controlling the oscillation frequency of a voltage controlled oscillator 4. Ta. An abnormality detection circuit 5 uses the output of the digital phase comparator 2 to detect the unlocked state of the loop, and an output control signal from this abnormality detection circuit 5 shorts both ends of the resistor 8 when the loop is unlocked. When the loop is locked, the analog switch 6 is connected in parallel to the resistor 8 so that both ends of the resistor 8 are open to switch the loop gain.

この切替回路によってループのアンロック時には、上述
のアナログスイッチ6がショートとなり、ループゲイン
が上がり所要の周波数にすばや〈引き込むことが可11
Aとなっている。
When the loop is unlocked by this switching circuit, the analog switch 6 described above is short-circuited, and the loop gain increases, making it possible to quickly reach the desired frequency.
It is A.

[解決すべき課題] 上述した従来のループ切替回路は、ループアンロック時
態となり、抵抗8の両端がアナログスイッチ6によりシ
ョートされた場合にも、コンデンサ9がチャージポンプ
3に接続されている。ここでチャージポンプ3がコンデ
ンサ9に対し充電可能な能力は、チャージポンプ3の電
源供給能力によって決定し、かつチャージポンプ3の電
源供給能力には、限界がある。従って、コンデンサ9に
充電可能な能力には限界があり、この限界ループ引き込
み時間を長くする、という欠点があつた。
[Problems to be Solved] In the conventional loop switching circuit described above, even when the loop is unlocked and both ends of the resistor 8 are shorted by the analog switch 6, the capacitor 9 is connected to the charge pump 3. Here, the ability of the charge pump 3 to charge the capacitor 9 is determined by the power supply capacity of the charge pump 3, and the power supply capacity of the charge pump 3 has a limit. Therefore, there is a limit to the ability to charge the capacitor 9, and this limit loop pull-in time is lengthened.

また、ループロック時にループゲインを下げる必要があ
る場合は、特にコンデンサ9の容量が大きくなり、上述
の欠点がきわ立ってくるという問題があった。
Further, when the loop gain needs to be lowered when the loop is locked, the capacitance of the capacitor 9 becomes particularly large, which causes the problem that the above-mentioned drawback becomes more pronounced.

本発明は上述した問題点にかんがみてなされたもので、
ラグリードフィルタを構成するコンデンサと抵抗の間が
短絡または、開放可能となる位置に切替回路を設けるこ
とにより、チャージポンプの電源供給能力の限界にかか
わらず、ループ引き込み時間を短くすることを可能とす
る位相同期発振器のループ切替回路の提供を目的とする
The present invention has been made in view of the above-mentioned problems.
By providing a switching circuit in a position where the capacitor and resistor that make up the lag lead filter can be short-circuited or opened, it is possible to shorten the loop pull-in time regardless of the limit of the charge pump's power supply capacity. The purpose of the present invention is to provide a loop switching circuit for a phase-locked oscillator.

[課題の解決手段] 上記目的を達成するために、本発明の位相同期発振器の
ループ切替回路は、基準発振器の出力及び電圧制御発振
器の出力を入力とする位相比較器と、この位相比較器の
出力信号を入力とするチャージポンプと、このチャージ
ポンプの出力信号を入力とし、かつ前記電圧制御発振器
発振周波数を制御するためのAPC電圧を出力するラグ
リード型ループフィルタを宥する位相同期発振回路にお
いて、前記ラグリード型ループフィルタの抵抗とコンデ
ンサとの間が短絡または開放可taとなる位置に切替回
路を設けることを特徴とした構成としである。
[Means for Solving the Problems] In order to achieve the above object, a loop switching circuit for a phase-locked oscillator according to the present invention includes a phase comparator that receives the output of a reference oscillator and the output of a voltage-controlled oscillator, and In a phase-locked oscillator circuit that includes a charge pump that receives an output signal as an input, and a lag-lead loop filter that receives the output signal of the charge pump as an input and outputs an APC voltage for controlling the oscillation frequency of the voltage-controlled oscillator, The configuration is characterized in that a switching circuit is provided at a position where a short circuit or an open circuit can occur between the resistor and the capacitor of the lag lead type loop filter.

[実施例] 以下5本発明の実施例について第1図を参照して説明す
る。なお、従来と共通する部分には共通する符号を付し
て説明する。
[Example] Five examples of the present invention will be described below with reference to FIG. In addition, common reference numerals are given to parts that are common to the conventional art and will be explained.

第1図は本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.

図示の回路は、基準発振器lの出力及び電圧制御発振器
4の出力の位相差を検出するデジタル位相比較器2と、
このデジタル位相比較器2のデジタル出力をアナログ電
圧に変換して出力するチャージポンプ3と、抵抗7.抵
抗8.コンデンサ9テJJImされかつ、チャージポン
プ3から出力されるアナログ電圧を入力とするとともに
、電圧制御発振gA4の発振周波数を制御するためのA
rc電圧を出力するラグリード型ループフィルタを有す
るPLL回路であり、デジタル位相比較器2の出力を使
用してループのアンロック状態を検出する異常検出回路
5g4える。
The illustrated circuit includes a digital phase comparator 2 that detects the phase difference between the output of the reference oscillator l and the output of the voltage controlled oscillator 4;
A charge pump 3 converts the digital output of the digital phase comparator 2 into an analog voltage and outputs it, and a resistor 7. Resistance 8. The analog voltage output from the charge pump 3 is input to the capacitor 9 and is used to control the oscillation frequency of the voltage controlled oscillation gA4.
The abnormality detection circuit 5g4 is a PLL circuit having a lag lead type loop filter that outputs an rc voltage, and uses the output of the digital phase comparator 2 to detect the unlocked state of the loop.

アナログスイッチlOは抵抗8とコンデンサ9との間に
配され、異常検出回路5からの出力制御信号により、ル
ープアンロック時には、抵抗8とコンデンサ9間を開放
し、またループロック時には、抵抗8とコンデンサ9間
を短絡するように接続してあり、ループゲインの切替を
行うようになって一1/)る。
The analog switch IO is arranged between the resistor 8 and the capacitor 9, and in response to the output control signal from the abnormality detection circuit 5, opens the resistor 8 and the capacitor 9 when the loop is unlocked, and opens the resistor 8 and the capacitor 9 when the loop is locked. The capacitors 9 are connected so as to be short-circuited, and the loop gain is switched.

[発明の効果] 以上説明したように本発明は、PLL回路のラグリード
型ループフィルタを構成するコンデンサと抵抗の間が短
絡は開放可能となる位置に切替回路を設けることにより
、チャージポンプの電源供給能力にかかわらず、ループ
ゲインを十分上げ。
[Effects of the Invention] As explained above, the present invention provides power supply to a charge pump by providing a switching circuit at a position where a short circuit between a capacitor and a resistor that constitutes a lagged-lead loop filter of a PLL circuit can be released. Regardless of your ability, increase the loop gain sufficiently.

引き込み時間を短くすることができるという効果がある
This has the effect of shortening the pull-in time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のブロック図、第2図は従来のループ切
替回路のブロック図である。 l:基準発振器 2:デジタル位相比較器 3:チャージポンプ 4:電圧制御発振器 5:異常検出回路 7:抵抗 8:抵抗 9:コンデンサ 10:アナログスイッチ
FIG. 1 is a block diagram of the present invention, and FIG. 2 is a block diagram of a conventional loop switching circuit. l: Reference oscillator 2: Digital phase comparator 3: Charge pump 4: Voltage controlled oscillator 5: Abnormality detection circuit 7: Resistor 8: Resistor 9: Capacitor 10: Analog switch

Claims (1)

【特許請求の範囲】[Claims] 基準発振器の出力及び電圧制御発振器の出力を入力とす
る位相比較器と、この位相比較器の出力信号を入力とす
るチャージポンプと、このチャージポンプの出力信号を
入力とし、かつ前記電圧制御発振器発振周波数を制御す
るためのAPC電圧を出力するラグリード型ループフィ
ルタを有する位相同期発振回路において、前記ラグリー
ド型ループフィルタの抵抗とコンデンサとの間が短絡ま
たは開放可能となる位置に切替回路を設けることを特徴
とした位相同期発振器のループ切替回路。
a phase comparator that receives the output of the reference oscillator and the output of the voltage-controlled oscillator; a charge pump that receives the output signal of this phase comparator; In a phase-locked oscillator circuit having a lag-lead loop filter that outputs an APC voltage for frequency control, a switching circuit is provided at a position where a resistor and a capacitor of the lag-lead loop filter can be short-circuited or opened. Features a phase-locked oscillator loop switching circuit.
JP63228505A 1988-09-14 1988-09-14 Loop switching circuit for phase locked loop oscillator Pending JPH0278322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63228505A JPH0278322A (en) 1988-09-14 1988-09-14 Loop switching circuit for phase locked loop oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63228505A JPH0278322A (en) 1988-09-14 1988-09-14 Loop switching circuit for phase locked loop oscillator

Publications (1)

Publication Number Publication Date
JPH0278322A true JPH0278322A (en) 1990-03-19

Family

ID=16877495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63228505A Pending JPH0278322A (en) 1988-09-14 1988-09-14 Loop switching circuit for phase locked loop oscillator

Country Status (1)

Country Link
JP (1) JPH0278322A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04165717A (en) * 1990-10-29 1992-06-11 Nec Eng Ltd Phase locked loop circuit
JPH0511549U (en) * 1991-07-29 1993-02-12 株式会社ケンウツド Phase locked loop circuit
KR100502461B1 (en) * 1996-11-29 2005-10-25 소니 가부시끼 가이샤 Phase-locked loop circuit and its regenerator
CN108075773A (en) * 2016-11-14 2018-05-25 中芯国际集成电路制造(上海)有限公司 For the start-up circuit and phaselocked loop of phaselocked loop

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04165717A (en) * 1990-10-29 1992-06-11 Nec Eng Ltd Phase locked loop circuit
JPH0511549U (en) * 1991-07-29 1993-02-12 株式会社ケンウツド Phase locked loop circuit
KR100502461B1 (en) * 1996-11-29 2005-10-25 소니 가부시끼 가이샤 Phase-locked loop circuit and its regenerator
CN108075773A (en) * 2016-11-14 2018-05-25 中芯国际集成电路制造(上海)有限公司 For the start-up circuit and phaselocked loop of phaselocked loop
CN108075773B (en) * 2016-11-14 2021-04-02 中芯国际集成电路制造(上海)有限公司 Starting circuit for phase-locked loop and phase-locked loop

Similar Documents

Publication Publication Date Title
US7019569B2 (en) Method of implementing multi-transfer curve phase lock loop
CA1215751A (en) Phase lock loop circuit
JP2005500729A (en) Frequency synthesizer with 3 mode loop filter charging
WO2008092154B1 (en) System and method to extend synchronous operation of an active converter in a variable speed drive
JPS61258529A (en) Frequency synthesizer
PH26533A (en) Phase detector
WO2008100378A1 (en) Plls covering wide operating frequency ranges
JPH0278322A (en) Loop switching circuit for phase locked loop oscillator
JP2644890B2 (en) Phase locked loop
JP2001339300A (en) Pll frequency synthesizer
JPH10209859A (en) Pll circuit
JPH0718188Y2 (en) Phase locked loop circuit
JPH0786930A (en) Phase locked loop circuit
JP2705544B2 (en) Phase locked loop
JP3560906B2 (en) PLL circuit
JPS63204906A (en) Abnormal lock detection circuit
JPH02111123A (en) Synchronizing circuit of variable frequency oscillator
JPS61134127A (en) Phase synchronous type modulator
JPH0371721A (en) Phase synchronizing circuit
JPH0488721A (en) Frequency synthesizer
JPH0546357Y2 (en)
JPH0362730A (en) Frequency synthesizer
JPS62216528A (en) Phase locked loop circuit
JPH0338113A (en) Phase locked loop circuit
JPH06314971A (en) Loop filter for pll circuit