JPH0276361A - Line sensor - Google Patents

Abstract

PURPOSE:To attain high sensitivity to a monochroic picture processing by providing a monochroic picture processing system close to a color picture processing system in addition and outputting selectively a signal of the color picture processing system and a signal of the monochroic picture processing system depending on the application. CONSTITUTION:Sensors outputting respectively a red(R) picture signal Rout, a green(G) picture signal Gout, and a blue(B) picture signal Bout, are provided to the color picture processing system. A sensor outputting a picture signal Wout for monochroic picture is provided in addition. ln the case of using the line sensors for a color copying machine, output signals Rout, Gout, and Bout from the R, G and B line sensors for the color copying. In the case of applying monochroic copying on the other hand, the output signal Wout from the line sensor for the monochroic signal W is used. Since no subtractive filter is in use for the monochroic line sensor as above, the light utilizing rate is increased and the high sensitivity is attained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state image pickup device, and relates to a technology that is effective when applied to a color line sensor having a C0D (charge transfer device) transfer circuit.

[Conventional technology]

A CCD line sensor is known that serially outputs pixel signals photoelectrically converted by a photodiode array using a COD transfer circuit (analog shift register). Regarding such a CCD line sensor, for example,
Nikkei McGraw-Hill, November 9, 1981, "Nikkei Electronics 1, pages 140 to 157.

[Problem to be solved by the invention]

A color line sensor used in a color copying machine consists of R (red), G (green), and B (blue) line sensors arranged in a line. Each of the above RSG and B filters is a subtractive color filter, and with a structure in which 3 lines are provided in parallel, when copying a monochrome image, the resolution sensitivity may decrease or the light utilization rate may decrease, similar to when copying a color image. Since the signal accumulation time is poor, the sensitivity decreases, so it is necessary to set a large signal accumulation time. That is, there is a problem in that the scanning speed needs to be slower than that of a monochrome-only copying machine.

An object of the present invention is to provide a multifunctional line sensor that has a simple configuration and achieves high sensitivity depending on the application.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, a monochrome image processing system is installed adjacent to the color image processing system.

[For production]

According to the above-mentioned means, by selectively outputting color image system and monochrome image system signals according to the purpose,
High sensitivity can be achieved for monochrome image processing.

[Embodiment] FIG. 1 shows a block diagram of an embodiment of a line sensor according to the present invention. Each circuit block in the same figure is
It is drawn according to the actual geometric arrangement on the semiconductor substrate.

In this embodiment, red (R) is used as a color image processing system.
Each sensor is provided to output an image signal Rout, a green (B) image signal Gout, and a blue (B) image signal Bout, respectively. In addition to this, a sensor is provided that outputs an image signal Wout for a monochrome image.

When this line sensor is used in a color copying machine, the output signals Rout % Gout and Bout from each of the R, G, and B line sensors are used when performing color copying.

On the other hand, when performing monochrome copying, the output signal Wout from the monochrome W line sensor is used. Since this monochrome line sensor is not provided with a subtractive color filter as described above, it has a high light utilization rate and can achieve high sensitivity.

In color image processing, instead of using the red output signal Rout, a red signal obtained by subtracting green (G) and blue (B) signals from the monochrome signal W is used. That is, R
=W-CG+B). In this case, since the monochrome signal W has a large signal amount, its S/N ratio can be high, and as a result, noise can be reduced in appearance.

By reducing noise in this manner, sensitivity can be increased accordingly.

Note that the output signal Rou from the R line is used as the red signal.
The same applies to the other color signals G and B, which may be obtained by adding t and WouL - Gout - Bout.

FIG. 2 shows a circuit diagram of the main parts of the above-mentioned one line sensor.

Photodiodes Di, D2 to D as photoelectric conversion elements
3 are arranged laterally side by side as illustratively shown. As a result, the photodiodes D1 to D
7 constitute a one-dimensional photodiode array by arranging them in - columns. Above photodiode D1
The anode electrode side of ~D3 is coupled to the ground potential point of the circuit.

The electrode on the source side of the photodiode D1 is coupled to the semiconductor region under the storage gate of the corresponding transfer stage of the transfer circuit COD through the MO3FET QI as a gate means and the transfer MO3FET Q2, although it is not particularly limited. The cathode electrodes of the other exemplified photodiodes D2 and D3 are also MO3FETQ3 in the same manner as above.
, Q4, Q5, and Q6 to the corresponding transfer stage of the transfer circuit COD. MO3FE'r"Ql above
, Q3, and Q5 are commonly supplied with a timing pulse PG. Furthermore, a timing pulse TG for transfer is commonly supplied to the gates of MO3FETs Q2, Q4, and Q6. Although not particularly limited, the timing pulse PG is a 5V timing pulse, and the transfer timing pulse TG is a 12V timing pulse.

In addition, in the above photodiode array, the transfer circuit C, which will be described later, for the area occupied by one photodiode
When the length of the CCD transfer channel in units of OD is large, in order to arrange the photodiodes at high density,
The transfer circuit COD may be arranged vertically with respect to the photodiode array, that is,
The read signals from the odd-numbered photodiodes DI, etc. may be transferred by the transfer circuit COD placed on the upper side, and the read signals from the photodiodes D2, etc. in the even-numbered stages may be transferred by the transfer circuit COD placed on the lower side. In this case, depending on the division of the transfer circuit COD, corresponding MOS FETs are arranged in upper and lower halves.

As described above, when the transfer circuits COD are arranged one above the other, the timing pulses PC and TG are commonly supplied to the MOSFETs arranged in the upper and lower parts. However, the timing pulse φl supplied to COD
and φ2 need to have different phases between the upper COD and the lower COD. In other words, different timing pulses are supplied in order to output transfer signals alternately.

The output section of the transfer circuit COD is provided with an output amplifier PA for converting a signal in the form of a charge into a voltage signal,
Rou corresponding to the filter provided in the photodiode is connected from the output terminal OUT through this output amplifier PA.
t, Gout5BouL, and Wout signals are obtained.

FIG. 3 shows a sectional view of one embodiment of the transfer circuit COD, and FIG. 4 shows its pattern diagram.

In a COD transfer path, a transfer channel through which electrons (or holes) can easily pass is created in a silicon substrate. An oxide film is sandwiched on the surface of the silicon substrate, and as shown in the cross-sectional view of FIG. 3 and the pattern diagram of FIG.
. . . and storage gates IB, 2B, 3B, 4B, . . . are formed. Transfer game) IA, 2A, 3A, 4A...lower channel and storage gate IB, 2B, 3B, 4B...
・The impurity concentration is different from the lower channel, and when no voltage is applied to the gate, a difference occurs in the internal potential, and the accumulation gates IB, 2B, 3B, 4B... electrons (or holes) ) are easy to collect.

Now, if we apply an appropriate voltage to the gate on the surface of the silicon substrate and make the potential for the charges in the transfer channel into a "wave" shape, then
gather in the valley of If the voltage applied to the gate is made into a pulse and the potential is appropriately changed to high/low potential, and if the above-mentioned "wave" shape can move in one direction, the charges gathered at the troughs of the "wave" can be transferred into the transfer channel.

The case where electrons are used as transfer charges will be described below. The case where holes are used as a transferred charge can be easily inferred from the case where electrons are used as a transferred charge, so the explanation is omitted.

As shown in FIGS. 3 and 4 above, an oxide film is formed on the surface of a P-type silicon substrate leaving a channel width, and phosphorus atom ions are implanted by ion implantation. Then, heat treatment is performed to form a channel width of about 0.7 μm. Form an N-type conductive channel (electrons are the main charged electrons) with a thickness of about 100 mL in the depth direction. Next, the entire surface is oxidized, and a silicon oxide film of 350 to 1000 layers is formed on the channel surface. form. A polysilicon film having a thickness of about 0.5 μm is laminated on the oxide film, and storage gates IB, 2B, 3B, 4B, . . . are formed by photolithography.

The gate length is normally 1.5 to 3 μm using current manufacturing technology. In the future, with the advancement of microfabrication technology, 1.0μ
m, 0.8 μm, 0.5 μm, etc. Each of these storage gates IB, 2B.

The repetition pitch of 3B, 4B... is 1. of the gate length.
It is 5 to 2.0 times. Each of the above accumulation games) IB.

Boron atom ions are implanted between 2B, 3B, 4B, etc. to slightly cancel the N-type conductivity, and transfer gates IA, 2A, 3A are formed above them.

Similarly to the storage gate, an oxide film and a polysilicon film are formed using the photolithography technique.

The transfer gate and the storage gate are adjacent to each other, i.e., I
A and 113, 2A and 2B, 3A and 3B 14A and 4B...
- are combined so that the same potential is applied at the same timing, and these electrode groups are divided into two groups every other group, and a low potential (for example, OV) is applied to one, and a high potential (12V) is applied to the other. give. That is, a drive clock pulse φ1 is supplied to the above-mentioned gates 1-IA and IB and 3A and 3B, and a drive clock pulse φ2 is supplied to the above-mentioned gates 2A and 2B and 4A and 4B.

For example, if the drive clock pulse φl is Ov and the drive clock pulse φ2 is 12V, the internal potential for electrons (hereinafter referred to as electron As we proceed with the discussion, a distribution (simply called internal potential) is formed. This also applies to similar transfer gates 3A, storage gates 3B, transfer gates 4A, and storage gates 4B. As a result, charges are collected in the valley portion, and if we focus on electrons, the electrons to be transferred will be collected under the storage gates 2B and 4B, which have the highest potential.

Next, when the drive clock pulse φ1 is set to 12V and the drive clock pulse φ2 is set to OV, a potential distribution that decreases stepwise in the order of the transfer gate 2A, the storage gate 2B5, the transfer gate 3A1, and the storage gate 3B is formed.

As a result, the electrons under the storage data 1-2B are transferred to the lowest internal potential section under the storage gate 3B. The electrons in the storage gate 4B are transferred to a similar storage gate (not shown) located on the right side of the figure.

Then, when the drive clock pulse φl is set to OV and the drive clock pulse φ2 is set to 12V again, the internal potential distribution as described above is restored, so that the electrons under the storage gate 3B are transferred to the storage gate 4B. A transfer operation for one bit is performed in one cycle of the drive clock pulse φ1 (φ2). That is, it operates as an analog shift register configured with two-phase clock signals.

The effects obtained from the above examples are as follows. In other words, by installing a monochrome image processing system adjacent to the +11 color image processing system and selectively outputting signals for color and monochrome image systems depending on the application, it is possible to achieve high sensitivity for monochrome image processing. This has the effect of being able to create

(2) The above monochrome photodiode is W=R+G
+B relationship is established, for example, R=W-(G+B
) by forming a red light as a monochrome signal W
Since the signal amount is large, the S/N ratio can be increased correspondingly, and as a result, the effect of apparently reducing noise can be obtained.

(3) As a color image signal, the signal amount can be increased by adding the output signal from the corresponding color line and the monochrome image signal minus other color signals, so the sensitivity of the color signal can be increased. The effect is that it becomes possible.

Although the invention made by the present inventor has been specifically explained above based on examples, it goes without saying that this invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. For example, the photodiode signal may be output using a MOSFET instead of using the COD transfer circuit as described above.

In other words, a configuration may be adopted in which signals from photodiodes arranged in a line are outputted via a switch MO3FET by utilizing the technology of an MO3 type solid-state image sensor.

This invention can be widely used as a color/monochrome line sensor.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows. In other words, by installing a monochrome image processing system close to the color image processing system and selectively outputting color and monochrome image signals depending on the application, high sensitivity can be achieved for monochrome image processing. can.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram showing one embodiment of a line sensor according to the present invention, FIG. 2 is a main circuit diagram showing one embodiment of one of the line sensors, and FIG. 3 is a schematic block diagram of one embodiment of a COD. A sectional view showing an example, FIG.
It is a pattern diagram which shows one Example of said COD. COD...Transfer circuit (charge transfer element), PA...Preamplifier, Q1~Q6...MOSFET, D1~D3...Photodiode 1st Figure PA: Allianz

Claims (1)

[Scope of Claims] 1. A line sensor comprising: a line sensor that outputs a color image signal corresponding to a color filter provided; and a line sensor that outputs a monochrome image signal without a filter. 2. A line sensor characterized in that the one color reproduction signal is formed by subtracting another color image signal corresponding thereto from a monochrome image signal. 3. A line sensor characterized in that the line sensor is constituted by one semiconductor integrated circuit device.