JPH027437A - Manufacture of silicon substrate - Google Patents

Abstract

PURPOSE:To obtain an Si substrate whose irregularity is small and whose IG capacity is high in a short process and at a low cost by a method wherein the silicon substrate having a prescribed interstitial oxygen concentration is heat-treated at a prescribed temperature. CONSTITUTION:A CZ substrate containing interstitial oxygen at a high concentration (16.5 to 19.5X10<17>atoms/cm<3>) is heat-treated in one stage at 1100 deg.C for three to ten hours. When the CZ substrate 1 is heat-treated, e.g., at 1200 deg.C for five hours, a region 4, in about 70mum, of a low interstitial oxygen concentration is formed in a surface layer of the CZ substrate 1; a latent oxygen precipitation nucleus 3 becomes a reduced oxygen precipitation nucleus 5. Since a smaller nucleus out of the latent oxygen precipitation nucleus 3 disappears, a density of the reduced oxygen precipitation nucleus 5 becomes lower than that of the latent oxygen precipitation nucleus 3. After that, when a heat treatment corresponding to oxidation, diffusion and the like in an electronic device production process is executed, interstitial oxygen including mainly the reduced oxygen precipitation nucleus 5 is precipitated and becomes an oxygen precipitate 6 such as silica or the like. In addition, the low oxygen concentration region 4 becomes a denuded zone DZ 7 on the surface.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a silicon substrate, and in particular, to a method for manufacturing a silicon substrate.
The present invention relates to a method of manufacturing a silicon substrate with high tering ability.

[Conventional technology]

Today's electronic devices such as ultra-highly integrated memory elements are mainly
It is manufactured on a Si substrate (CZ substrate) cut out from a Si single crystal grown by the Czochralski method. The C2 substrate has the characteristics of 1 to 2 x 10” atoms
Contains interstitial oxygen of approximately s/cJ in a supersaturated state, and this interstitial oxygen can potentially form nuclei (vacancies) present in the C2 substrate through subsequent heat treatment (for example, oxidation diffusion in the electronic device manufacturing process). etc.) becomes oxygen precipitates such as silica.

Such oxygen precipitation introduces a large strain field to the surrounding crystal lattice, generating dislocations called punch-out dislocations, and stacking faults due to interstitial Si generated during the oxygen precipitation process. things are known. These may be collectively referred to as internal defects.

If dislocations and stacking faults due to the precipitation of interstitial oxygen as described above occur in areas where electronic devices are not formed, then
Contaminants (e.g. iron, copper) that are introduced into the C2 substrate during the electronic device manufacturing process.

Gettering captures and fixes heavy metals such as nickel
1. This leads to improvements in the electrical characteristics of electronic devices and increases in yield. This phenomenon is called intrinsic gettering (Int-rins gettering).
It is called ic gettingtering (IG) and is applied as one of the manufacturing techniques for today's electronic devices.

Natural (Natural) technology that attempts to perform the above-mentioned gettering only by heat treatment during the electronic device manufacturing process without performing any special heat treatment before the electronic device manufacturing process.
al) IG, and the IG capacity is controlled mainly by controlling the initial oxygen concentration during pulling of the Si single crystal.

In addition, before the electronic device manufacturing process, after diffusing interstitial oxygen on the C2 substrate surface to the outside of the CZ substrate at a high temperature of about 1100°C or higher and reducing potential oxygen precipitation nuclei,
A method is also known in which oxygen precipitation nuclei are formed again at a low temperature of about 00° C. to 800° C. to promote oxygen precipitation in a subsequent process. In this method, since the concentration of interstitial oxygen on the surface of the C2 substrate is reduced by the initial high-temperature treatment, the surface layer of the C2 substrate is a denuded layer in which crystal defects due to oxygen precipitation do not occur.
A Denuded Zone (DZ) is formed. A C2 substrate in which a DZ is formed on the surface layer of the C7 substrate and crystal defects due to oxygen precipitation are introduced into the C7 substrate through two-step heat treatment at high and low temperatures is called a DZIG substrate.

Note that the interstitial oxygen concentration described here is a value measured by infrared spectroscopy, and the conversion factor used is 4.81×1017 specified by the old ASTM. From then on,
This method is used in all cases where the interstitial oxygen concentration is described.

[Problem to be solved by the invention]

In the above-mentioned natural IG, C2 with an initial interstitial oxygen concentration (e.g., about 15 x 10" atoms/ait) is suitable for the heat treatment conditions in the subsequent electronic device manufacturing process.
We are trying to control the amount of interstitial oxygen precipitated by using a substrate, but since the thermal history during pulling of a Si single crystal differs depending on the position of the pulled ingot, it is difficult to completely control the distribution of potential oxygen precipitated nuclei. There are many difficulties, therefore,
Large variations tend to occur in the amount of interstitial oxygen precipitated. Furthermore, since interstitial oxygen exists in the surface layer of the CZ substrate in an amount equal to that in the interior, crystal defects (protrusion defects) due to oxygen precipitation are likely to occur in the active region of the electronic device. As described above, variations in oxygen precipitation and protrusion defects are problems with natural IG.

On the other hand, in DZIG, the problem of protrusion defects has been improved. However, deeper than the DZ, it is necessary for oxygen precipitation to proceed sufficiently in order to obtain sufficient IG ability, and the oxygen concentration in the remaining interstitial spaces decreases significantly. A decrease in the interstitial oxygen concentration means a decrease in the mechanical strength of the Si substrate.
This causes warping of the i-substrate and slip dislocation, which adversely affects yield. Further, in general, the two-stage heat treatment of DZIG requires 3 to 5 hours for the first stage high temperature treatment and several hours to ten or more hours for the second stage low temperature treatment, which poses problems in terms of productivity and cost.

[Means to solve the problem]

The method for manufacturing a Si substrate of the present invention has a high concentration of interstitial oxygen (16,5 to 19.
C7 contained in 5 X I O"atoms/ai?)
It is characterized by subjecting the substrate to one-stage heat treatment at 1100° or higher for 3 to 10 hours. It is also possible to epitaxially grow silicon on a substrate heat-treated in this manner.

According to the present invention, a Si substrate with small variations and high IG performance can be realized in a short process and at low cost.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a longitudinal sectional view of an embodiment of the present invention.

In FIG. 1(A), 1 is a CZ substrate, 2 is an 18
It is an interstitial oxygen atom contained at a concentration of X 10 ''atoms/ant, and 3 is a potential oxygen precipitation nucleus.

By subjecting this CZ substrate 1 to heat treatment at 1200° C. for 5 hours, a region 4 with a low interstitial oxygen concentration of approximately 70 μm is formed in the surface layer of the CZ substrate 1, as shown in FIG. 1(B). The potential oxygen precipitation nuclei 3 shown in FIG. 1(A) become reduced oxygen precipitation nuclei 5.

At this time, since the smaller ones among the potential oxygen precipitation nuclei 3 disappear, the density of the reduced oxygen precipitation nuclei 5 becomes lower than the density of the potential oxygen precipitation nuclei 3.

After this, heat treatment corresponding to oxidation, diffusion, etc. in the electronic device manufacturing process is applied, resulting in the process shown in Figure 1 (B).
Interstitial oxygen precipitates around the reduced oxygen precipitate nuclei 5 shown in Figure 1 (C), and oxygen precipitates 6 such as silica are formed.
becomes. Furthermore, the low oxygen concentration region 4 in FIG. 1(B) is the denuded zone DZ7 on the surface in FIG. 1(C).
becomes.

In order to compare the present invention and the conventional method, in the present invention, a CZ substrate with a diameter of 150 mm with an initial oxygen concentration of 18 X 10 "atoms/ail was subjected to one-step heat treatment at 1200°C for 5 hours, and in the conventional method, the initial oxygen concentration was 15 X 10" atoms/ail. /
cJ CZ substrate diameter 150mm at 1200℃ for 5 hours, 7
Each sample was subjected to two-stage heat treatment at 00°C for 16 hours, and a simulated heat treatment assuming the manufacturing process of a CMOS device was added, and the residual oxygen concentration, DZ width, internal defect density, warpage, and slip were measured. A list of results is shown in Table 1. In Table 1, the oxygen concentration was measured according to the old ASTM regulations.

Table Conventional method of the present invention Initial oxygen concentration Heat treatment High temperature and low temperature 18 X 10" ajoms/cd 1200°C 5 hours 15 X 10" atoIls/cd 1200°C 5 hours 700°C 16 hours Residual oxygen concentration ~8X10" ajoIIs/ad
+1-5X10"atoms/ajDz
~60μm 60-70μm internal defect density
1~2x10'c+J1~2x10'/ad warp
~40μm Slips of 100μm or more Several pieces of 5-10cm There are many pieces of 20-40cm Residual oxygen is approximately 8 x 1017at each
oms/cJ.

4 to 5 X 10” atoms/crJ,
The amount of decrease in oxygen concentration is approximately 10 x 10”at
oms/cl. Furthermore, the DZ width and internal defect density were also the same in both cases. On the other hand, regarding 11 warpage, the conventional method had a warpage of 100 μm or more, which was 2.5 times that of the present invention, and the warpage was seen to be an obstacle in the lithography process. Regarding the slip, in the present invention, the slip is 5 to 10 mm.
A few pieces were seen, but in the conventional method, there were many pieces with a diameter of 20 to 40 mm.

As described above, while the DZ width and internal defect density required for the DZIG substrate are the same, the present invention is far superior in terms of warping and slipping.

In this example, the initial oxygen concentration was 18×10”ato
I mentioned the C2 board of ms/c♂, but this is 16,
For concentrations lower than 5 X 10” atoms/cl,
It was found that the internal defect density rapidly decreased to 5×10'/ant or less, and a sufficient IG effect could not be obtained.

Further, at a concentration exceeding 19.5 x 10'' atoms/aa, the DZ width became narrow and many defects protruded to the surface.

Regarding high-temperature heat treatment, in this example, the temperature was 1200°C for 5 hours, but if the temperature is 1100°C or higher, it is possible to form almost the same DZ and internal defects, and if the temperature is lower than this, the formation of DZ was insufficient, and excessive oxygen precipitation occurred, resulting in numerous defects on the surface. Regarding the processing time, a processing time of 3 hours or more was sufficient to form a Z, but since the DZ width increases in proportion to the square root of the processing time, the practical upper limit is about 10 hours.

When an SRAM composed of a CMOS device was manufactured on the Si substrate manufactured in this example, an improvement in the non-defective product rate of about 20% was observed compared to the conventional Si substrate.

FIG. 2 is a longitudinal sectional view of another embodiment of the invention.

In Figure 2 (A)E, 8 is a CZ board (diameter 150 cylinder)
and 9 is 17.5 x 10” atoms/a
It is an interstitial oxygen atom contained at a concentration of il, and 10 is a potential oxygen precipitation nucleus. 1200 for this C2 board 8
C. for 5 hours, and as shown in FIG. 2(B), a region 11 with a low concentration of interstitial oxygen of about 90 μm is formed, and the latent oxygen precipitate nuclei 10 become reduced oxygen precipitate nuclei 12. After this, heat treatment was performed at 1000°C for 16 hours, as shown in Figure 2 (C).
DZ 13 and oxygen precipitates 14 are formed as shown in FIG. Subsequently, a 10 μm thick Si epitaxial film 15 was formed as shown in FIG. 2(D).

Epitaxial growth is a high-temperature process (1000 to 1200°C) and includes heat treatment steps such as rapid heating and rapid cooling, so slips are likely to occur, but when Si is epitaxially grown on the DZIG substrate of the present invention, no slips occur. Met. On the other hand, in the conventional DZIG substrate, 10
When similar Si epitaxial growth was performed with heat treatment at 00° C. for 16 hours, several dozen slips of 10 to 30 mm were generated.

This example demonstrated the superiority of the present invention in the manufacturing process of Si epitaxial substrates, in addition to the normal electronic device manufacturing process.

When an SRAM consisting of a CMOS device was fabricated on a Si substrate according to this example, the result was 25~25% compared to the conventional method.
A 30% improvement in the non-defective product rate was observed.

〔Effect of the invention〕

As explained above, the present invention is applicable to 16.5 to 19.5
By performing a one-step heat treatment for 3 to 10 hours at a high temperature of 1100°C or higher on a DZ substrate containing interstitial oxygen of 0 m s / cnt, warpage can be reduced while maintaining IG performance equivalent to that of conventional methods. This has the effect that a DZIG substrate in which the occurrence of slip is suppressed can be manufactured with high productivity and at low cost.

[Brief explanation of the drawing]

FIG. 1 is a vertical sectional view showing (A) to (C) the main steps of one embodiment of the present invention, and FIG. 2 (A) to (D) are longitudinal sectional views showing the main steps of another embodiment of the present invention. FIG. 1... CZ substrate, 2... Interstitial oxygen atoms, 3... Potential oxygen precipitation nuclei, 4... Low oxygen concentration region, Death... ...shrinked oxygen precipitate nuclei, 6.
...Oxygen precipitate, 7...DZ, 8...
...C2 substrate, 9... Interstitial oxygen atom, lO
...Potential oxygen precipitation nucleus, 11...Low oxygen concentration region, 12...Reduced oxygen precipitation nucleus, 13
...DZ, 14...Oxygen precipitate, 15
...Epitaxial layer. Agent Patent attorney Susumu Uchihara (A') <A) CB) (f32 (C) (D) Kaya ITyJ Cha 2 Drawing procedure amendment (voluntary) "Scope of claims" column of the specification to be amended

Claims (1)

[Claims] The interstitial oxygen concentration is 16.5×10^1^7 atoms/
cm^3 or more, 19. ×10^1^7 atoms/cm
A method for manufacturing a silicon substrate, characterized in that a silicon substrate of ^3 or less is subjected to heat treatment at a temperature of 1100°C or higher.