JPH0271162A - Electronic watthour meter - Google Patents

Abstract

PURPOSE:To remove offset voltage of a pulse width modulation circuit by inputting in the pulse width modulation circuit a voltage signal from a light load automatic adjusting circuit which takes out offset voltage generated on a rear stage of a transformer and a current transformer. CONSTITUTION:Voltage signals ev, ei output from an auxiliary transformer 10 and an auxiliary current transformer 11 are sent to a pulse width modulation circuit 20. In the circuit 20, offset voltage signals ef from a light load automatic adjusting circuit 30 is input 21 and supplied to an integration circuit 22 and a comparator circuit 23 which converts the signals ev into pulse width duty cycle signals. The voltage signals ei, -ei are selectively input by these pulse width duty cycle signals obtained. As a result, voltage signals eQ, eR proportional to electric power are output from integration circuits 25, 26. This allows offset voltage components eS contained in pulse frequency signals output from a voltage-pulse frequency conversion circuit 12 to be taken out and sent to the circuit 20, where offset voltage components are removed.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to an electronic watt-hour meter, and particularly to an electronic watt-hour meter that is equipped with a means for automatically removing offset voltage during light loads. Regarding the meter.

(Conventional technology) FIG. 3 is a configuration diagram of a conventional electronic watt-hour meter.

This electronic watt-hour meter includes an auxiliary transformer (P,
T) 1 and an auxiliary current transformer (C0T) 2 that outputs a second voltage signal ei proportional to the consumption current i flowing through the distribution line, and the output from these P, TI and C, T2 is provided. The first and second voltage signals ev and ei are respectively pulse width modulation circuits (multiplying circuits) for power-voltage conversion.
It looks like it's going to be sent to 3rd.

This pulse width modulation circuit 3 generates a first voltage signal evl·!
The pulse width duty cycle signal is used to selectively input the second voltage signal ei and output a third voltage signal proportional to the power of the distribution line. The general structure is as shown in FIG. 4, and it operates as follows. Therefore, when the first voltage signal ev input to the integrating circuit 3-1 consisting of the operational amplifier As, the resistor R1, and the capacitor C1 shown in FIG. 4 is zero, the output signal ek of the integrating circuit 3-1 , a signal obtained by inverting and dividing its own output signal er - (Sr/2)
It is assumed that the output signal er of the comparator circuit 3-2 for comparing the values is set to +er, and the voltage dividing resistors R2 and #R3 are set to the same resistance value. In this case, the inverting input terminal of the operational amplifier Ae of the comparator circuit 3-2 is supplied with a comparison voltage signal eh, that is, -(er
/z) is applied, and er is applied to the inverting input terminal of the operational amplifier A8 of the integrating circuit 3-1 through the resistor R4. In this state, the output signal ek of the integrating circuit 3-1 exhibits a decrease in the change shown in FIG. 5, that is, an integral slope in the negative direction. And this output signal 6
When k reaches -(Sr/2), ek≦eh, and the output signal er of the comparator circuit 3-2 is inverted and becomes -er.

Then, (Sr/2
) is applied, and a voltage -er is applied to the inverting input terminal of operational amplifier A8. Therefore, the output voltage ek of the integrating circuit 3-1 rises, that is, exhibits an integration slope in the positive direction, as shown in FIG. Then, when this output voltage ek reaches the voltage of (Sr/2) (
(ek≧eh), and the output signal -er of the comparator circuit 3-2 is inverted again to become er. In this way, the output signal er of the comparator circuit 3-2 becomes as shown in FIG. When the first voltage signal ev is input, the voltage applied to the inverting input terminal of the operational amplifier Ac rises and falls, thereby changing the pulse width of the output signal er of the comparator circuit 3-2. Here, if the high level period, ie, the +〇r period, of the output signal er is ta, and the low level period, ie, the -er period, is tb, then the output signal ek of the integrating circuit 3-1 is.

8k (ta) = -er ... (1) 6k (tb) = +er ... (2) Using these equations (1) and (2), R
Calculating each period ta and tb when setting 1=R4.

ta=er-ai・c1/(er+ev) −・・(
a) tb = er-R1-C1/(er-ev)
=-(4). Furthermore, these third equations and fourth equations
Pulse width duty cycle D of operational amplifier Ac using the formula.

When calculating D, D=ta/(ta+tb)=(er-ev)/2er
-(5) D=tb/(ta+tb)=(e3r+ev)/2e3r .=t6).

And this pulse width data cycle D.

D, the analog switches 81 to S4 made up of transistors etc. are opened and closed to generate the second voltage signal ei,
Enter -ei. These second voltage signals ei, -
ei is sent to the integrating circuits 3-3 and 3-4 through analog switches 81 to S4, respectively, and these integrating circuits 3-3
．． 3-4, the third voltage signal eP*an is the product of the first voltage signal ev and the second voltage signal ei.
is output. Therefore, these third voltage signals ep, e
n is.

ep=effl(D)+(-ez)D=ev-ei/er...(7)
en=ez(D)+(-ej)D=-ev-ei/sr
...It is expressed as (8).

These third output signals ep l en are then sent to the voltage-pulse frequency conversion circuit 4 and converted into pulse frequency signals proportional to the voltage.

Here, the voltage -/4' pulse is output from the frequency conversion circuit 4.! The pulse frequency signal is integrated by a light load automatic adjustment circuit 5 composed of a well-known integration circuit. By this integration, the voltage -/4' pulse is output from the frequency conversion circuit 4/! Offset voltage component e1 of the pulse frequency signal
Only 1 is retrieved. This offset voltage component es is
Negative feedback is provided to the input side of the voltage-pulse frequency conversion circuit 4,
The offset voltage component es is removed. Then, the pulse frequency signal from which the offset voltage component e3 has been removed is sent to the frequency dividing circuit 6, where the frequency is divided and weighted at a predetermined frequency division ratio, and the signal is displayed on the display circuit 7. Sent.

(Problem to be solved by the invention) By the way, the offset voltage 8g is not removed and the power ev
・When added to ei, the electric power ev-ei increases as shown in Figure 6.
The entire value shows a value increased by the offset voltage 08. Note that this offset voltage e8 is actually a number I Q m Vmax. Therefore, under heavy loads with large current consumption, ev -ei :> es and there is no effect, but under light loads with low current consumption, 6v-e
The ratio of em to i becomes larger, and the obtained power e
v-ei ends up containing many errors.

Therefore, as shown in FIG. 4, the offset voltage eTsuru is removed by negative feedback using the light load automatic adjustment circuit 5.
This offset voltage e3 is removed only by the offset voltage generated in the voltage-pulse frequency conversion circuit 4.

However, as shown in FIG. 4, operational amplifiers are also used in the pulse width modulation circuit 3, and offset voltages are also generated in these operational amplifiers. However, no circuit is provided to remove the offset voltage of these operational amplifiers, and as a result, the obtained power, especially the power obtained at light loads, contains a large proportion of errors due to the offset voltage. .

The present invention has been made based on the above circumstances, and its purpose is not only to provide a voltage-pulse frequency conversion circuit, but also to provide a voltage-pulse frequency conversion circuit. An object of the present invention is to provide an electronic watt-hour meter that can eliminate the offset voltage of a pulse width modulation circuit and eliminate the offset voltage of the entire circuit.

[Structure of the Invention] (Means and Effects for Solving the Problems) The present invention provides a pulse width modulation circuit that multiplies a first voltage signal from a transformer and a second voltage signal from a current transformer. An offset input circuit is provided for inputting an offset voltage signal from a light load automatic adjustment circuit that extracts an offset voltage generated on the downstream side of the transformer and the current transformer.
The pulse width modulation circuit removes the offset voltage component and outputs a third voltage signal proportional to the power, further converts the third voltage signal into a pulse frequency signal by the voltage-pulse frequency conversion circuit, and outputs the third voltage signal by the power output circuit. It is an electronic watt-hour meter designed to measure electric power.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram of an electronic watt-hour meter according to the present invention.

In Fig. 1, 10 is an auxiliary transformer (P, T) that outputs a first voltage signal ev proportional to the load voltage V of the distribution line, and 1 is a second voltage signal ev proportional to the consumption current i flowing through the distribution line. The auxiliary current transformers C and T output the voltage signal ei. The first and second voltage signals ev and ei outputted from the auxiliary transformer 10 and the auxiliary current transformer 11 are configured to be sent to the /4' pulse width modulation circuit 20 and φ.

Now, this pulse width modulation circuit 20 is provided with an offset input circuit that inputs an offset voltage signal et which is a sum of its own offset voltage and the offset voltage of the voltage-pulse frequency conversion circuit 12. The input offset voltage signal ef is converted into the first voltage signal ev by ! pulse width duty cycle signal and then selectively input a second voltage signal with the /4' pulse width duty cycle signal, thereby providing a third voltage signal proportional to the load power connected to the distribution line. It has the function of outputting a voltage signal. Specifically, the configuration is as shown in FIG. That is, No. 2 is an offset input circuit, and this offset input circuit 21 inverts and non-inverts the offset voltage signal ef in a time division manner and outputs it. An input resistor RIO of the pressure signal ef is connected to an inverting input terminal of an operational amplifier (hereinafter referred to as OP ang) A10, and a resistor R11 is connected between the output terminal of this OP amplifier 110 and the inverting input terminal. The inverting input terminal of an inverting OP amplifier All with an amplification factor of 1 is connected to the output terminal of the OP amplifier 110 via a resistor R12.

A resistor R13 is connected between the output terminal and the inverting input terminal of this OP amplifier A11. Then each OP Anno 1
10. Analog switches 810 and 811 such as transistors are connected to the output terminal of All.

22 is an integrating circuit, which integrates a signal obtained by adding the signal output from the offset input circuit 21 to the first voltage signal ev, and connects the signal to the OP amplifier Al2O inverting input terminal via the amplifier A13 and the resistor R14. The output end of the offset input circuit 21 is connected. An input resistor R15 is connected to the inverting input terminal of the OP amplifier k12, and
A capacitor C1 is connected between itself and the output terminal.

23 is a comparator circuit, which outputs a signal corresponding to the output signal of the integration circuit 22 using the signal output from the offset input circuit 2 as a reference signal;
The output terminal of OP amplifier A12 is connected to the non-inverting input terminal K of Ang A14, and the resistor voltage divider circuit R16 is connected to the inverting input terminal of A14.
, R17 to the output end of the offset input circuit 21.

Then, the output signal of the OP amplifier A14 causes the analog switch S12. S13 opens and closes, and OP Anne 7
'The output signal of AJ4 is inverted by the inverter 24, and the output signal of the analog switch S14. S15 is designed to open and close. Of these analog switches 812 to 815, an integration circuit 25 consisting of a resistor RIB and a capacitor C2 is connected to the connection point between 812 and 815, and a resistor R19 and a capacitor C2 are connected to the connection point between S13 and 814.
A third voltage signal eq, e outputted from each integrating circuit 25.
B is sent to the voltage-pulse frequency conversion circuit 12.

Now, 30 is a light load automatic adjustment circuit, and this is a voltage -
/4' The pulse frequency signal output from the pulse frequency conversion circuit 12 is integrated to obtain only the offset voltage component, and this offset voltage signal et is applied to the pulse width modulation circuit 20.
It provides negative feedback to the offset input circuit 21, and specifically comprises a well-known integration circuit.

Further, a frequency divider circuit 14 and a display circuit 15, which constitute the power output circuit 13, are connected to the output end of the voltage/Jars frequency conversion circuit 12.

Next, the operation of the power cover meter configured as described above will be explained. P, the first proportional to the load voltage of the distribution line from T10
When a voltage signal ev is output and a second voltage signal ei proportional to the consumption current flowing to the distribution line is output from C and T11, these first and second voltage signals ev,
ei is sent to the pulse width modulation circuit 20. This pulse width modulation circuit 20 inputs the offset voltage signal ef from the light load automatic adjustment circuit 30, and converts this offset voltage signal ef into a first voltage signal (3V) into a pulse width duty cycle signal. A third voltage proportional to the power is supplied to the integrator circuit 22 and the comparator circuit 23, and inputs the second voltage signals ei and -ei according to the pulse width duty cycle signals obtained by these circuits 22 and 23. It outputs signals eQ, e,.

Here, the operation of the pulse width modulation circuit 20 will be specifically explained. The offset voltage signal ef is supplied to the offset input circuit 2.
1 OP amplifier klO [Fig. 2, ex
], and after being amplified by this OP amplifier klO, it is inverted by OP amplifier A7J [FIG. 2, -ex]. These non-inverted and inverted offset voltage signals ex, -ex
are respectively analog switches S10. The signal is supplied to the integrating circuit 22 and the comparator circuit 23 by the opening/closing operation of S11.

By the way, the output signal of the integrating circuit 22 changes similarly to the output signal 8 shown in FIG. 5, and the output signal er1 of the comparator circuit 23 changes similarly to the output signal er shown in FIG. Therefore, the analog switch 810 is opened during the low level period of the output signal of the comparator circuit 23, and the one analog switch S11 is opened during the high level period. Therefore, the offset voltage signals -ex and ex inputted during these high-level and low-level periods, respectively, are sent to the inverting input terminal of the OP ang k12 via the OP amplifier A13, and also to the resistor voltage divider circuit RI6. The voltages are divided into (-ex/2) and (ex/2) by R17 and sent to the inverting input terminal of the OP amplifier fA14. From this K, the comparator circuit 23 outputs a signal lowered by the offset voltage component generated in the pulse width modulation circuit 20 and the voltage-pulse frequency conversion circuit 12.

Therefore, the high level period of the output signal of the comparator circuit 23 is set as tA, the low level period is set as tn, and each resistor R
14, R15, R16, R17 with the same resistance value, R8
Then, the output signal eK of the integrating circuit 22 is: =(tA/Ro@C4) (ev +ex)=-
ex (tm) (tB/Ro-C4) (ev-ex)=ex (10). Also, each period tA+tB is tA=ex
-Ro-C4/(ex+ev)...aυ tB=ex-Ro-C4/(ex-ev)...a4. Then, when the pulse width date cycles D and D of the output signal of the comparator circuit 23 are determined from these equations υ and ←, these D are as follows.

D=tA(tA+t,) = (ex-ev)/28X
...α country = tB (tA+tB) = (ex+ev)/2ex ・
...becomes αXun. Therefore, with this pulse width duty cycle D, D, the analog switch 812.

S13, 814, and 815 open and close. This results in
Second voltage signals ei and -ei are selectively input.

As a result, each integrating circuit 25, 26 outputs a third voltage signal eq, eB proportional to the power. As described above, only the offset voltage component em included in the bus frequency signal outputted from the voltage-noise frequency conversion circuit 12 is extracted by the light load automatic adjustment circuit 30 and sent to the pulse width modulation circuit 20. , thereby removing the offset voltage component.

Therefore, the pulse frequency signal outputted from the third voltage signals eQ and 6B converted by the voltage-pulse frequency conversion circuit 12 does not include an offset voltage. In other words, the offset voltage generated in the pulse width modulation circuit 20 and the voltage-pulse frequency conversion circuit 12 is removed from the signal sent to the frequency dividing circuit 14, and thus,
The signal frequency-divided by the frequency dividing circuit 14 is sent to the display circuit 15, and the amount of electric power is displayed.

In this embodiment, 1. An offset input circuit 21 is provided in the pulse width modulation circuit 20; The pulse width modulation circuit 20 and the voltage input from this offset input circuit 21 -
Since the offset voltage signal ex of the pulse frequency conversion circuit 12 is applied to the integration circuit 22 and the comparator circuit 23 to remove the offset voltage, each of the pulse width modulation circuit 20 and the voltage-to-pulse frequency conversion circuit 12 The offset voltage generated in the OP amplifier, that is, the offset voltage of the entire watt-hour meter can be removed. Particularly in the case of light loads, in the past, the influence of offset voltage became large and it was impossible to measure the amount of electric power accurately, but with this embodiment of the watt-hour meter, the offset voltage can be removed during light loads. Accurate power consumption can be measured even under load.

Therefore, the watt-hour meter of this embodiment can be applied to power equipment that requires special precision class, such as power plants.

Furthermore, by changing the setting of the amplification factor of the OP amplifier AIO, the error voltage generated at P, TIO, C, and Tll can be removed.

〔Effect of the invention〕

According to the present invention, an offset input circuit is provided in the pulse width modulation circuit that obtains the third voltage signal proportional to the power, and the offset voltage signals of the pulse width modulation circuit and the voltage-pulse frequency conversion circuit are input to this circuit, Therefore, since the offset voltage is removed and the third voltage signal is output to determine the power, it is possible to remove not only the offset voltage of the voltage-pulse frequency conversion circuit but also the pulse width modulation circuit, thereby eliminating the offset of the entire circuit. It is possible to provide an electronic watt-hour meter that can remove voltage.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an electronic watt-hour meter according to the present invention, FIG. 2 is a specific block diagram of a pulse width modulation circuit in the watt-hour meter shown in FIG. 1, and FIG. A configuration diagram of a conventional electronic watt-hour meter, FIG. 4 is a specific configuration diagram of the pulse width modulation circuit in the watt-hour meter shown in FIG. 3, and FIG. 5 shows the operation of the pulse width modulation circuit shown in FIG. 4. The timing diagram in FIG. 6 is a diagram for explaining errors caused by offset voltage in an electronic watt-hour meter. 10... Auxiliary transformer, 11... Auxiliary current transformer, 12.
...Voltage-pulse frequency conversion circuit, 13... Power output circuit, 14... Frequency division circuit, 15... Display circuit, 20
... Pulse width modulation circuit, 21 ... Offset input circuit, 22 ... Integration circuit, 23 ... Comparator circuit, 25° 26 ... Integration circuit, 810-815 ... Analog switch, 30. ...Light load automatic adjustment circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 5 r Figure 1 1゜

Claims (1)

[Claims] A transformer that converts the voltage signal into a first voltage signal proportional to the load voltage of the distribution line, and a current transformer that converts the voltage signal into a second voltage signal proportional to the consumption current flowing through the distribution line, and a transformer and a current transformer. It has an offset input circuit that inputs an offset voltage signal generated at a subsequent stage, and modulates the first voltage signal output from the transformer into a pulse width duty cycle by the offset voltage signal input from the offset input circuit. a pulse width modulation circuit that selectively inputs a second voltage signal output from the current transformer according to the pulse width duty cycle signal and outputs a third voltage signal proportional to the power; a voltage-pulse frequency conversion circuit that converts a third voltage signal output from the width modulation circuit into a pulse frequency signal; and a voltage-pulse frequency conversion circuit that integrates the pulse frequency signal output from the voltage-pulse frequency conversion circuit to obtain the offset voltage signal. a light load automatic adjustment circuit which extracts the offset voltage signal and applies the offset voltage signal to the input side of the pulse width modulation circuit; and a power output that calculates power by frequency-dividing a third voltage signal output from the voltage-pulse frequency conversion circuit. An electronic watt-hour meter characterized by comprising a circuit.