JPH0270578U - - Google Patents

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Publication number
JPH0270578U
JPH0270578U JP1988150253U JP15025388U JPH0270578U JP H0270578 U JPH0270578 U JP H0270578U JP 1988150253 U JP1988150253 U JP 1988150253U JP 15025388 U JP15025388 U JP 15025388U JP H0270578 U JPH0270578 U JP H0270578U
Authority
JP
Japan
Prior art keywords
reference level
image signal
circuit
clip
video camera
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988150253U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988150253U priority Critical patent/JPH0270578U/ja
Publication of JPH0270578U publication Critical patent/JPH0270578U/ja
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案信号処理回路の回路構成を示す
図、第2図は第1図の回路で得られる波形図、第
3図は従来の信号処理回路の回路構成を示す回路
図、第4図は第3図の回路で得られる波形図であ
る。 1……第1のクリツプ回路、2……第2のクリ
ツプ回路、3……加算回路、T1〜T6……トラ
ンジスタ、R1〜R5……抵抗、A……差動アン
プ。
FIG. 1 is a diagram showing the circuit configuration of the signal processing circuit of the present invention, FIG. 2 is a waveform diagram obtained by the circuit of FIG. 1, FIG. 3 is a circuit diagram showing the circuit configuration of a conventional signal processing circuit, and FIG. The figure is a waveform diagram obtained by the circuit of FIG. 3. DESCRIPTION OF SYMBOLS 1...First clip circuit, 2...Second clip circuit, 3...Addition circuit, T1-T6...Transistor, R1-R5...Resistor, A...Differential amplifier.

Claims (1)

【実用新案登録請求の範囲】 (1) 固体撮像素子から得られる画像信号のノイ
ズを抑圧するビデオカメラの信号処理回路に於い
て、 第1の基準レベル以下の画像信号をクリツプし
て基準レベル以上の画像信号を出力する第1のク
リツプ回路、 第2の基準レベル以上の画像信号をクリツプし
て基準レベル以下の画像信号を出力する第2のク
リツプ回路、 上記第1及び第2の基準レベルを上記第1及び
第2のクリツプ回路に夫々設定する設定手段、 上記第1のクリツプ回路の出力と上記第2のク
リツプ回路の出力とを加算する加算手段、 を備えたことを特徴とするビデオカメラの信号
処理回路。 (2) 上記第1の基準レベルが上記第2の基準レ
ベルに比して高く設定されることを特徴とするビ
デオカメラの信号処理回路。
[Claims for Utility Model Registration] (1) In a signal processing circuit of a video camera that suppresses noise in an image signal obtained from a solid-state image sensor, an image signal that is below a first reference level is clipped and an image signal that is above the reference level is a first clip circuit that outputs an image signal of a second reference level or higher; a second clip circuit that clips an image signal of a second reference level or higher and outputs an image signal of a lower reference level; A video camera characterized by comprising: setting means for setting each of the first and second clip circuits, and addition means for adding the output of the first clip circuit and the output of the second clip circuit. signal processing circuit. (2) A signal processing circuit for a video camera, wherein the first reference level is set higher than the second reference level.
JP1988150253U 1988-11-17 1988-11-17 Pending JPH0270578U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988150253U JPH0270578U (en) 1988-11-17 1988-11-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988150253U JPH0270578U (en) 1988-11-17 1988-11-17

Publications (1)

Publication Number Publication Date
JPH0270578U true JPH0270578U (en) 1990-05-29

Family

ID=31423230

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988150253U Pending JPH0270578U (en) 1988-11-17 1988-11-17

Country Status (1)

Country Link
JP (1) JPH0270578U (en)

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