JPH0269901A - Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor - Google Patents

Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor

Info

Publication number
JPH0269901A
JPH0269901A JP63222002A JP22200288A JPH0269901A JP H0269901 A JPH0269901 A JP H0269901A JP 63222002 A JP63222002 A JP 63222002A JP 22200288 A JP22200288 A JP 22200288A JP H0269901 A JPH0269901 A JP H0269901A
Authority
JP
Japan
Prior art keywords
integrated circuit
conductive path
hybrid integrated
ultra
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63222002A
Other languages
Japanese (ja)
Other versions
JPH0587161B2 (en
Inventor
Akira Kazami
風見 明
Katsumi Okawa
克実 大川
Sumio Ishihara
石原 純夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63222002A priority Critical patent/JPH0269901A/en
Publication of JPH0269901A publication Critical patent/JPH0269901A/en
Publication of JPH0587161B2 publication Critical patent/JPH0587161B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To obtain high-precision ultra-low-resistance resistors by providing one conductive path among comb-tooth sections of the other conductive path independent of each other, and forming Ni plating resistors between the conductive paths. CONSTITUTION:Conductive paths 2, 2' are formed by sticking Cu foil on the anode oxide film of an Al substrate with epoxy resin and etching it into a specified pattern. The conductive path 2 is like the teeth of a comb, and among the teeth the conductive path segments 2' are arranged independently. Ni plating resistors 3 are formed being lapped on the side lines of the conductive paths 2, 2'. The Ni plating resistors are made using an electroless solution such as nickel sulfate and sodium hypophosphite, etc., with a thickness at which a specified resistivity is obtained. Then, they are trimmed up to a specified resistance value by a laser. After that, the conductive path segments 2' are connected together with connecting substances. The connecting substances are wire, Ag paste, solder, etc. This constitution makes it possible to obtain high-precision ultra-low-resistance-value resistors easily.

Description

【発明の詳細な説明】 (り産業上の利用分野 本発明は混成集積回路の基板上に形成されるニッケルメ
ッキ抵抗体に関し、特に低抵抗の抵抗値を有する場合の
混成集積回路の超低抵抗体構造に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a nickel-plated resistor formed on a substrate of a hybrid integrated circuit, and particularly relates to a nickel-plated resistor formed on a substrate of a hybrid integrated circuit. Regarding body structure.

(ロ)従来の技術 一般に混成集積回路の基板にはセラミックスあるいは金
属基板が用いられるが、放熱性の良さから主にアルミニ
ウムの金属基板が多く用いられている。この金属基板上
には絶縁層を介して混成集積回路の受動素子である抵抗
がカーボンのスフノーン印刷あるいはニッケルのメツキ
に依って形成されるが、ニッケルメッキ抵抗の場合数百
mΩクラスの低抵抗は比較的に容易に形成することがで
きた。
(b) Prior Art Ceramic or metal substrates are generally used as substrates for hybrid integrated circuits, but aluminum metal substrates are often used because of their good heat dissipation properties. On this metal substrate, a resistor, which is a passive element of the hybrid integrated circuit, is formed via an insulating layer by carbon printing or nickel plating, but in the case of nickel plated resistors, the resistance is as low as several hundred mΩ. It was relatively easy to form.

また、数十mΩクラスの超低抵抗を形成する場合、第2
図に示す如く、アルミニウム基板<11)上に形成され
る導電路(12)をくしは状に形成し、その導電路(1
2)のくしば部と咬号する様にもう一方の導電路(12
’ )をくしば状に形成して、夫々の導電路(12)(
12’ )のくしば部分を低抵抗値のニッケルメッキ抵
抗(13)で接続して抵抗を並列接続することで超低抵
抗値を形成していた。
In addition, when forming an ultra-low resistance of several tens of mΩ class, the second
As shown in the figure, the conductive path (12) formed on the aluminum substrate is formed in a comb shape.
Connect the other conductive path (12
) are formed into a comb shape, and each conductive path (12) (
12') was connected with a low resistance nickel plated resistor (13), and the resistors were connected in parallel to form an ultra-low resistance value.

(ハ)発明が解決しようとする課題 しかしながら、第2図で示した超低抵抗体構造では超低
抵抗値の精度がプラスマイナス10%と太きなる問題点
を有していた。なぜなら、導電路(12>(12’)の
くしば部間に形成された低抵抗のニッケルメッキ抵抗を
トリミングすることが機械的に困難であるため、第2図
の如き、超低抵抗体構造を形成する場合ではトリミング
が行われなかっだからである。
(c) Problems to be Solved by the Invention However, the ultra-low resistance structure shown in FIG. 2 has a problem in that the accuracy of the ultra-low resistance value is as high as plus or minus 10%. This is because it is mechanically difficult to trim the low-resistance nickel-plated resistor formed between the combs of the conductive path (12>(12')). This is because trimming is not performed when forming a .

(ニ)課題を解決するための手段 本発明は上述した課題に鑑みて為されたものであり、混
成集積回路の基板上に形成された導電路間にニッケルメ
ッキ抵抗が形成された混成集積回路の抵抗体構造におい
て、一方の前記導電路はくしば状に形成され、前記一方
の導電路のくしば部間に夫々独立した他方の導電路が形
成され、前記くしば部と前記他方の導電路間に前記ニッ
ケルメッキ抵抗が形成され、前記独立形成された夫々の
他方の導電路を接続して解決する。
(d) Means for Solving the Problems The present invention has been made in view of the above-mentioned problems, and provides a hybrid integrated circuit in which a nickel-plated resistor is formed between conductive paths formed on a substrate of the hybrid integrated circuit. In the resistor structure, one of the conductive paths is formed in a comb shape, and the other independent conductive path is formed between the comb portions of the one conductive path, and the comb portion and the other conductive path are connected to each other. The problem is solved by forming the nickel plated resistor between them and connecting the other independently formed conductive paths.

(*〉作用 この様に本発明に依れば、一方の導電路をくしば状に形
成し、そのくしば状に形成された導電路間に他の独立し
た導電路を形成し、くしば状導電路と独立した導電路間
にニッケルメッキ抵抗が形成され、独立した導電路同志
を夫々接続することにより、精度の優れた超低抵抗値を
有する超低抵抗体構造とすることができる。
(*> Function) According to the present invention, one of the conductive paths is formed in a comb shape, and another independent conductive path is formed between the conductive paths formed in the comb shape. By forming a nickel-plated resistor between the shaped conductive paths and the independent conductive paths, and connecting the independent conductive paths to each other, an ultra-low resistance structure having an ultra-low resistance value with excellent accuracy can be obtained.

(へ)実施例 一 以下に第1図に示した実施例に基づいて本発明の詳細な
説明する。
(f) Example 1 The present invention will be described in detail below based on the example shown in FIG.

第1図は本発明の実施例を示す超低抵抗体構造を示す平
面図であり、(1)は混成集積回路基板、(2)(2’
 )は導電路、(3)はニッケルメ・Zキ抵抗体、(4
)は接続体である。
FIG. 1 is a plan view showing an ultra-low resistance structure according to an embodiment of the present invention, in which (1) is a hybrid integrated circuit board, (2) (2'
) is a conductive path, (3) is a nickel-plated/Z-chip resistor, (4
) is a connector.

本実施例の混成集積回路基板(1)にはアルミニウム金
属基板が用いられ、このアルミニウム金属基板は陽極酸
化によって表面に絶縁性の金属酸化膜が形成され、更に
金属酸化膜上にはエポキシ系樹脂の絶縁層が設けられて
いる。また絶縁層はアルミニウム金属基板と銅箔とを絶
縁して接着するものであり、接着された銅箔を所定のパ
ターンにエツチングすることにより絶縁層上に導電路(
2)(2′)が形成される。導電路(2)(2’)は混
成集積回路を形成する能動素子及び受動素子等を結線す
るものであり、夫々の導電路(2)(2’)間には抵抗
が形成される。
An aluminum metal substrate is used for the hybrid integrated circuit board (1) of this embodiment, and an insulating metal oxide film is formed on the surface of this aluminum metal substrate by anodization, and an epoxy resin is further applied on the metal oxide film. An insulating layer is provided. The insulating layer is used to insulate and bond the aluminum metal substrate and the copper foil, and by etching the bonded copper foil into a predetermined pattern, a conductive path (
2) (2') is formed. The conductive paths (2) (2') connect active elements, passive elements, etc. forming a hybrid integrated circuit, and a resistance is formed between each conductive path (2) (2').

第1図から明らかな如く、一方の導電路(2)はくしば
状に形成され、そのくしば状に形成された導電路(2)
のくしば部間に夫々独立延在した他の導電路(2′)が
形成配置されている。くしば状に形成された一方の導電
路(2)と他の導電路(2′)とはニッケルメッキ抵抗
体(3)によって接続され、独立形成された他の導電路
(2′)は互いに接続体(4)によって接続されている
As is clear from FIG. 1, one conductive path (2) is formed in a comb shape, and the conductive path (2) formed in the comb shape
Other conductive paths (2') extending independently between the comb portions are formed and arranged. One conductive path (2) formed in a comb shape and the other conductive path (2') are connected by a nickel plated resistor (3), and the other conductive paths (2') formed independently are connected to each other. They are connected by a connecting body (4).

斯る本発明の超低抵抗体構造を用いて50mΩの超低抵
抗を形成した場合、導電路(2)(2’)間のニッケル
メッキ抵抗体(3)の抵抗値を数百mmΩに形成してお
き、夫々のニッケルメッキ抵抗体(3)を200mΩと
なるまでレーザトリミングした後、他の導電路(2゛)
を接続体(4)で接続すると精度の優れた超低抵抗を形
成することができる。
When an ultra-low resistance of 50 mΩ is formed using the ultra-low resistance structure of the present invention, the resistance value of the nickel-plated resistor (3) between the conductive paths (2) (2') is formed to several hundred mmΩ. Then, after laser trimming each nickel-plated resistor (3) to 200mΩ, the other conductive path (2゛)
By connecting them with the connecting body (4), an ultra-low resistance with excellent precision can be formed.

以下に本発明の超低抵抗体の形成方法を第1図を用いて
説明する。
The method for forming the ultra-low resistance element of the present invention will be explained below with reference to FIG.

混成集積回路基板(1)上にくしば状に形成された一方
の導電路(2)と、そのくしば部間に延在される独立し
た他の導電路(2′)とをエツチングによって形成する
One conductive path (2) formed in a comb shape on the hybrid integrated circuit board (1) and another independent conductive path (2') extending between the comb portions are formed by etching. do.

次に一方の導電路(2)のくしば部と他の導電路(2′
)との側辺部を重畳してニッケルメッキ抵抗体(3)を
形成する。ニッケルメッキ抵抗体(3)は硫酸ニッケル
及び次亜リン酸ソーダ等から成る無電解メツキ液に依っ
て所定の比抵抗が得られる厚きに形成する。
Next, the comb part of one conductive path (2) and the other conductive path (2'
) to form a nickel-plated resistor (3). The nickel-plated resistor (3) is formed to a thickness that provides a predetermined specific resistance using an electroless plating solution made of nickel sulfate, sodium hypophosphite, or the like.

次にニッケルメッキ抵抗体(3)を所定抵抗値までレー
ザトリミングした後、独立形成きれた他の導電路(2′
)を互いに接続体(4)によって接続する。接続体(4
)はワイヤー、Agペースト、半田ペース等によって行
われており、本実施例では半田ペーストを用いて行うも
のとする。
Next, after laser trimming the nickel-plated resistor (3) to a predetermined resistance value, another conductive path (2'
) are connected to each other by a connecting body (4). Connection body (4
) is performed using wire, Ag paste, solder paste, etc. In this embodiment, solder paste is used.

(ト)発明の効果 以上に詳述した如く、本発明に依れば、一方の導電路を
くしば状に形成し、その導電路のくしば部間に独立した
他の導電路を配置して、夫々の導電路間にニッケルメッ
キ抵抗体を形成し、そのニッケルメッキ抵抗体をトリミ
ング調整した後、独立した他の導電路を互いに接続する
ことにより、従来より精度の優れた超低抵抗値を容易に
形成することができる。
(G) Effects of the Invention As detailed above, according to the present invention, one conductive path is formed in a comb shape, and another independent conductive path is arranged between the comb portions of the conductive path. By forming a nickel-plated resistor between each conductive path, trimming and adjusting the nickel-plated resistor, and then connecting other independent conductive paths to each other, an ultra-low resistance value with better accuracy than before can be achieved. can be easily formed.

また、本発明では接続体に半田ペーストが用いられるた
め大電流の電流を流すことが可能である。
Further, in the present invention, since solder paste is used for the connection body, it is possible to flow a large current.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例を示す超低抵抗体構造の平面図
、第2図は従来例を示す平面図である。 (1)・・・混成集積回路基板、 (2) (2’ )
・・・導電路、(3)・・・ニッケルメッキ抵抗体、 
(4)・・・接続体。 =8=
FIG. 1 is a plan view of an ultra-low resistance structure showing an embodiment of the present invention, and FIG. 2 is a plan view showing a conventional example. (1)...Hybrid integrated circuit board, (2) (2')
... Conductive path, (3) ... Nickel plated resistor,
(4)...Connection body. =8=

Claims (7)

【特許請求の範囲】[Claims] (1)混成集積回路の基板上に形成された導電路間にニ
ッケルメッキ抵抗が形成された混成集積回路の抵抗体構
造において、 一方の前記導電路はくしば状に形成され、 前記一方の導電路のくしば部間に夫々独立した他方の導
電路が形成され、 前記くしば部と前記他方の導電路間に前記ニッケルメッ
キ抵抗が形成され、 前記独立形成された夫々の他方の導電路が接続されたこ
とを特徴とする混成集積回路の超低抵抗体構造。
(1) In a resistor structure of a hybrid integrated circuit in which a nickel-plated resistor is formed between conductive paths formed on a substrate of the hybrid integrated circuit, one of the conductive paths is formed in a comb shape; Another independent conductive path is formed between the comb portions, the nickel plated resistor is formed between the comb portion and the other conductive path, and the other independently formed conductive paths are connected. Ultra-low resistance structure of hybrid integrated circuit.
(2)前記接続はワイヤボンディングによって接続され
たことを特徴とする請求項1記載の混成集積回路の超低
抵抗体構造。
(2) The ultra-low resistance structure of a hybrid integrated circuit according to claim 1, wherein the connection is made by wire bonding.
(3)前記接続はAgペーストによって接続されたこと
を特徴とする請求項1記載の混成集積回路の超低抵抗体
構造。
(3) The ultra-low resistance structure of a hybrid integrated circuit according to claim 1, wherein the connection is made by Ag paste.
(4)前記接続は半田ペーストによって接続されたこと
を特徴とする請求項1記載の混成集積回路の超低抵抗体
構造。
(4) The ultra-low resistance structure of a hybrid integrated circuit according to claim 1, wherein the connection is made by solder paste.
(5)混成集積回路の基板上に形成された導電路間にニ
ッケルメッキ抵抗がスクリーン印刷によって形成される
混成集積回路の抵抗体構造において、 前記基板上にくしば状の導電路を形成し、 前記導電路のくしば部間に夫々独立した他の導電路を形
成し、 前記一方の導電路のくしば部と前記独立形成された他の
導電路との側辺部が重畳する様に前記ニッケルメッキ抵
抗を形成し、 前記ニッケルメッキ抵抗を所定値にトリミングした後、 前記独立形成された他の導電路を接続することを特徴と
する混成集積回路の超低抵抗体の形成方法。
(5) In a resistor structure of a hybrid integrated circuit in which nickel-plated resistors are formed by screen printing between conductive paths formed on a substrate of the hybrid integrated circuit, comb-shaped conductive paths are formed on the substrate; Another independent conductive path is formed between the comb portions of the conductive path, and the comb portions of the one conductive path and the side portions of the independently formed other conductive path overlap. A method for forming an ultra-low resistance element in a hybrid integrated circuit, comprising: forming a nickel-plated resistor, trimming the nickel-plated resistor to a predetermined value, and then connecting the independently formed other conductive path.
(6)前記接続はワイヤボンディング及び導電ペースト
によって接続することを特徴とする請求項5記載の混成
集積回路の超低抵抗体の形成方法。
(6) The method for forming an ultra-low resistance element of a hybrid integrated circuit according to claim 5, wherein the connection is made by wire bonding and conductive paste.
(7)前記混成集積回路の基板はアルミニウム基板であ
ることを特徴とする請求項1及び5記載の混成集積回路
の超低抵抗体構造及びその超低抵抗体の形成方法。
(7) The ultra-low resistance structure of a hybrid integrated circuit and the method for forming the ultra-low resistance structure according to claims 1 and 5, wherein the substrate of the hybrid integrated circuit is an aluminum substrate.
JP63222002A 1988-09-05 1988-09-05 Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor Granted JPH0269901A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63222002A JPH0269901A (en) 1988-09-05 1988-09-05 Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63222002A JPH0269901A (en) 1988-09-05 1988-09-05 Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor

Publications (2)

Publication Number Publication Date
JPH0269901A true JPH0269901A (en) 1990-03-08
JPH0587161B2 JPH0587161B2 (en) 1993-12-15

Family

ID=16775554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63222002A Granted JPH0269901A (en) 1988-09-05 1988-09-05 Ultra-low-resistance resistor structure of hybrid integrated circuit and formation of the resistor

Country Status (1)

Country Link
JP (1) JPH0269901A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1961612A2 (en) 2007-02-26 2008-08-27 Alps Electric Co., Ltd. Turn signal switch device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1961612A2 (en) 2007-02-26 2008-08-27 Alps Electric Co., Ltd. Turn signal switch device

Also Published As

Publication number Publication date
JPH0587161B2 (en) 1993-12-15

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