JPH0266477A - Testing device for ic chip - Google Patents

Testing device for ic chip

Info

Publication number
JPH0266477A
JPH0266477A JP63219303A JP21930388A JPH0266477A JP H0266477 A JPH0266477 A JP H0266477A JP 63219303 A JP63219303 A JP 63219303A JP 21930388 A JP21930388 A JP 21930388A JP H0266477 A JPH0266477 A JP H0266477A
Authority
JP
Japan
Prior art keywords
chip
irradiation point
circuit
tested
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63219303A
Other languages
Japanese (ja)
Inventor
Yasushi Kawakami
靖 川上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP63219303A priority Critical patent/JPH0266477A/en
Publication of JPH0266477A publication Critical patent/JPH0266477A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To check the operation of a logical circuit in an IC chip to be tested within a short time by inputting an irradiation point control signal from a circuit pattern and a layout pattern stored in an engineering work station (EWS) to a stage driving part of an optical probe and projecting a laser beam to a prescribed position. CONSTITUTION:The testing device is provided with the optical probe 1 obtained by adding the stage driving part 4a to an optical probe 1b and the EWS 5 consisting of a display part 5a for previously storing the layout pattern 8 of the IC chip 3 to be tested and the circuit patterns 7 and displaying these patterns on the screen and so on. When a touch pen 6 contacts with the circuit point P of the pattern 7 to be tested, an irradiation point control signal Sp to be the position/movement information of the layout pattern of the IC chip 3 to be tested is transmitted to the stage driving part 4a of the optical probe 1 through a network l and the stage 4 and the IC chip 3 are moved, the irradiation point Q of the IC chip 3 is irradiated by laser beams L, and an optical signal is inputted to the IC chip. When the irradiation point Q is excited, a latch abnormal phenomenon e.g. is generated and an abnormal waveform is detected on a CRT 9, a defect is decided.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はICチップ試験装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an IC chip testing device.

〔従来の技術〕[Conventional technology]

従来から、半導体ウェーへのICチ、ブの表面に入力信
号を送るために接触をとるには、深針によるプローバや
光によるレーザープローバがあ夛、ICチップのレイア
ウトパターンを対眼レンズで目視しながら、ステージを
手動で移動して照射点を決めていた。
Traditionally, in order to make contact to send input signals to the surface of an IC chip on a semiconductor wafer, there have been many probers using deep needles and laser probers using light, and the layout pattern of the IC chip is visually observed with an objective lens. While doing so, the stage was manually moved to determine the irradiation point.

第2図は従来のICチップ試験装置の一例の模式図であ
る。
FIG. 2 is a schematic diagram of an example of a conventional IC chip testing device.

光プローバ1bは、対眼レンズ1aでステージ4上の被
試験ICチップ3のレイアウトパターンを拡大目視し、
X、Yのツマ<10を操作して所定の照射点Qにレーザ
ー光りを当て、端子ToにCRT9を接続して回路の特
性波形を検出1−て照射点Qの良否を試験する。
The optical prober 1b magnifies and visually observes the layout pattern of the IC chip 3 under test on the stage 4 using the objective lens 1a.
Operate the X and Y knobs <10 to irradiate a predetermined irradiation point Q with laser light, connect the CRT 9 to the terminal To, detect the characteristic waveform of the circuit, and test the quality of the irradiation point Q.

〔発明が解決しようとする腺題〕[Problem that the invention seeks to solve]

上述した従来のICチップ試験装置は、被試験ICチッ
プの不良解析を行う場合に、論理回路図上で不具合個所
の論理を検討し、レイアウトパターン図でその論理が配
置された位置を調べ、その位置をプローバのステージ上
に搭載したICチップのレイアウトパターンに対応する
照射点にレーザ光を当て、回路の出力波形特性を観察を
行っているので、レーザ光の照射点を常にレイアウトパ
ターン図と目視で対応しているため、捜索・解析に非常
に時間がかかるという欠点があった。
When performing failure analysis of the IC chip under test, the conventional IC chip testing equipment described above examines the logic of the defective location on the logic circuit diagram, examines the position where the logic is placed on the layout pattern diagram, and checks the logic. Since the output waveform characteristics of the circuit are observed by shining a laser beam on the irradiation point corresponding to the layout pattern of the IC chip mounted on the stage of the prober, the irradiation point of the laser beam can always be visually checked with the layout pattern diagram. The disadvantage is that it takes a lot of time to search and analyze.

本発明の目的は、被試験ICチップ上のレーザー光の照
射点の回路動作確認の容易なICチップ試験装置を提供
することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an IC chip testing device that allows easy confirmation of circuit operation at a laser beam irradiation point on an IC chip under test.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のICチップ試験装置は、照射点制御信号を入力
して駆動部によシ移動されるステージに搭載されている
半導体ウェーハの被試験ICチップの所定の照射点にレ
ーザ光を照射して前記被試験ICチップの回路信号を特
性検出器に出力する光ブローバと、前記被試験ICチッ
プのレイアウトパターン及び回路パターンを記憶し該回
路パターンを表示する表示部を有しかつ前記回路パター
ンの所定点に対応する前記レイアウトパターンの前記所
定の照射点に対応する前記照射点制御信号を配線を介し
て前記駆動部に供給するエンジニアリングワークテーシ
ョンとを含んで構成されている。
The IC chip testing apparatus of the present invention inputs an irradiation point control signal and irradiates a predetermined irradiation point of an IC chip under test on a semiconductor wafer mounted on a stage moved by a drive unit with a laser beam. an optical blower for outputting a circuit signal of the IC chip under test to a characteristic detector; and a display section for storing a layout pattern and a circuit pattern of the IC chip under test and displaying the circuit pattern; and an engineering workstation that supplies the irradiation point control signal corresponding to the predetermined irradiation point of the layout pattern corresponding to a fixed point to the drive unit via wiring.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の模式図である。FIG. 1 is a schematic diagram of an embodiment of the present invention.

光プローバ1は、第2図の従来の光プローバlbにステ
ージ駆動部4aを付加した光プローバ1と、被試験IC
チップ3のレイアウトパターン8及び回路パターン7を
予め記憶し回路パターン7を画面表示する表示部5aを
有しかつ回路パターン7の試験する回路点Pに対応する
レイアウトパターン8の試験すべき個所に対応する照射
点Qにレーザー光りを照射する照射点制御信号Spt出
力するエンジニャリングワークステーション(以下EW
Sと云う)5と會有している。
The optical prober 1 includes the conventional optical prober lb shown in FIG. 2 with a stage drive section 4a added thereto, and an IC under test.
It has a display section 5a that stores the layout pattern 8 and circuit pattern 7 of the chip 3 in advance and displays the circuit pattern 7 on the screen, and corresponds to the portion to be tested in the layout pattern 8 corresponding to the circuit point P to be tested in the circuit pattern 7. An engineering workstation (hereinafter EW
I have a meeting with 5 (named S).

タッチペン6で試験する回路パターン70回路点Pに触
れると試験すべきICテップ3のレイアウトパターンの
位置・移動情報である照射点制御信号SPがネットワー
ク!を介して光プローバ1のステージ駆動部4aに伝達
され、ステージ4とICテップ3が移動してICチップ
3の照射点Qにレーザー光りが当シ、光信号をICチッ
プ内に入力する。
When you touch the circuit pattern 70 circuit point P to be tested with the touch pen 6, the irradiation point control signal SP, which is the position/movement information of the layout pattern of the IC chip 3 to be tested, is sent to the network! The laser beam is transmitted to the stage drive unit 4a of the optical prober 1 through the laser beam, and the stage 4 and IC chip 3 move to apply laser light to the irradiation point Q of the IC chip 3, thereby inputting the optical signal into the IC chip.

照射点Qが光によシ励起され、例えばラッチ異常現象が
生じてCB、T9に異常な波形が検出される場合は不良
と判定する。
If the irradiation point Q is excited by light and, for example, a latch abnormality phenomenon occurs and abnormal waveforms are detected at CB and T9, it is determined to be defective.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、EWSと、光プローバを
ネットワークで接続し、EWSに予め記憶した回路パタ
ーン、レイアウトパターンの関係から照射点制御信号を
光ブローバのステージ駆動部に入力してレーザー光を所
定個所に光てるので、被試験ICチップの論理回路の動
作確認が短時間にできる効果がある。
As explained above, the present invention connects an EWS and an optical prober through a network, and inputs an irradiation point control signal to the stage drive section of the optical blower based on the relationship between the circuit pattern and layout pattern stored in advance in the EWS to emit laser light. Since the light is emitted at a predetermined location, the operation of the logic circuit of the IC chip under test can be confirmed in a short time.

従来のICチップ試験装置の一例の模式図である。FIG. 1 is a schematic diagram of an example of a conventional IC chip testing device.

1・・・・・・光プローバ、2・・・・・・レーザ発光
器、3・・・・・・被試験ICチップ、4・・・・ステ
ージ、4a・・・・・・ステージ駆動部、5・・・・・
・エンジニアリングワークツデーション、5a・・・・
・・表示部、6・・・・−・タッチペン、7・・・・・
・回路パターン、8・・・・・・レイアウトパターン、
9・・・・・・CR’l”、L・・・・・・レーザ光、
P・・・・・・回路点、Q・・・・・・照射点、BP・
・・・・・照射点制御信号。
1... Optical prober, 2... Laser emitter, 3... IC chip under test, 4... Stage, 4a... Stage drive unit , 5...
・Engineering Works Duration, 5a...
・・Display section, 6・・−・Touch pen, 7・・・・・
・Circuit pattern, 8...Layout pattern,
9...CR'l'', L...Laser light,
P...Circuit point, Q...Irradiation point, BP.
...Irradiation point control signal.

代理人 弁理士  内 原   晋Agent: Patent Attorney Susumu Uchihara

【図面の簡単な説明】[Brief explanation of the drawing]

Claims (1)

【特許請求の範囲】[Claims] 照射点制御信号を入力して駆動部により移動するステー
ジに搭載されている半導体ウェーハの被試験ICチップ
の所定の照射点にレーザ光を照射して前記被試験ICチ
ップの回路信号を特性検出器に出力する光プローバと、
前記被試験ICチップのレイアウトパターン及び回路パ
ターンを記憶し該回路パターンを表示する表示部を有し
かつ前記回路パターンの試験点に対応する前記レイアウ
トパターンの前記所定の照射点に対応する前記照射点制
御信号を配線を介して前記駆動部に供給するエンジニア
リングワークテーションとを含むことを特徴とするIC
チップ試験装置。
A characteristic detector inputs an irradiation point control signal, irradiates a predetermined irradiation point of an IC chip under test on a semiconductor wafer mounted on a stage moved by a drive unit with a laser beam, and detects the circuit signal of the IC chip under test. an optical prober that outputs to
The irradiation point corresponds to the predetermined irradiation point of the layout pattern, which has a display section that stores the layout pattern and circuit pattern of the IC chip under test and displays the circuit pattern, and corresponds to the test point of the circuit pattern. an engineering workstation that supplies a control signal to the drive unit via wiring.
Chip testing equipment.
JP63219303A 1988-08-31 1988-08-31 Testing device for ic chip Pending JPH0266477A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63219303A JPH0266477A (en) 1988-08-31 1988-08-31 Testing device for ic chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63219303A JPH0266477A (en) 1988-08-31 1988-08-31 Testing device for ic chip

Publications (1)

Publication Number Publication Date
JPH0266477A true JPH0266477A (en) 1990-03-06

Family

ID=16733378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63219303A Pending JPH0266477A (en) 1988-08-31 1988-08-31 Testing device for ic chip

Country Status (1)

Country Link
JP (1) JPH0266477A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276848A (en) * 1985-11-15 1987-12-01 フエアチヤイルド セミコンダクタコ−ポレ−シヨン Electron beam test probe system for integrated circuit analysis

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62276848A (en) * 1985-11-15 1987-12-01 フエアチヤイルド セミコンダクタコ−ポレ−シヨン Electron beam test probe system for integrated circuit analysis

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