JPH0265227A - Impurity diffusion into semiconductor substrate - Google Patents

Impurity diffusion into semiconductor substrate

Info

Publication number
JPH0265227A
JPH0265227A JP21774688A JP21774688A JPH0265227A JP H0265227 A JPH0265227 A JP H0265227A JP 21774688 A JP21774688 A JP 21774688A JP 21774688 A JP21774688 A JP 21774688A JP H0265227 A JPH0265227 A JP H0265227A
Authority
JP
Japan
Prior art keywords
impurity
wafer
gas
temperature
furnace
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21774688A
Other languages
Japanese (ja)
Inventor
Nobuyoshi Sato
伸良 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP21774688A priority Critical patent/JPH0265227A/en
Publication of JPH0265227A publication Critical patent/JPH0265227A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To equalize the impurity concentration of respective semiconductor substrate by a method wherein the impurity is diffused on the semiconductor substrate after the temperature in a diffusion furnace has a temperature-gradient so that the in-furnace temperature on the gas exhaust side may be increased higher than that on the gas supply side. CONSTITUTION:A heating coil on the top side of a tube 3 is supplied with specified current to be increased in proportion to the downward distance from the top side so that the in-furnace temperature in a wafer mounting part may have a temperature-gradient slowly increasing from the gas supply side to the gas exhaust side. Since the impurity diffusion reaction starts from the wafer on the gas supply side, the reaction time of the wafer 4 on the gas supply side to the impurity gas is longer than that of the wafer 4 on the gas exhaust side taking the direction to increase the impurity concentration in the wafer 4. However, the reaction temperature on the gas supply side is lower than that of the gas exhaust side to increase the impurity diffusion rate on the gas exhaust side. Consequently, the impurity concentration in the wafer 4 can be equalized regardless of the wafer mounting positions.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、不純物ガスが供給された拡散炉内に配置され
た半導体基板に不純物を拡散してなる半導体基板への不
純物拡散方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for diffusing impurities into a semiconductor substrate, which comprises diffusing impurities into a semiconductor substrate placed in a diffusion furnace supplied with impurity gas.

〔従来の技術〕[Conventional technology]

従来の半導体基板への不純物拡散方法としては、例えば
、特開昭63−42119号に開示されたものが存在す
る。
As a conventional method for diffusing impurities into a semiconductor substrate, for example, there is a method disclosed in Japanese Patent Application Laid-Open No. 63-42119.

この従来例によれば、石英ポートに複数の半導体基板を
配置し、そして、この石英ボートを石英炉心管に挿入し
て、均一温度に維持された炉心管内に不純物ガスを供給
している。不純物ガスとしては、POCl3を用い、こ
の不純物ガスを炉心管の一方から供給し、他端から排出
している。
According to this conventional example, a plurality of semiconductor substrates are arranged in a quartz port, and the quartz boat is inserted into a quartz furnace tube to supply impurity gas into the furnace tube maintained at a uniform temperature. POCl3 is used as the impurity gas, and this impurity gas is supplied from one end of the furnace tube and discharged from the other end.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

一般に、半導体基板に拡散される不純物量は、半導体基
板と不純物ガスとの反応時間の長さと、反応温度(拡散
炉内温度)の高さに比例する。上記従来法では、半導体
基板を設置する部位での炉内温度分布は均一である一方
で、不純物ガス供給側の半導体基板の方より不純物の拡
散反応が生していくことから、ガス供給側の半導体基板
と不純物ガスとの反応時間は、ガス排出側の半導体基板
のそれより長くなる。この為、半導体基板の間で不純物
の拡散量が異なる結果、均一な特性を有する半導体基板
を得ることが出来ないとう課題があった。
Generally, the amount of impurities diffused into a semiconductor substrate is proportional to the length of reaction time between the semiconductor substrate and impurity gas and the height of the reaction temperature (temperature inside the diffusion furnace). In the above conventional method, while the temperature distribution inside the furnace is uniform at the location where the semiconductor substrate is installed, the diffusion reaction of impurities occurs from the semiconductor substrate on the impurity gas supply side. The reaction time between the semiconductor substrate and the impurity gas is longer than that for the semiconductor substrate on the gas discharge side. For this reason, the amount of diffusion of impurities differs between semiconductor substrates, resulting in a problem that semiconductor substrates having uniform characteristics cannot be obtained.

本発明はこのような従来の課題を解決する為に、各半導
体基板の不純物濃度を均一にすることが出来る、半導体
基板への不純物拡散方法を提供することを目的とする。
In order to solve such conventional problems, it is an object of the present invention to provide a method for diffusing impurities into semiconductor substrates, which can make the impurity concentration of each semiconductor substrate uniform.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成する為に、本発明は拡散炉内に半導体基
板を配置し、当該拡散炉のガス供給側から不純物ガスを
供給し、ガス排出側から当該不純物ガスを排出して、前
記半導体基板に不純物を拡散する半導体基板への不純物
拡散方法において、前記ガス供給側の炉内温度よりガス
排出側の炉内温度が高くなるように、前記拡散炉内に温
度勾配を形成して、半導体基板に不純物の拡散を行うこ
とを特徴とするものである。
In order to achieve the above object, the present invention disposes a semiconductor substrate in a diffusion furnace, supplies an impurity gas from the gas supply side of the diffusion furnace, discharges the impurity gas from the gas discharge side, and then disposes the semiconductor substrate in a diffusion furnace. In a method for diffusing impurities into a semiconductor substrate, a temperature gradient is formed in the diffusion furnace so that the temperature inside the furnace on the gas discharge side is higher than the temperature inside the furnace on the gas supply side. This method is characterized by diffusing impurities.

〔作用〕[Effect]

上記本発明によれば、不純物ガス供給側において、拡散
炉内温度が低い一方で、不純物ガス排出側において、拡
散炉内温度が高い。
According to the present invention, the temperature inside the diffusion furnace is low on the impurity gas supply side, while the temperature inside the diffusion furnace is high on the impurity gas discharge side.

従って、不純物ガス供給側における半導体基板と不純物
ガスとの接触時間とが、不純物ガス排出側における半導
体基板のそれより長くても、不純物ガス排出側における
半導体基板への不純物拡散速度は、不純物ガス供給側の
それよりも大きくなる。
Therefore, even if the contact time between the semiconductor substrate and the impurity gas on the impurity gas supply side is longer than that of the semiconductor substrate on the impurity gas discharge side, the impurity diffusion rate into the semiconductor substrate on the impurity gas discharge side is be larger than that on the side.

この結果、拡散炉内の各半導体基板の不純物濃度を同じ
くする事が出来るため、均一な特性を有する半導体基板
を提供できる。
As a result, the impurity concentration of each semiconductor substrate in the diffusion furnace can be made the same, so that semiconductor substrates having uniform characteristics can be provided.

〔実施例〕〔Example〕

次に、本発明の一実施例について説明する。 Next, one embodiment of the present invention will be described.

第1図にこの一実施例を実施する為の縦型不純物拡散装
置の継断面構成図を示す。
FIG. 1 shows a joint cross-sectional configuration diagram of a vertical impurity diffusion device for implementing this embodiment.

第1図において、不純物拡散装置30は、拡散炉である
、円筒形状の石英製チューブ3と、このチューブ3内に
設けられ、複数の半導体基板(ウェハ)4を載置した載
置台2(石英ボート)と、ボート支持台5と、上記チュ
ーブ3の頭頂部に設けられたガス供給部6に不純物ガス
1を導入する不純物ガス供給配管12と、上記チューブ
3の底部に設けられたガス排出部7を備えてなる。
In FIG. 1, an impurity diffusion device 30 includes a cylindrical quartz tube 3, which is a diffusion furnace, and a mounting table 2 (quartz quartz tube) provided inside the tube 3 and on which a plurality of semiconductor substrates (wafers) 4 are placed. boat), a boat support stand 5, an impurity gas supply pipe 12 for introducing impurity gas 1 into the gas supply section 6 provided at the top of the tube 3, and a gas discharge section provided at the bottom of the tube 3. It will be equipped with 7.

更に、上記チューブ3の外周には、当該チューブ回りに
配設された加熱装置8が設けられている。
Further, on the outer periphery of the tube 3, a heating device 8 is provided around the tube.

この加熱装置8は複数の加熱コイルからなり、各々の加
熱コイルには図示しない電源が接続されている。
This heating device 8 consists of a plurality of heating coils, each of which is connected to a power source (not shown).

次に、上記本実施例の動作について説明する。Next, the operation of the above embodiment will be explained.

図示しない不純物ガス源から発生した不純物ガス1ば、
供給配管12を通ってチューブ3の頭頂部のガス供給部
6に至る。
Impurity gas 1B generated from an impurity gas source (not shown),
It passes through the supply pipe 12 and reaches the gas supply section 6 at the top of the tube 3.

ガス供給部6に到達した不純物ガス1は、チューブ3の
底部に形成されたガス排出部7に向かって、チューブ3
内を移動する。
The impurity gas 1 that has reached the gas supply section 6 flows toward the gas discharge section 7 formed at the bottom of the tube 3.
move within.

不純物ガス1がチューブ3内を下方に向かって移動する
際に、ウェハ4にガス中の不純物が付着し、次いで拡散
する反応が生じる。この際、加熱装置8はチューブ3を
加熱して炉内温度を高めることにより、上記拡散反応を
促進している。
When the impurity gas 1 moves downward within the tube 3, a reaction occurs in which the impurities in the gas adhere to the wafer 4 and then diffuse. At this time, the heating device 8 accelerates the diffusion reaction by heating the tube 3 and increasing the temperature inside the furnace.

この加熱装置8によるチューブ3の加熱に際しては、加
熱コイルの各々に別個に制御された電流を供給して、炉
内温度を炉内の高さ方向に制御することが可能となって
いる。
When the tube 3 is heated by the heating device 8, a separately controlled current is supplied to each of the heating coils, so that the temperature inside the furnace can be controlled in the height direction within the furnace.

上記本実施例では、チューブ3の頭頂部側の加熱コイル
に所定の電流を供給し、チューブ3の下方に行くにした
がって、加熱コイルに流れる電流を大きい高い値とする
ことにより、ウェハ載置部の炉内温度が、ガス供給側か
らガス排出側に向かって徐々に高くなるように温度勾配
を形成している。即ち、ウェハ載置部のガス供給側(チ
ューブ3の頭頂部側)は炉内温度が設定温度より低くな
り、一方、ウェハ載置部のガス排出側(チューブ3の底
部側)は炉内温度が設定温度より高くなっている。
In this embodiment, a predetermined current is supplied to the heating coil on the top side of the tube 3, and the current flowing through the heating coil increases as it goes below the tube 3. A temperature gradient is formed such that the temperature inside the furnace gradually increases from the gas supply side to the gas discharge side. In other words, the furnace temperature on the gas supply side of the wafer placement part (top side of tube 3) is lower than the set temperature, while the furnace temperature on the gas discharge side of the wafer placement part (bottom side of tube 3) is lower than the set temperature. is higher than the set temperature.

不純物拡散反応は、ガス供給側のウェハから始まる為、
ガス供給側のウェハの方がガス排出側のウェハに比較し
て、不純物ガスとの反応時間が長くなり、ウェハ内の不
純物濃度が高くなる方向となる。しかし、上記実施例に
おいては、ガス供給側(チューブ3の頭頂部側)では、
ガス排出側(チューブ3の底部側)に比べて、反応温度
が低い為に、不純物拡散速度はガス排出側で大きくなる
。従って、ウェハ内不純物濃度はウェハの載置位置に拘
わらず均一とすることが可能となる。
Since the impurity diffusion reaction starts from the wafer on the gas supply side,
The wafer on the gas supply side takes longer to react with the impurity gas than the wafer on the gas discharge side, and the impurity concentration within the wafer tends to be higher. However, in the above embodiment, on the gas supply side (top side of the tube 3),
Since the reaction temperature is lower than that on the gas discharge side (the bottom side of the tube 3), the impurity diffusion rate is higher on the gas discharge side. Therefore, the impurity concentration within the wafer can be made uniform regardless of the placement position of the wafer.

炉内温度の勾配は、ウェハ4の載置枚数、チューブ1の
大きさ等種々の条件によって適宜決定することが出来る
が、ガス供給側からガス排出側に行くにしたがって、1
〜20°C高くなるように設定する事が望ましい。温度
勾配が1°C未満では、ガス排出側のウェハへの不純物
拡散速度が小さくり、一方、20° Cを越えると、ガ
ス排出側のウェハへの不純物拡散速度が太き(なって、
ガス供給側とガス排出側とのウェハ内不純物濃度を均一
にすることが出来ない為である。
The temperature gradient in the furnace can be appropriately determined depending on various conditions such as the number of wafers 4 placed and the size of the tube 1.
It is desirable to set the temperature to be ~20°C higher. If the temperature gradient is less than 1°C, the rate of impurity diffusion to the wafer on the gas exhaust side will be low; on the other hand, if it exceeds 20°C, the rate of impurity diffusion to the wafer on the gas exhaust side will be high (so that
This is because it is not possible to make the impurity concentration within the wafer uniform between the gas supply side and the gas discharge side.

上記実施例において、ウェハ4はチューブ3内で多くの
場合1000″C以上に加熱される。シリコンウェハに
対する拡散不純物はp形に硼素。
In the embodiments described above, the wafer 4 is heated in the tube 3 to temperatures above 1000''C in most cases.The diffusion impurity for the silicon wafer is boron in the p-type.

n形にりんが代表的である。多くの場合、不純物は化合
物の形で不活性ガス及び酸素とともに加熱されたチュー
ブ内に導かれたシリコン表面に運ばれる。
N-type phosphorus is typical. In many cases, impurities are carried in the form of compounds to the silicon surface, which is led into a heated tube with an inert gas and oxygen.

不純物の拡散に際しては、設定温度に対して、上記温度
勾配を形成した状態で、必要な時間この状態を維持する
。この際、不純物の付着と拡散を同一工程で行うか、ま
たは、拡散工程を2段階に分けて、第1段階はプレデポ
ジションと呼ばれる工程でシリコンの表面に比較的浅く
不純物を拡散し、次いで、第2段階で不純物ガスの供給
を止め、酸化性ガスを送って酸化膜を生成しながら、拡
散を行なうごともできる。
When diffusing impurities, the above-mentioned temperature gradient is formed with respect to the set temperature, and this state is maintained for a necessary time. At this time, the attachment and diffusion of the impurity can be performed in the same process, or the diffusion process can be divided into two stages.The first stage is a process called pre-deposition, in which the impurity is diffused relatively shallowly into the silicon surface, and then, In the second stage, the supply of impurity gas may be stopped and oxidizing gas may be sent to generate an oxide film while performing diffusion.

次に、具体的な実験例について説明する。Next, a specific experimental example will be explained.

上記第1図において説明した縦型不純物拡散炉のガス供
給側から排出側に向かって、複数のウェハを設置して不
純物の拡散実験を行った。本実験例に用いたウェハは第
2図の断面図に示すように、N形基板(11)SiO□
 (10)を500オングストローム厚さに形成し、更
に、多結晶5t(9)を形成した3層構造となっている
An impurity diffusion experiment was conducted by installing a plurality of wafers from the gas supply side to the discharge side of the vertical impurity diffusion furnace described in FIG. 1 above. As shown in the cross-sectional view of Figure 2, the wafer used in this experimental example was an N-type substrate (11) of SiO□
It has a three-layer structure in which (10) is formed to a thickness of 500 angstroms and polycrystalline 5t (9) is further formed.

チューブ3に供給される不純物ガスとしては、POCl
3を用いた。そして、炉の上部(ガス供給側)の炉内温
度を設定温度より5° C低い845° Cとし、炉の
下部(ガス排出側)の炉内温度を設定温度より5° C
高い855° Cとなるように、加熱装置8の加熱コイ
ルに供給される電流を制御する。即ち、第3図に示すよ
うに、チューブ3内温度(炉内反応温度)は、ガス供給
側とガス排出側との間で10° Cの温度勾配が形成さ
れている。
The impurity gas supplied to the tube 3 is POCl
3 was used. The temperature in the upper part of the furnace (gas supply side) was set to 845°C, which is 5°C lower than the set temperature, and the temperature in the lower part of the furnace (gas discharge side) was set to 845°C, which was 5°C lower than the set temperature.
The current supplied to the heating coil of the heating device 8 is controlled so as to achieve a high temperature of 855°C. That is, as shown in FIG. 3, the temperature inside the tube 3 (furnace reaction temperature) has a temperature gradient of 10° C. between the gas supply side and the gas discharge side.

つぎに、上記本実験例で得られた各不純物拡散ウェハの
拡散不純物濃度の比較を行った。ウェハ内に拡散した不
純物量を比較するファクタとして、シート抵抗を用いた
。このシート抵抗が低い程、ウェハ内に拡散した不純物
濃度が高く、シート抵抗が高い程、ウェハ内に拡散した
不純物濃度が低いことになる。実際の不純物濃度は、電
気的に活性化されていないものまで含むと少し高く見積
もることができる。
Next, the diffusion impurity concentrations of the respective impurity diffusion wafers obtained in the present experimental example were compared. Sheet resistance was used as a factor for comparing the amount of impurities diffused into the wafer. The lower the sheet resistance, the higher the concentration of impurities diffused into the wafer, and the higher the sheet resistance, the lower the concentration of impurities diffused into the wafer. The actual impurity concentration can be estimated a little higher if it includes impurities that are not electrically activated.

第4図に上記本実験例で得られたウェハのシート抵抗を
示す。第4図において、縦軸は、各ウェハのシート抵抗
を示し、横軸は、チューブ3内のウェハ載置台(ボート
、2)におけるウェハ載置位置(頂部〜中心部〜底部)
を示す。
FIG. 4 shows the sheet resistance of the wafer obtained in this experimental example. In FIG. 4, the vertical axis shows the sheet resistance of each wafer, and the horizontal axis shows the wafer mounting position (top to center to bottom) on the wafer mounting table (boat, 2) in the tube 3.
shows.

一方、第5図に炉内温度を850° Cに固定して、温
度勾配を付けない比較例によってウェハに不純物を拡散
した場合の各ウェハのシート抵抗を示す。
On the other hand, FIG. 5 shows the sheet resistance of each wafer when impurities were diffused into the wafer according to a comparative example in which the furnace temperature was fixed at 850° C. and no temperature gradient was applied.

第4図によれば、チューブ3内のウェハ載置位置に関係
なく、チューブの頂部または底部に設置された各ウェハ
のウェハ間及びウェハ内のシート抵抗ば共に、30±4
Ω/口となり、各ウェハ間及びウェハ内で差が無く、各
ウェハ間及びウエノ\内の不純物拡散濃度が同じである
ことがわかる。
According to FIG. 4, regardless of the wafer placement position within the tube 3, the inter-wafer and intra-wafer sheet resistance of each wafer placed at the top or bottom of the tube is 30±4.
It can be seen that there is no difference between each wafer or within a wafer, and that the impurity diffusion concentration between each wafer and within a wafer is the same.

一方、第5図に示す比較例によれば、ガス供給側(チュ
ーブ頂部)のウェハのシート抵抗は22±2Ω/口 で
あるが、ガス排出側(チューブ底部)のシート抵抗ば3
5±10Ω/口となり、ウェハの載置位置がチューブ底
部に行くにしたがって、不純物拡散濃度が少ない値とな
ることがわかる。そして、ウェハ内でもシート抵抗がバ
ラつき、不純物拡散濃度に差が有ることが分かる。特に
、このハラつきはガス排出側で大きい事が分かる。
On the other hand, according to the comparative example shown in Fig. 5, the sheet resistance of the wafer on the gas supply side (top of the tube) is 22 ± 2 Ω/mouth, but the sheet resistance of the wafer on the gas discharge side (bottom of the tube) is 3.
It can be seen that the impurity diffusion concentration decreases as the wafer placement position moves toward the bottom of the tube. It can also be seen that the sheet resistance varies within the wafer, and there is a difference in the impurity diffusion concentration. It can be seen that this sluggishness is particularly large on the gas exhaust side.

これに対し、上記第4図に示す本発明法によれは、ウェ
ハ間及びウェハ内で、シート抵抗のハラつきが小さく、
不純物拡散濃度に差がないことが分かる。従って、上記
実施例によれば、チューブ3内に設置した全てのウェハ
の不純物拡散濃度を均一にすることが出来る。
In contrast, according to the method of the present invention shown in FIG. 4, there is little variation in sheet resistance between and within wafers, and
It can be seen that there is no difference in impurity diffusion concentration. Therefore, according to the above embodiment, the impurity diffusion concentration of all the wafers installed in the tube 3 can be made uniform.

なお、上記第1図に説明した実施例において、チューブ
3内の温度をフィードハック制御することもできる。こ
の場合、チューブ3内の頭頂部から底部にかけて、複数
の温度検出手段を配設し、炉内温度を検出して、各加熱
コイルに供給される電流を制御することにより正確な温
度勾配を実現することができ、均一な特性の半導体基板
を得ることができる。
In the embodiment described in FIG. 1 above, the temperature inside the tube 3 can also be controlled by feed hacking. In this case, a plurality of temperature detection means are arranged inside the tube 3 from the top to the bottom, detecting the temperature inside the furnace, and controlling the current supplied to each heating coil to achieve an accurate temperature gradient. Therefore, a semiconductor substrate with uniform characteristics can be obtained.

また、加熱方法はコイルを使用する方法である必要はな
く、種々の加熱方法を選択することが可能である。
Further, the heating method does not necessarily have to be a method using a coil, and various heating methods can be selected.

また、上記本実施例では、温度勾配を直線的に形成した
が、これに限定されず、所定カーブの温度勾配を形成す
ることも可能である。
Further, in the present embodiment, the temperature gradient is formed linearly, but the temperature gradient is not limited to this, and it is also possible to form a temperature gradient having a predetermined curve.

〔発明の効果〕〔Effect of the invention〕

以上説明したように11本発明に係る半導体基板への不
純物拡散方法によれば、不純物ガス供給側において、拡
散炉内温度が低い一方で、不純物ガス排出側において、
拡散炉内温度が高くなるように温度勾配を形成している
ため、拡散炉内の各半導体基板の不純物濃度を同しくす
る事が出来る。
As explained above, according to the impurity diffusion method into a semiconductor substrate according to the present invention, while the temperature inside the diffusion furnace is low on the impurity gas supply side, on the impurity gas discharge side,
Since a temperature gradient is formed so that the temperature inside the diffusion furnace becomes high, it is possible to make the impurity concentration of each semiconductor substrate within the diffusion furnace the same.

その結果、均一の特性を有する半導体基板を提供できる
という効果を奏する。
As a result, it is possible to provide a semiconductor substrate with uniform characteristics.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例を実施する為の縦型不純物
拡散装置の縦断面構成図、第2図は不純物の拡散実験に
用いたウェハの断面構成図、第3図は、不純物拡散実験
において形成された温度分布の説明模式図、第4図は本
発明にかかる不純物拡散実験例で得られたウェハのシー
ト抵抗を示す特性図、第5図は比較例にがかるウェハの
シート抵抗を示す特性図である。 図中、■は不純物ガス、2はウェハ載置台−(ボート)
、3はガス拡散炉(チューブ)、4ばウェハ、5はボー
ト支持台、6はガス供給部、7はガス排出部、8は加熱
装置を示す。
FIG. 1 is a vertical cross-sectional configuration diagram of a vertical impurity diffusion device for carrying out an embodiment of the present invention, FIG. 2 is a cross-sectional configuration diagram of a wafer used in an impurity diffusion experiment, and FIG. A schematic diagram explaining the temperature distribution formed in the diffusion experiment, FIG. 4 is a characteristic diagram showing the sheet resistance of the wafer obtained in the impurity diffusion experiment example according to the present invention, and FIG. 5 is the sheet resistance of the wafer according to the comparative example. FIG. In the figure, ■ is an impurity gas, 2 is a wafer mounting table (boat)
, 3 is a gas diffusion furnace (tube), 4 is a wafer, 5 is a boat support, 6 is a gas supply section, 7 is a gas discharge section, and 8 is a heating device.

Claims (1)

【特許請求の範囲】[Claims] (1)拡散炉内に半導体基板を配置し、当該拡散炉のガ
ス供給側から不純物ガスを供給し、ガス排出側から当該
不純物ガスを排出して、前記半導体基板に不純物を拡散
する半導体基板への不純物拡散方法において、前記ガス
供給側の炉内温度よりガス排出側の炉内温度が高くなる
ように、前記拡散炉内に温度勾配を形成して、半導体基
板に不純物の拡散を行うことを特徴とする半導体基板へ
の不純物拡散方法。
(1) A semiconductor substrate is placed in a diffusion furnace, an impurity gas is supplied from the gas supply side of the diffusion furnace, the impurity gas is discharged from the gas discharge side, and the impurity is diffused into the semiconductor substrate. In the impurity diffusion method, impurities are diffused into the semiconductor substrate by forming a temperature gradient in the diffusion furnace so that the temperature in the furnace on the gas discharge side is higher than the temperature in the furnace on the gas supply side. Characteristic impurity diffusion method into semiconductor substrates.
JP21774688A 1988-08-31 1988-08-31 Impurity diffusion into semiconductor substrate Pending JPH0265227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21774688A JPH0265227A (en) 1988-08-31 1988-08-31 Impurity diffusion into semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21774688A JPH0265227A (en) 1988-08-31 1988-08-31 Impurity diffusion into semiconductor substrate

Publications (1)

Publication Number Publication Date
JPH0265227A true JPH0265227A (en) 1990-03-05

Family

ID=16709101

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21774688A Pending JPH0265227A (en) 1988-08-31 1988-08-31 Impurity diffusion into semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH0265227A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498637A (en) * 1990-08-13 1992-03-31 Sharp Corp Reservation video recording system for vtr
JPH0543541U (en) * 1991-11-15 1993-06-11 国際電気株式会社 Vertical diffusion device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498637A (en) * 1990-08-13 1992-03-31 Sharp Corp Reservation video recording system for vtr
JPH0543541U (en) * 1991-11-15 1993-06-11 国際電気株式会社 Vertical diffusion device

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