JPH0264245U - - Google Patents
Info
- Publication number
- JPH0264245U JPH0264245U JP14365788U JP14365788U JPH0264245U JP H0264245 U JPH0264245 U JP H0264245U JP 14365788 U JP14365788 U JP 14365788U JP 14365788 U JP14365788 U JP 14365788U JP H0264245 U JPH0264245 U JP H0264245U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- input
- reception
- initial setting
- setting value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 8
- 230000001960 triggered effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Noise Elimination (AREA)
- Mobile Radio Communication Systems (AREA)
Description
第１図はこの考案の一実施例による受信波妨害
検出装置のブロツク図、第２図は第１図の動作を
示すフローチヤート図、第３図はこの考案の他の
実施例を示す受信波妨害検出装置のブロツク図、
第４図は従来の受信波妨害検出装置のブロツク図
を示す。
図において、１は受信入力、２は周波数代行制
御出力、３はキヤリア検出回路、４はトリガ回路
、５はパルス発生回路、６は連続カウンタ回路、
７は比較回路、８はタイマ回路、９は周波数代行
トリガ回路、１０は初期設定値Ａ、１１は初期設
定値Ｂ、１２はリセツト入力、１３は１０進カウ
ンタ回路、１４はＤ−Ａ変換回路、１５はＶ−Ｆ
変換回路、１６は分周回路、１７は制御局、１８
は制御装置、１９は送受信装置、２０は記憶装置
、２１は中空線系、２２は移動局、２３は指令局
、２４は制御用チヤネル、２５は通話用チヤネル
、２６は妨害波、２７は妨害移動局である。なお
、図中同一符号は同一、又は相当部分を示す。
Fig. 1 is a block diagram of a received wave interference detection device according to one embodiment of this invention, Fig. 2 is a flowchart showing the operation of Fig. 1, and Fig. 3 is a received wave interference detection device showing another embodiment of this invention. Block diagram of interference detection device,
FIG. 4 shows a block diagram of a conventional received wave interference detection device. In the figure, 1 is a reception input, 2 is a frequency substitution control output, 3 is a carrier detection circuit, 4 is a trigger circuit, 5 is a pulse generation circuit, 6 is a continuous counter circuit,
7 is a comparison circuit, 8 is a timer circuit, 9 is a frequency substitution trigger circuit, 10 is an initial setting value A, 11 is an initial setting value B, 12 is a reset input, 13 is a decimal counter circuit, and 14 is a D-A conversion circuit. , 15 is V-F
conversion circuit, 16 is a frequency dividing circuit, 17 is a control station, 18
1 is a control device, 19 is a transmitting/receiving device, 20 is a storage device, 21 is a hollow wire system, 22 is a mobile station, 23 is a command station, 24 is a control channel, 25 is a communication channel, 26 is an interference wave, and 27 is an interference device. It is a mobile station. Note that the same reference numerals in the figures indicate the same or equivalent parts.
Claims (1)
により構成される中継装置（制御局）を使用して
通信を行う場合、希望波と妨害波を受信入力とし
て取込むキヤリア検出回路と、上記キヤリア検出
回路の出力信号によつてトリガーされ予めリセツ
ト済みの連続カウンタ回路と、初期設定値を入力
ずみの比較回路とタイマ回路と、上記カウンタ回
路が計数した受信入力の受信時間を上記比較回路
で設定値と比較して初期設定値を越えている継続
時間を設定値入力ずみの上記タイマ回路で比較し
て妨害波の識別を行い周波数代行制御出力を発生
する周波数代行トリガ回路とを備えた受信波妨害
検出装置。 When communicating using a relay device (control station) consisting of one control channel and multiple communication channels, a carrier detection circuit that takes in desired waves and interference waves as reception inputs, and the carrier detection circuit described above are used. A continuous counter circuit that is triggered by the output signal of the circuit and has been reset in advance, a comparison circuit and a timer circuit into which the initial setting value has been input, and the reception time of the reception input counted by the above counter circuit is set to the value set by the above comparison circuit. and a frequency proxy trigger circuit that compares the duration exceeding the initial setting value with the above-mentioned timer circuit to which the set value has been input, identifies the interference wave, and generates a frequency proxy control output. Detection device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14365788U JPH0264245U (en) | 1988-11-02 | 1988-11-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14365788U JPH0264245U (en) | 1988-11-02 | 1988-11-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0264245U true JPH0264245U (en) | 1990-05-15 |
Family
ID=31410673
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14365788U Pending JPH0264245U (en) | 1988-11-02 | 1988-11-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0264245U (en) |
-
1988
- 1988-11-02 JP JP14365788U patent/JPH0264245U/ja active Pending
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