JPH01162961U - - Google Patents

Info

Publication number
JPH01162961U
JPH01162961U JP5253689U JP5253689U JPH01162961U JP H01162961 U JPH01162961 U JP H01162961U JP 5253689 U JP5253689 U JP 5253689U JP 5253689 U JP5253689 U JP 5253689U JP H01162961 U JPH01162961 U JP H01162961U
Authority
JP
Japan
Prior art keywords
signal
level
output
gate
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5253689U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5253689U priority Critical patent/JPH01162961U/ja
Publication of JPH01162961U publication Critical patent/JPH01162961U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の基礎となる構成の通信装置の
全体の系統図、第2図は或る提案された構成の動
作を説明するための波形図、第3図は本考案の一
実施例の送信機3のブロツク図、第4図は本考案
の一実施例の受信機4のブロツク図、第5図は第
3図および第4図に示された実施例の動作を説明
するための波形図である。 1,2……送受信装置、3,5……送信機、4
,6……受信機、8……マイクロホン、9,10
……プレストークスイツチ、13,17……処理
回路、14……発光素子、15……受光素子、1
6……受信回路、18……スピーカ、21……フ
リツプフロツプ、22……ANDゲート、25…
…リレー。
Fig. 1 is an overall system diagram of a communication device with a configuration that is the basis of the present invention, Fig. 2 is a waveform diagram for explaining the operation of a certain proposed configuration, and Fig. 3 is an embodiment of the present invention. 4 is a block diagram of a receiver 4 according to an embodiment of the present invention, and FIG. 5 is a block diagram for explaining the operation of the embodiment shown in FIGS. 3 and 4. FIG. 1, 2... Transmitting/receiving device, 3, 5... Transmitter, 4
, 6...Receiver, 8...Microphone, 9,10
...Press talk switch, 13, 17... Processing circuit, 14... Light emitting element, 15... Light receiving element, 1
6... Receiving circuit, 18... Speaker, 21... Flip-flop, 22... AND gate, 25...
…relay.

Claims (1)

【実用新案登録請求の範囲】 一対の送受信装置1,2を有し、 各送受信装置1,2は、 送信機3,5と、 受信機4,6とを有し、 受信機4,6は、ライン7によつて相互に接続
され、 各送信機3,5は、 プレストークスイツチ9,11と、 マイクロホン8,10と、 プレストークスイツチ9,11の出力に応答し
、プレストークスイツチ9,11の操作によつて
予め定める第1時間W3だけ搬送波をパルスコー
ド変調した開始信号を複数回くり返して導出し、
その後引き続き、マイクロホン8からの音声信号
によつて搬送波を変調した音声変調信号を導出し
、プレストークスイツチ9,11の操作を解除す
ることによつて予め定める第2時間W4だけ搬送
波をパルスコード変調した終了信号を複数回くり
返して導出する処理回路13と、 処理回路13からの開始信号、音声変調信号お
よび終了信号を、赤外線光で発射する発射手段1
4とを有し、 受信機4,6は、 発射手段14からの赤外線光を受信する受光素
子15と、 フリツプフロツプ21と、 一方の入力にフリツプフロツプ21の一方レベ
ルのセツト出力が与えられるANDゲート22と
、 受光素子15からの出力に応答し、開始信号を
判別してフリツプフロツプ21をセツトし、終了
信号を判別してフリツプフロツプ21をリセツト
し、さらに開始信号判別している開始判別期間t
2〜t3および終了信号を判別している終了判別
期間t5〜t6は、他方レベルの信号を導出し、
かつ開始判別期間および終了判別期間以外の期間
t3〜t5に、一方レベルの信号を導出してAN
Dゲート22の他方の入力に与える受信手段16
,23と、 スピーカ18と、 ANDゲート22からの一方レベルの出力に応
答して、そのANDゲート22の出力が一方レベ
ルとなつている期間中、音声変調信号を復調し、
その復調した信号をライン7を介して送出して送
話動作状態となり、ANDゲート22の出力が他
方レベルとなつている期間中、ライン7を介する
信号をスピーカ18によつて音響化する受話動作
状態となる手段17,24〜27とを含むことを
特徴とする通信装置。
[Claims for Utility Model Registration] It has a pair of transmitting and receiving devices 1 and 2, and each of the transmitting and receiving devices 1 and 2 has transmitters 3 and 5 and receivers 4 and 6, and the receivers 4 and 6 have , and interconnected by lines 7, each transmitter 3,5 is responsive to the output of the press talk switch 9,11, the microphone 8,10, and the press talk switch 9,11. 11, a start signal is obtained by pulse code modulating the carrier wave for a predetermined first time period W3, and is repeated several times to derive the start signal.
Subsequently, an audio modulation signal is derived by modulating the carrier wave with the audio signal from the microphone 8, and the carrier wave is pulse code modulated for a predetermined second time W4 by releasing the press talk switches 9 and 11. a processing circuit 13 that repeats and derives a completed end signal a plurality of times; and an emitting means 1 that emits the start signal, audio modulation signal, and end signal from the processing circuit 13 using infrared light.
4, the receivers 4 and 6 each include a light receiving element 15 for receiving the infrared light from the emitting means 14, a flip-flop 21, and an AND gate 22 to which one level set output of the flip-flop 21 is given to one input. Then, in response to the output from the light receiving element 15, a start signal is determined and the flip-flop 21 is set, an end signal is determined and the flip-flop 21 is reset, and a start determination period t is started during which the start signal is determined.
2 to t3 and the end determination period t5 to t6 in which the end signal is determined, the signal at the other level is derived,
And during periods t3 to t5 other than the start determination period and the end determination period, a signal of one level is derived and the AN
Receiving means 16 applied to the other input of D gate 22
, 23, and the speaker 18; in response to the output of one level from the AND gate 22, demodulates the audio modulation signal during the period when the output of the AND gate 22 is at one level;
The demodulated signal is sent out through the line 7 to enter the transmitting operation state, and during the period when the output of the AND gate 22 is at the other level, the signal through the line 7 is turned into sound by the speaker 18. A communication device characterized in that it includes means 17, 24-27 for being in a state.
JP5253689U 1989-05-06 1989-05-06 Pending JPH01162961U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5253689U JPH01162961U (en) 1989-05-06 1989-05-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5253689U JPH01162961U (en) 1989-05-06 1989-05-06

Publications (1)

Publication Number Publication Date
JPH01162961U true JPH01162961U (en) 1989-11-14

Family

ID=31278541

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5253689U Pending JPH01162961U (en) 1989-05-06 1989-05-06

Country Status (1)

Country Link
JP (1) JPH01162961U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5526957B2 (en) * 1972-03-29 1980-07-17
JPS5748747B2 (en) * 1974-02-11 1982-10-18

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5526957B2 (en) * 1972-03-29 1980-07-17
JPS5748747B2 (en) * 1974-02-11 1982-10-18

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