JPH0260315A - Voltage controlled oscillator circuit - Google Patents

Voltage controlled oscillator circuit

Info

Publication number
JPH0260315A
JPH0260315A JP63210761A JP21076188A JPH0260315A JP H0260315 A JPH0260315 A JP H0260315A JP 63210761 A JP63210761 A JP 63210761A JP 21076188 A JP21076188 A JP 21076188A JP H0260315 A JPH0260315 A JP H0260315A
Authority
JP
Japan
Prior art keywords
circuit
oscillation
constant current
current source
vco1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63210761A
Other languages
Japanese (ja)
Inventor
Takashi Mori
茂利 隆司
Koichi Ota
太田 紘一
Toshiyuki Tsuchiya
土屋 敏之
Yoshinori Nagoya
名古屋 喜則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP63210761A priority Critical patent/JPH0260315A/en
Publication of JPH0260315A publication Critical patent/JPH0260315A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a VCO circuit which can be oscillated to the wide range capable of extending a variable range by preparing plural voltage controlled oscillators(VCO) with different oscillation frequency and selecting VCO as necessary. CONSTITUTION:When an H level is inputted to an SEL input terminal, a constant current source circuit 3 is operated, an oscillation stopping circuit in a VCO1 is turned OFF, therefore, the VCO1 is oscillated. Then, a constant current circuit 4 is turned OFF, the oscillation stopping circuit in a VCO2 is operated and the VCO2 stops the oscillation. When an L level is inputted to an SEL input terminal, reversely, the constant current source circuit 3 is turned OFF, the oscillation stopping circuit in the VCO1 is operated and the VCO1 stops the oscillation. Then, a constant current source circuit 4 is operated, the oscillation stopping circuit in the VCO2 is turned OFF and therefore, the VCO2 is oscillated. Thus, plural VCO1 and 2 with different oscillation frequencies are selected and can be oscillated to a wide range.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は例えは伝送速度が低速から高速まで使用する符
号変換回路の同期抽出用P L L回路内の電圧制御発
振器(VCO)回路に係り、特に広範囲の周波数にわた
って使用するに好適な広範囲に発振可能な電圧制御発振
器回路に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a voltage controlled oscillator (VCO) circuit in a PLL circuit for synchronization extraction of a code conversion circuit used for transmission speeds ranging from low to high speeds. The present invention relates to a voltage controlled oscillator circuit capable of oscillating over a wide range, particularly suitable for use over a wide range of frequencies.

〔従来の技術〕[Conventional technology]

従来の電圧制御発振器(VCO)は、例えは特開昭56
−86509号公報に記載のように、奇数段のインバー
タを縦続接続し、」二記インバータの初段の入力と最終
段のインバータの出力とを接続し、インバータの各段に
dε人する電源電流を制御電圧により制御する構成にな
っていた。また従来のこの種の装置として関連するもの
には特開昭62−107号公報に記載のように、インバ
ータの出力に1ヘランシスタの内部抵抗とコンデンサの
直列接続回路の負荷か接続されてRC位相シフト発振を
行わせるリングオシレータを有する半導体装置において
、上記リングオシレータの発振を停止して発振を開始す
る手段を備えたものか挙げられる。
A conventional voltage controlled oscillator (VCO) is, for example,
As described in Publication No. 86509, an odd number of inverters are connected in cascade, and the input of the first stage of the inverter and the output of the last stage of the inverter are connected, and a power supply current of dε is supplied to each stage of the inverter. It was configured to be controlled by a control voltage. In addition, as described in Japanese Patent Application Laid-Open No. 62-107, a related conventional device of this kind has an RC phase in which a load of a series-connected circuit of an internal resistor of a one-heran sister and a capacitor is connected to the output of an inverter. A semiconductor device having a ring oscillator that performs shift oscillation includes a device that includes means for stopping oscillation of the ring oscillator and starting oscillation.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来技術によるVCOを使用するPLLの動作周波
数範囲を拡張しようとした場合には、PLLに使用して
いるvCOの可変範囲(中心周波数に対し1/2倍から
2倍程度の範囲)で制限を受けるという問題があった。
When trying to expand the operating frequency range of a PLL using a VCO according to the above-mentioned conventional technology, it is limited by the variable range of the vCO used in the PLL (range from 1/2 to 2 times the center frequency). There was a problem with receiving it.

本発明の目的は発振周波数の異なる複数n個のVCOを
用意し、必要に応じてVCOを選択することにより、V
COの可変範囲を拡張することのできる広範囲に発振可
能な電圧制御発振器(VCO)回路を提供するにある。
The purpose of the present invention is to prepare a plurality of n VCOs with different oscillation frequencies, and to select a VCO as necessary, to
An object of the present invention is to provide a voltage controlled oscillator (VCO) circuit that can oscillate over a wide range and can extend the variable range of CO.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的は、奇数段のインバータを縦続接続し、上記イ
ンバータの初段の入力と最終段のインハタの出力とを接
続し、インバータの各段に流入する電流を制御電圧によ
り制御する発振周波数の異なる複数個の電圧制御発振器
(VCO)を備え、各vC○に定電流源回路とインバー
タの股間には1〜ランジスタを挿入しない発振停止回路
を設け、それらの動作を選択制御するVC○選択回路を
具備した広範囲に発振可能な電圧制御発振器回路により
達成される。
The above purpose is to connect an odd number of stages of inverters in cascade, connect the input of the first stage of the inverter and the output of the last stage inverter, and control the current flowing into each stage of the inverter using a control voltage. Equipped with two voltage controlled oscillators (VCOs), a constant current source circuit for each vC○ and an oscillation stop circuit without inserting a transistor between the inverter and a VC○ selection circuit to selectively control their operation. This is achieved by a voltage controlled oscillator circuit that can oscillate over a wide range.

〔作用〕 上記VC○回路は、発振周波数の異なる複数個のVCO
にそれぞれ接続された定電流源回路と発振停止回路の動
作が■CO選択回路のS E L入力により選択制御可
能な構成となっており、例えばSEL入力端子にIIH
”レベルが入力されると第1のVCOの定電流源回路が
動作して発振停止回路がOFFとなるため第1のvCO
が発振して、第2のVCOの定電流源回路がOFFとな
って発振停止回路が動作するため第1のVCOが発振停
止し、またSEL入力端子にII L I+レベルが入
力されると逆の動作となって力士のVCOが発振停止し
て、第2のvCOが発振することにより、発振周波数が
異なるVCOが選択されて広範囲に発振可能となる。
[Operation] The above VC○ circuit has multiple VCOs with different oscillation frequencies.
The operation of the constant current source circuit and the oscillation stop circuit connected to the
"When the level is input, the constant current source circuit of the first VCO operates and the oscillation stop circuit turns OFF, so the first VCO
oscillates, the constant current source circuit of the second VCO turns OFF, and the oscillation stop circuit operates, so the first VCO stops oscillating, and when the II L I+ level is input to the SEL input terminal, the reverse occurs. When the sumo wrestler's VCO stops oscillating and the second vCO starts oscillating, a VCO with a different oscillation frequency is selected and can oscillate over a wide range.

〔実施例〕〔Example〕

以下に本発明の一実施例を第1図および第2図により説
明する。
An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

第1図は本発明による700回路の一実施例を示す基本
ブロック図である。第1図において、1゜2は第1.第
2のVCO,3,4は定電流源回路、5はインバータで
ある。第1MのVCO1,2は図示しない奇数段のイン
バータを縦続接続し、上記インバータの初段の入力と最
終段のインバータの出力とを接続し、インバータの各段
に流入する電流を制御端子C0NTに入力する制御電圧
により制御する構成の発振周波数の異なるvCOであっ
て、それぞれインバータの股間にはトランジスタを挿入
しない発振停止回路を備える。上記■C○1,2にはそ
れぞれ定電流源回路3,4が接続してあって、SEL入
力によりインバータ5から成るVC○選択回路を介して
定電流源回路3゜4とVCO1,2内の発振停止回路の
動作が選択制御可能な構成である。
FIG. 1 is a basic block diagram illustrating one embodiment of a 700 circuit according to the present invention. In Figure 1, 1°2 is the 1st. The second VCO, 3 and 4, is a constant current source circuit, and 5 is an inverter. The 1M VCOs 1 and 2 connect odd-numbered stages of inverters (not shown) in cascade, connect the input of the first stage of the inverter and the output of the last stage inverter, and input the current flowing into each stage of the inverter to the control terminal C0NT. The VCOs have different oscillation frequencies and are controlled by control voltages, and are each equipped with an oscillation stop circuit in which no transistor is inserted between the inverters. Constant current source circuits 3 and 4 are connected to the above ■C○1 and 2, respectively, and the constant current source circuit 3゜4 and VCO1 and 2 are connected via the VC○ selection circuit consisting of an inverter 5 according to the SEL input. The configuration allows the operation of the oscillation stop circuit to be selectively controlled.

上記構成で、S E L入力端子にLL HIIレベル
が入力されると、定電流源回路3が動作してVCO1内
の発振停止回路がOFFするためVCO1か発振し、定
電流源回路4がOFFとなってVCO2内の発振停止回
路が動作するためVCO2が発振停止する。またSEL
入力端子にrrL”レベルか入力されると、逆に定電流
源回路3がOFFとなってVCO1内の発振停止回路が
動作するためVCO1が発振停止し、定電流源回路4か
動作してVCO2内の発振停止回路がOFFするためV
CO2が発振して、これにより発振周波数の異なる複数
のVCO1,2を選択して広範囲に発振可能となる。
In the above configuration, when the LL HII level is input to the S E L input terminal, the constant current source circuit 3 operates and the oscillation stop circuit in the VCO1 is turned off, so the VCO1 oscillates and the constant current source circuit 4 is turned off. As a result, the oscillation stop circuit in the VCO2 operates, so the VCO2 stops oscillating. Also SEL
When the rrL" level is input to the input terminal, the constant current source circuit 3 turns OFF and the oscillation stop circuit in the VCO1 operates, so the VCO1 stops oscillating, and the constant current source circuit 4 operates and the VCO2 Since the oscillation stop circuit inside turns off, V
CO2 oscillates, thereby making it possible to oscillate over a wide range by selecting a plurality of VCOs 1 and 2 having different oscillation frequencies.

第2図は本発明による700回路の一実施例を示す回路
図である。第2図において、6〜23はP−MOSトラ
ンジスタ、24〜54はN−MOSトランジスタ、R1
,R2は抵抗、C1,C2はコンデンサである。第2図
のP−MO8I−ランジスタロ〜13とN−MO3Iヘ
ランジスタ24〜29.38−41より第1のVCO1
が構成され、P−MOSトランジスタ14〜23とN−
MOS1−ランジスタ3o〜37,4.2〜47より第
2のVCOが構成され、VCOL、VCO2は発振周波
数の異なるVCOであって、C0NT入力端子には発振
周波数を変えるための制御電圧(直流電圧)が入力され
る。VCO1のP、N−MO8+−ランシスタロと24
,7と25,8と26の奇数段のCMOSインバータに
よりリンク状の発振回路を構成し、その発振周波数はC
0NT入力端子に入力される制御電圧に応してN−Mo
8+−ランジスタ38〜40により変えられる。次段の
P。
FIG. 2 is a circuit diagram showing one embodiment of the 700 circuit according to the present invention. In FIG. 2, 6 to 23 are P-MOS transistors, 24 to 54 are N-MOS transistors, and R1
, R2 are resistors, and C1 and C2 are capacitors. The first VCO1 from the P-MO8I range resistor ~13 and the N-MO3I range resistor 24~29.38-41 in Figure 2.
is configured, and P-MOS transistors 14 to 23 and N-
A second VCO is constructed from MOS1 transistors 3o to 37, 4.2 to 47, VCOL and VCO2 are VCOs with different oscillation frequencies, and the C0NT input terminal is connected to a control voltage (DC voltage) for changing the oscillation frequency. ) is input. VCO1 P, N-MO8+-Lancistalo and 24
, 7 and 25, and 8 and 26 odd stages of CMOS inverters constitute a linked oscillation circuit, and the oscillation frequency is CMOS inverters.
N-Mo according to the control voltage input to the 0NT input terminal.
8+- transistors 38-40. Next stage P.

11−Mo8 トランジスタ9と27.41.10と2
8、ILと29のCMOSインバータなどにより増幅回
路を構成し、ここで抵抗R1はCMOSインバータの直
流レベルを中心にするために使用され、これにより振幅
か小さい場合でも1分に増幅可能となる(直流がu H
nレベルまたはII L IIレベルにはり付くのを防
いでいる。)P−MO31〜ランジスタ12,13は発
振停止回路を構成し、N−Mo8 +−ランジスタ48
,49.50は定電流源回路3を構成して、ともにSE
L入力により駆動される。同様にVCO2のP、N−M
OSトランジスタ14〜18.30〜34の奇数段のc
 M OSインバータによりリング状の発振回路を構成
し、その発振周波数はC0NT入力端子に入力される制
御電圧に応してN−Mo8 +−ランシスタ42〜4G
により変えられる。次段のI)、NMOSトランジスタ
19〜21.35〜37゜47のCMOSインバータな
どにより増1限回路を構成し、ここで抵抗R2はCMO
Sインバータの直流レベルを中心にするために使用され
る。PMOSトランジスタ22,23は発振停止回路を
構成し、■マーMo5t−ランシスタ51〜54は定電
流源回路4を構成して、ともにSET、入力により■C
○選択回路を成すインバータ5を介して駆動される。
11-Mo8 transistors 9 and 27.41.10 and 2
8. An amplifier circuit is constructed with IL and the CMOS inverter 29. Here, the resistor R1 is used to center the DC level of the CMOS inverter, so that even if the amplitude is small, it can be amplified to 1 minute ( DC is uH
This prevents it from sticking to the n level or II L II level. ) P-MO31 to transistors 12 and 13 constitute an oscillation stop circuit, and N-Mo8 +- transistor 48
, 49.50 constitute the constant current source circuit 3, and both SE
Driven by L input. Similarly, P, N-M of VCO2
OS transistors 14-18.c of odd stages of 30-34
A ring-shaped oscillation circuit is configured by an MOS inverter, and its oscillation frequency is determined by the N-Mo8+-Rancistor 42 to 4G according to the control voltage input to the C0NT input terminal.
can be changed by The next stage I), NMOS transistors 19-21.35-37°47 CMOS inverter, etc. constitute an increase 1 limiter circuit, where resistor R2 is a CMOS transistor.
Used to center the DC level of the S inverter. The PMOS transistors 22 and 23 constitute an oscillation stop circuit, and the MOS transistors 51 to 54 constitute a constant current source circuit 4.
○It is driven via an inverter 5 forming a selection circuit.

上記の回路構成で、まずS E T、、入力端子にII
 IT IIレベルか入力されると、V CO2側の定
電流源回路3のN−Mo5t−ランシスタ48〜50が
ONして発振停止回路のP−Mo8 トランジスタ1−
2゜13か○■パドするため、VCO]のCM OSイ
ンバータC3〜8.24〜26より成るリンク状の発振
回路により、C0NT入力の制御電圧に応じた発振周波
数で発振し、次段のCM、 OSインバータ9〜11−
.27〜29.41なとより成る増幅回路で増]陥され
て■CO出力より出力する。このときVCO2側の定電
流源回路4のN−MOSトランジスタ51〜54か○F
Fして発振停止回路のI)−Mo8I−ランシスタ22
,23かONするため、VCO2は発振停止してVCO
2の出力が高インピーダンス状態となる。したかってV
CO1振 か発信している時には、VCO2が発振停止状態となっ
てVCO2の出力が高インピータンス状態であるため、
VCO2の干渉を受けないで■CO会の発振出力を正常
に出力することか可能となる。
In the above circuit configuration, first, S E T, and II are connected to the input terminals.
When the IT II level is input, the N-Mo5t-run transistors 48 to 50 of the constant current source circuit 3 on the VCO2 side are turned on, and the P-Mo8 transistor 1- of the oscillation stop circuit is turned on.
In order to pad 2゜13 or ○■, a link-shaped oscillation circuit consisting of CM OS inverters C3-8. , OS inverter 9-11-
.. It is increased by an amplifier circuit consisting of 27 to 29.41 and is output from the CO output. At this time, whether the N-MOS transistors 51 to 54 of the constant current source circuit 4 on the VCO2 side
F and oscillation stop circuit I)-Mo8I-Runsistor 22
, 23 are turned ON, VCO2 stops oscillating and VCO
2 output becomes high impedance state. I want to V
When CO1 is oscillating, VCO2 stops oscillating and the output of VCO2 is in a high impedance state.
■It becomes possible to output the oscillation output of the CO board normally without receiving interference from the VCO2.

つぎにS E L入力端子にII L I+レベルが入
力されると、上記と逆にVCOZ側の定電流源回路4の
N−Mo8 I−ランジスタ51〜54かONして発振
停止回路のP−MOSトランジスタ22.23かOF 
Fするため、VCO2のCMOSインハタコ4〜18.
30〜34より成るリンク状の発振回路により、C0N
T入力の制御電圧に応じた異なる発振周波数で発振し、
次段のCMOSインバータ19〜21.35〜37,4
.7などより成る増幅回路で増幅されてVC○出力より
出力する。
Next, when the II L I+ level is input to the SEL input terminal, the N-Mo8 I- transistors 51 to 54 of the constant current source circuit 4 on the VCOZ side are turned on, contrary to the above, and the P- of the oscillation stop circuit is turned on. MOS transistor 22.23 or OF
For F, CMOS inverter 4-18 of VCO2.
A link-shaped oscillation circuit consisting of 30 to 34 allows
Oscillates at different oscillation frequencies depending on the control voltage of the T input,
Next stage CMOS inverter 19-21.35-37,4
.. The signal is amplified by an amplifier circuit consisting of 7, etc., and outputted from the VC○ output.

このときVCO1側の定電流回路3のN−Mo81−ラ
ンジスタ48〜50がOF F して発振停止回路のP
−MOSトランジスター2,1.3がONするため、V
 CO]−は発振停止状態となってVCO1の出力か高
インピーダンス状態となるため、V CO2の発振出力
を正常に出力することか可能である。
At this time, the N-Mo81 transistors 48 to 50 of the constant current circuit 3 on the VCO1 side are turned OFF, and the P of the oscillation stop circuit is turned OFF.
-Since MOS transistors 2, 1.3 are turned on, V
Since oscillation is stopped and the output of VCO1 becomes a high impedance state, it is possible to output the oscillation output of VCO2 normally.

なおS EL大入力複数個だけ用彦、して、VC○選択
回路の論理を適当に作成することにより、発振周波数の
異なる複数n個のVCOを選択することにより、VCO
の1liJ変範囲をさらに拡張することか可能である。
In addition, by using only a plurality of SEL large inputs and creating the logic of the VC○ selection circuit appropriately, by selecting a plurality of n VCOs with different oscillation frequencies, the VCO
It is possible to further expand the range of 1liJ variation.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、発振周波数の異なる複数個のVCOを
選択して出力できるので、広範囲に発振可能なVCO回
路か提供できる。
According to the present invention, since a plurality of VCOs having different oscillation frequencies can be selected and output, a VCO circuit capable of oscillating over a wide range can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による■C○回路の一実施例を示す基本
ブロック図、第2図は本発明による■C○回路の一実施
例を示す回路図である。 1、2−・・VCO1,2, 3,4定電流源回路、 5・・インバータ、 6〜23 24〜54 R1,R2 C1,C2 P−MOSトランジスタ、 ・N−MO8t−ランジスタ、 抵抗、 コンデンサ。
FIG. 1 is a basic block diagram showing an embodiment of the ■C○ circuit according to the present invention, and FIG. 2 is a circuit diagram showing an embodiment of the ■C○ circuit according to the present invention. 1, 2-...VCO1,2,3,4 constant current source circuit, 5...Inverter, 6-23 24-54 R1, R2 C1, C2 P-MOS transistor, ・N-MO8t-transistor, resistor, capacitor .

Claims (1)

【特許請求の範囲】[Claims] 1、奇数段のインバータを縦続接続し、上記インバータ
の初段の入力と最終段のインバータの出力とを接続し、
上記インバータの各段に流入する電流を制御電圧により
制御する発振周波数の異なる複数個の電圧制御発振器を
有して、上記電圧制御発振器に定電流源回路と発振停止
回路とを備え、電圧制御発振器選択回路により上記各電
圧制御発振器の定電流源回路と発振停止回路の動作を選
択して当該電圧制御発振器の発振出力を得るように構成
した電圧制御発振器回路。
1. Connect odd-numbered stages of inverters in cascade, and connect the input of the first stage of the inverter and the output of the last stage of inverter,
The voltage controlled oscillator has a plurality of voltage controlled oscillators having different oscillation frequencies that control the current flowing into each stage of the inverter using a control voltage, and the voltage controlled oscillator is provided with a constant current source circuit and an oscillation stop circuit. A voltage controlled oscillator circuit configured to select an operation of a constant current source circuit and an oscillation stop circuit of each voltage controlled oscillator by a selection circuit to obtain an oscillation output of the voltage controlled oscillator.
JP63210761A 1988-08-26 1988-08-26 Voltage controlled oscillator circuit Pending JPH0260315A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63210761A JPH0260315A (en) 1988-08-26 1988-08-26 Voltage controlled oscillator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63210761A JPH0260315A (en) 1988-08-26 1988-08-26 Voltage controlled oscillator circuit

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JPH0260315A true JPH0260315A (en) 1990-02-28

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259619A (en) * 1990-03-09 1991-11-19 Toshiba Corp Phase locked loop circuit
JPH07263955A (en) * 1993-12-30 1995-10-13 Sgs Thomson Microelectron Sa Buffer stage for current control oscillator

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52123851A (en) * 1976-04-09 1977-10-18 Rca Corp Voltage controlled oscillator
JPS53138264A (en) * 1977-05-09 1978-12-02 Toshiba Corp V-f converter
JPS6165620A (en) * 1984-09-07 1986-04-04 Nec Corp Oscillating circuit
JPS62181523A (en) * 1986-02-06 1987-08-08 Seiko Epson Corp Timer circuit
JPS635730B2 (en) * 1979-04-21 1988-02-04 Fuiritsupusu Furuuiranpenfuaburiken Nv

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52123851A (en) * 1976-04-09 1977-10-18 Rca Corp Voltage controlled oscillator
JPS53138264A (en) * 1977-05-09 1978-12-02 Toshiba Corp V-f converter
JPS635730B2 (en) * 1979-04-21 1988-02-04 Fuiritsupusu Furuuiranpenfuaburiken Nv
JPS6165620A (en) * 1984-09-07 1986-04-04 Nec Corp Oscillating circuit
JPS62181523A (en) * 1986-02-06 1987-08-08 Seiko Epson Corp Timer circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259619A (en) * 1990-03-09 1991-11-19 Toshiba Corp Phase locked loop circuit
JPH07263955A (en) * 1993-12-30 1995-10-13 Sgs Thomson Microelectron Sa Buffer stage for current control oscillator

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