JPH0260185A - Circuit board - Google Patents

Circuit board

Info

Publication number
JPH0260185A
JPH0260185A JP21276788A JP21276788A JPH0260185A JP H0260185 A JPH0260185 A JP H0260185A JP 21276788 A JP21276788 A JP 21276788A JP 21276788 A JP21276788 A JP 21276788A JP H0260185 A JPH0260185 A JP H0260185A
Authority
JP
Japan
Prior art keywords
circuit board
manufacturing process
conductive pattern
pattern
warping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21276788A
Other languages
Japanese (ja)
Inventor
Masayuki Kiyomiya
清宮 正行
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SEIKO KEIYO KOGYO KK
Original Assignee
SEIKO KEIYO KOGYO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SEIKO KEIYO KOGYO KK filed Critical SEIKO KEIYO KOGYO KK
Priority to JP21276788A priority Critical patent/JPH0260185A/en
Publication of JPH0260185A publication Critical patent/JPH0260185A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To prevent a circuit substrate from warping due to the stress in a manufacturing process by a method wherein a warpage preventing pattern is so formed on either side of an insulating substrate that they cross each other at a right angle. CONSTITUTION:A conductive pattern 3 electrically connected with packaged components such as an IC and others is formed on an insulating substrate 2, and a warpage preventing pattern 4 is additionally formed on either side of the substrate 2 so that they cross each other at a right angle. By this setup, the forces, which occurs on either side of a circuit board 1 through the heat applied to the circuit board 1 to dry it in a manufacturing process and make it warp due to thermal expansion, are so generated as to cancel each other, so that the circuit board 1 can be prevented from warping by the resultant force.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、IC等の実装部品を実装する回路基板に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit board on which mounted components such as ICs are mounted.

〔発明の概要〕[Summary of the invention]

本発明は、回路基板に反り防止パターンを設けることに
より、回路基板の製造工程内で発生するストレスによっ
て起こる回路基板の反り−を防止するようにしたもので
ある。
The present invention prevents warpage of the circuit board caused by stress generated during the manufacturing process of the circuit board by providing a warpage prevention pattern on the circuit board.

〔従来の技術〕[Conventional technology]

第3回囚及び第3図りに従来例の回路基板の裏面及び平
面を示したように、回路基板lは、絶縁基板2上にIC
等の実装部品を電気的に導通をとるための導電パターン
3と、オーバーコート層5によって構成されている。
As shown in the third picture and the third drawing of the back side and plane of the circuit board of the conventional example, the circuit board l has an IC on an insulating board 2.
It is composed of a conductive pattern 3 and an overcoat layer 5 for electrically connecting the mounted components such as.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、従来の回路基板は、回路基板の製造工程の乾燥
等によって、絶縁基板と金属パターンの熱膨張率の違い
から回路基板にストレスがかかり、回路基板に反りが発
生し、特に絶縁基板厚の薄いものでは、反りが顕著に現
れ、これが原因による断線等が発生するなど致命的な欠
点となることが多かった。
However, with conventional circuit boards, stress is applied to the circuit board due to the difference in thermal expansion coefficient between the insulating board and the metal pattern due to drying during the manufacturing process of the circuit board, causing warping of the circuit board, especially when the thickness of the insulating board increases. Thin wires exhibit noticeable warping, which often causes fatal defects such as wire breakage.

そこで本発明は、従来のこのような欠点を解決するため
、回路基板の製造工程内に回路基板にかかるストレスに
よって発生する回路基板の反りを防止することを目的と
している。
SUMMARY OF THE INVENTION In order to solve these conventional drawbacks, it is an object of the present invention to prevent warpage of a circuit board caused by stress applied to the circuit board during the manufacturing process of the circuit board.

〔課題を解決するための手段〕[Means to solve the problem]

上記問題点を解決するために、本発明は回路基板の製造
工程内に回路基板にかかるストレスに耐え得る強度を回
路基板に持たせるため、絶縁基板上にIC等の実装部品
に電気的に接続をもつ導電パターンの他に反り防止パタ
ーンを絶縁基板の両面にそれぞれ互いに直交するように
設け、前記回路基板を形成したことを特徴とする。
In order to solve the above problems, the present invention provides electrical connection to mounted components such as ICs on an insulating substrate in order to give the circuit board strength that can withstand the stress applied to the circuit board during the manufacturing process of the circuit board. The circuit board is characterized in that the circuit board is formed by providing anti-warpage patterns on both surfaces of the insulating substrate, in addition to the conductive pattern having a conductive pattern, so as to be perpendicular to each other.

〔作用〕[Effect]

上記のように構成された回路基板は、反り防止パターン
を絶縁基板の両面にそれぞれ直交させるように設けたこ
とにより、回路基板の製造工程内の乾燥等によって回路
基板に加えられる熱で、回路基板を熱膨張によって反ら
せる力を両面それぞれ互いに打ち消し合うように発生さ
せ、その合力により回路基板の反りを防止することがで
きる。
The circuit board configured as described above has warpage prevention patterns perpendicular to both sides of the insulating board, so that the heat applied to the circuit board during drying during the manufacturing process of the circuit board can The forces that cause the circuit board to warp due to thermal expansion are generated so as to cancel each other out, and the resultant force can prevent the circuit board from warping.

〔実施例〕〔Example〕

以下に、本発明の実施例を図面に基づいて説明する。本
発明に係わる回路基板は、第1図(A+、 03の表面
平面図及び裏面平面図に示すように、ガラスエポキシ基
板等の絶縁基板2上にIC等の実装部品に電気的に接続
のある導電パターン3.IC等の実装部品に電気的に接
続のない反り防止パターン4.及びオーバーコート層5
より形成されており、上記IC等の実装部品に接続のな
い反り防止パターン4,4は第1図囚、■に示すように
両面互いに直交するように形成されている。以上の構造
により、回路基板lが構成されている。なお、第1図0
は回路基板の断面図である。
Embodiments of the present invention will be described below based on the drawings. As shown in the front and back plan views of FIG. Conductive pattern 3. Warp prevention pattern 4. and overcoat layer 5, which are not electrically connected to mounted components such as ICs.
The anti-warpage patterns 4, 4, which are not connected to the mounted components such as the IC, are formed so as to be perpendicular to each other on both sides, as shown in FIG. The circuit board 1 is configured by the above structure. In addition, Fig. 1 0
is a cross-sectional view of the circuit board.

そして上記回路基板1を製造する際、製造工程内の乾燥
等によって回路基板1に熱が加えられ、絶8!基板2と
導電パターン3及び反り防止パターン4の熱膨張率の違
いにより上記回路基板lに反りが発生する力が働くが、
IC等の実装部品に電気的に接続のない反り防止パター
ン4がそれぞれ互いに直交しているため、第2図の説明
図に示すように上記回路基板1に反りを発生する力F。
When manufacturing the circuit board 1, heat is applied to the circuit board 1 due to drying during the manufacturing process, causing the circuit board 1 to die! Due to the difference in thermal expansion coefficient between the substrate 2, the conductive pattern 3, and the anti-warp pattern 4, a force that causes the circuit board l to warp is exerted.
Since the warpage prevention patterns 4 that are not electrically connected to mounted components such as ICs are perpendicular to each other, a force F that causes the circuit board 1 to warp as shown in the explanatory diagram of FIG.

F゛がそれぞれ打ち消し合うように働き、上記回路基板
1の反りを防止する。
F' acts to cancel each other out and prevents the circuit board 1 from warping.

〔発明の効果〕〔Effect of the invention〕

本発明の回路基板は以上のように、絶縁基板上に、反り
防止パターンを両面にそれぞれ互いに直交させるように
形成することにより、回路基板の製造工程内で、回路基
板にかかるストレスによって発生する回路基板の反りを
防止する効果がある。
As described above, the circuit board of the present invention is provided by forming warp prevention patterns on both sides of an insulating board so as to be perpendicular to each other, thereby preventing warpage that occurs due to stress applied to the circuit board during the manufacturing process of the circuit board. This has the effect of preventing the board from warping.

【図面の簡単な説明】[Brief explanation of the drawing]

第1囲繞は本発明の一実施例を示す回路基板の表面平面
図、第1図りは本発明の一実施例を示す回路基板の裏面
平面図、第1図(Qは本発明の一実施例を示す回路基板
の断面図、第2図は本発明の一実施例の効果を示す説明
図、第3図囚、0は従来例の回路基板の表面図及び裏面
図である。 1・・・回路基板 2・・・絶縁基板 3・・・導電パターン 4・・・反り防止パターン 5・・・オーバーコート層 以上 出願人 セイコー京葉工業株式会社 代理人 弁理士 林  敬 之 助 本発明の実施例て−める回路基板の西面+面図第1 図
(A) 絨明の大杷刺である日記14淀の裏面千面図第1図(B
) 本発明の実施例の回16基板の飢面図 第1 図(C)
The first box is a front surface plan view of a circuit board showing an embodiment of the present invention, the first drawing is a back plan view of a circuit board showing an embodiment of the present invention, and FIG. FIG. 2 is an explanatory diagram showing the effects of an embodiment of the present invention, and FIG. 3, 0, is a front and back view of a conventional circuit board. Circuit board 2...Insulating substrate 3...Conductive pattern 4...Warp prevention pattern 5...Overcoat layer and above Applicant: Seiko Keiyo Kogyo Co., Ltd. Agent Patent attorney: Takayuki Hayashi Embodiments of the present invention - West side + side view of the printed circuit board Figure 1 (A) Thousand-sided view of the back side of the diary 14 Yodo, which is a large loquat of Keimei Figure 1 (B
) Figure 1(C)

Claims (1)

【特許請求の範囲】[Claims]  絶縁基板に化学的処理等により導電パターンを形成し
た両面回路基板において、上記導電パターンは、IC等
の実装部品に電気的に導通をとるための導電パターンと
、製造工程中に回路基板にかかるストレスによる反りを
防止するための反り防止パターンによって構成している
ことを特徴とした回路基板。
In a double-sided circuit board in which a conductive pattern is formed on an insulating substrate by chemical treatment, etc., the conductive pattern is a conductive pattern for establishing electrical continuity with mounted components such as ICs, and a stress applied to the circuit board during the manufacturing process. A circuit board characterized in that it is constructed with a warpage prevention pattern for preventing warpage due to
JP21276788A 1988-08-26 1988-08-26 Circuit board Pending JPH0260185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21276788A JPH0260185A (en) 1988-08-26 1988-08-26 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21276788A JPH0260185A (en) 1988-08-26 1988-08-26 Circuit board

Publications (1)

Publication Number Publication Date
JPH0260185A true JPH0260185A (en) 1990-02-28

Family

ID=16628060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21276788A Pending JPH0260185A (en) 1988-08-26 1988-08-26 Circuit board

Country Status (1)

Country Link
JP (1) JPH0260185A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5912654A (en) * 1995-03-27 1999-06-15 Canon Kabushiki Kaisha Electric-circuit board for a display apparatus
WO2009072182A1 (en) * 2007-12-04 2009-06-11 Fujitsu Limited Circuit board and electronic device
JP2010129874A (en) * 2008-11-28 2010-06-10 Toshiba Corp Printed wiring board
JP2014049648A (en) * 2012-08-31 2014-03-17 Yazaki Corp Printed wiring board
US9818682B2 (en) * 2014-12-03 2017-11-14 International Business Machines Corporation Laminate substrates having radial cut metallic planes
CN115066986A (en) * 2020-02-11 2022-09-16 三星电子株式会社 Printed circuit board assembly and electronic device including the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6124295A (en) * 1984-07-13 1986-02-01 日本電気株式会社 Circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6124295A (en) * 1984-07-13 1986-02-01 日本電気株式会社 Circuit board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5912654A (en) * 1995-03-27 1999-06-15 Canon Kabushiki Kaisha Electric-circuit board for a display apparatus
WO2009072182A1 (en) * 2007-12-04 2009-06-11 Fujitsu Limited Circuit board and electronic device
JP2010129874A (en) * 2008-11-28 2010-06-10 Toshiba Corp Printed wiring board
US7919716B2 (en) 2008-11-28 2011-04-05 Kabushiki Kaisha Toshiba Printed wiring board and electronic apparatus
JP2014049648A (en) * 2012-08-31 2014-03-17 Yazaki Corp Printed wiring board
US9818682B2 (en) * 2014-12-03 2017-11-14 International Business Machines Corporation Laminate substrates having radial cut metallic planes
CN115066986A (en) * 2020-02-11 2022-09-16 三星电子株式会社 Printed circuit board assembly and electronic device including the same
EP4102941A4 (en) * 2020-02-11 2023-10-04 Samsung Electronics Co., Ltd. Printed circuit board assembly and electronic device comprising same

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